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65results about How to "Minimizing amount of data" patented technology

System and method for scheduling broadcast of and access to video programs and other data using customer profiles

InactiveUS6088722AMinimize memory requirementFacilitate text retrievalTelevision system detailsAnalogue secracy/subscription systemsTelevision systemData source
PCT No. PCT / US95 / 15429 Sec. 371 Date Dec. 24, 1997 Sec. 102(e) Date Dec. 24, 1997 PCT Filed Nov. 29, 1995 PCT Pub. No. WO96 / 17467 PCT Pub. Date Jun. 6, 1996A system and method for scheduling the receipt of desired movies and other forms of data from a network, which simultaneously distributes many sources of such data to many customers, as in a cable television system. Customer profiles are developed for the recipient describing how important certain characteristics of the broadcast video program, movie, or other data are to each customer. From these profiles, an "agreement matrix" is calculated by comparing the recipient's profiles to the actual profiles of the characteristics of the available video programs, movies, or other data. The agreement matrix thus characterizes the attractiveness of each video program, movie, or other data to each prospective customer. "Virtual" channels are generated from the agreement matrix to produce a series of video or data programming which will provide the greatest satisfaction to each customer. Feedback paths are also provided so that the customer's profiles and / or the profiles of the video programs or other data may be modified to reflect actual usage, and so that the data downloaded to the customer's set top terminal may be minimized. Kiosks are also developed which assist customers in the selection of videos, music, books, and the like in accordance with the customer's objective profiles.
Owner:FRED HERZ PATENTS

Computer system and method to dynamically generate system on a chip description files and verification information

InactiveUS7100133B1Facilitates efficient and effective creation and modification and verificationConvenience to mergeCAD circuit designSoftware simulation/interpretation/emulationComputer architectureTest platform
The present invention facilitates automation of system on a chip (SoC) design, manufacture and verification in a convenient and efficient manner. In one embodiment, a SoC netlist builder and verification computer system of the present invention includes a user interface module, a parameter application module, an expert system module and a chip level netlist generation module. The user interface module provides user friendly and convenient interfaces that facilitate easy entry and modification of user selections and parameters. The parameter application module interprets information supplied by the user module and the expert system module and creates directions (e.g., command lines) passed to other modules for execution. The expert system module analyzes information and automatically provides SoC building and verification data including automated addition of default architectural features, automated insertion of default parameters, and automated input of information to the verification module. The chip level netlist generation module automatically generates a chip level netlist, including the instantiation of internal IC devices and connections between the circuit blocks for internal signals. The verification module automatically generates a test bench and a logical verification environment including simulation models (e.g., a chip model and a system level model).
Owner:NXP BV

Mobile communications terminal for satellite communications system

A mobile communications system transporting messages between mobile terminals and a central control center using a satellite communications system. The central control center and the mobile terminals each store a plurality of message display forms each having a form identifier and a predetermimed display format. The message display forms are selected as templates for generating user messages including message data supplied at the originating station. The satellite messages transmit the user message by transmitting the message data and the form identifier of the corresponding selected message display form. The receiving station, upon receiving the satellite message, accesses the message display form from memory in response to the supplied form identifier, and combines the accessed message display form with the message data to recreate the user message. The mobile terminals are designed as low-cost data terminals requiring a minimum amount of memory. The mobile terminals include a satellite transceiver, a graphic user interface providing a display and accepting key inputs from the user, and a software system including an application layer providing all messaging functions for the user and a middleware layer controlling transport of messages between the application layer and the satellite transceiver. The application layer operates as an event-based state machine, and includes an event handler that controls the application layer operations in accordance with the processing capacity of the middleware layer.
Owner:ATC TECH LLC

Method and apparatus for recovering a clock signal from an asynchronous data signal

A clock recovery unit for generating a clock signal corresponding to an asynchronous data signal. The clock recovery unit includes an input port for receiving an incoming data signal; a local oscillator circuit for generating a plurality of clock signals having the same frequency, where the plurality of clock signals are each shifted in phase relative to one another; a sampling unit having a plurality of latches, each of which is clocked by one of the plurality of clock signals generated by the local oscillator circuit, the sampling unit outputting a plurality data samples of the incoming data signal; a data phase alignment unit coupled to the sampling unit, the data phase alignment unit receiving the plurality of data samples as input signals and operative for shifting the phase of the plurality of data samples; a multiplexer circuit coupled to the data phase alignment unit, the multiplexer circuit having a first multiplexer operative for selecting a portion of the plurality of data samples, each of the data samples having a corresponding clock signal, which is one of the plurality of clock signals generated by the local oscillator circuit, the multiplexer circuit having a second multiplexer operative for selecting one of the plurality of clock signals generated by the local oscillator circuit; a phase decoder coupled to the multiplexer circuit, the phase decoder operative for receiving the portion of the plurality of data samples selected by the multiplexer and for generating an output signal indicative of the logic values of the portion of the plurality of the data samples selected by the first multiplexer; and a barrel shifter circuit coupled to the phase decoder, the barrel shifter operative for adjusting the data samples selected by the first multiplexer in accordance with the output signal of the phase decoder.
Owner:PANASONIC CORP
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