FPGA-based JTAG test method

A test method and test data technology, which is applied in the electronic field, can solve problems such as difficulty in determining technology, inability to judge open circuits, and inability to judge open circuits, etc., and achieve the effects of easy procurement, good accuracy, high-speed data transmission and analysis

Inactive Publication Date: 2011-02-23
FUJIAN XINO COMM TECH
View PDF4 Cites 20 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] 1. Only the specific pins of sluggish 0 or sluggish 1 can be tested, but it is impossible to determine where the sluggishness occurs, for example, it appears on the connection line with other chips, or it appears on the ball solder joint under the BGA. difficult to determine
[0007] 2. It is impossible to judge the open circuit, because the data of th

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • FPGA-based JTAG test method
  • FPGA-based JTAG test method

Examples

Experimental program
Comparison scheme
Effect test

Example Embodiment

[0022] See figure 1 Shown is a schematic diagram of the interface of the JTAG test system of the present invention. figure 1 , FPGA is connected with the circuit board under test through the JTAG interface and probes. While testing through the JTAG interface, the probes from the FPGA are connected to the monitoring points of the circuit board under test to read the data of each point in the test Variety. Then finally the FPGA is sent to the embedded processor or PC through the asynchronous serial port for data analysis and determination. The hardware part uses VHDL language to write the whole design. Realized on FPGAEPC1E1-3T144 of LATTICE company. The PC software part is developed by C++ software.

[0023] figure 1 In, the system control state machine based on FPGA realizes the analysis and execution of PC machine (or microprocessor) instructions. These instructions include instructions for configuring working modes, instructions for testing, and instructions for reading te...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention relates to a field programmable gate array (FPGA)-based joint test action group (JTAG) test method. In the method, an FPGA is connected with a circuit board to be tested by a JTAG interface and a probe; when a test is performed through the JTAG interface, the probe led out of the FPGA is connected with a monitoring point of the circuit board to be tested so as to read the data change of each point during the test; and finally, the FPGA sends the data change to a personal computer (PC) or a microprocessor for data analysis and judgment through an asynchronous series-port circuit. By the FPGA-based JTAG test method, a welding defect of a ball grid array (BGA) chip and the welding condition of the circuit around the chip can be precisely judged.

Description

【Technical field】 [0001] The invention relates to the field of electronic technology, in particular to a JTAG test method implemented based on FPGA. 【Background technique】 [0002] In order to solve the testing problem of VLSI, the Joint Test Action Group (JTAG) proposed the boundary-scan technology, which tests the device and its peripheral circuits through the boundary-scan unit existing between the input and output pins of the device and the core circuit. , thereby improving the controllability and observability of the device, solving the above-mentioned test problems brought about by the development of modern electronic technology, and can more conveniently complete the test of the circuit board assembled by the modern device. Often this test is called a JTAG link test. [0003] There are many schemes for designing circuit board testing based on the JTAG standard IEEE1149, and its advantage is that online testing can be performed. Soldering defects of some components o...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G01R31/3185G05B19/05
Inventor 刘文庆
Owner FUJIAN XINO COMM TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap