852results about "Contactless circuit testing" patented technology

The invention provides a power management chip high-low side driving signal time sequence optimization method and system. The method comprises the following steps: acquiring temperature data of a power management chip under a switch switching transient working condition through an infrared thermal imaging technology, and synchronously acquiring three-dimensional temperature field distribution of junction temperatures on the surface and inside a packaging layer; based on the space continuity of a temperature field, extracting the temperature change characteristics of a power device area, converting the temperature gradient into Seebeck voltage by using a thermoelectric material embedded in a hot spot area, and constructing a dynamic thermoelectric feedback network; according to Seebeck voltage data, a coupling relation between hot carrier concentration and driving signal phase deviation is established, and disturbance of hot carrier mobility change on MOSFET switching delay is quantified; the rising / falling edge slope of the grid voltage is adjusted based on the coupling relation, the phase deviation caused by the hot carrier effect is eliminated through dynamic compensation, and the switching performance is optimized. The dynamic response precision of the power management chip is improved.

The invention provides a power chip packaging detection method and device, and the method comprises the steps: obtaining a structure image, an infrared thermal imaging frame sequence and a working electrical parameter data set of a target power chip after packaging, and carrying out the layering and regional peak analysis, so as to construct a morphology feature parameter set and a thermal anomaly feature set; inputting the morphology feature parameter set, the thermal anomaly feature set and the working electrical parameter data set into a preset defect identification model to obtain a chip packaging anomaly identification map; and performing hierarchical division and node aggregation on the chip packaging abnormity identification map to obtain a packaging defect type result. By constructing a multi-modal packaging detection system taking a structural image, an infrared thermal imaging frame sequence and a working electrical parameter data set as input, accurate identification of the power chip is realized, the accuracy of packaging defect detection is effectively improved, and the problems of low identification precision and information isolation of an existing detection method are improved.

The invention discloses a three-temperature test method and device for a semiconductor chip, and relates to the technical field of semiconductor chip testing, and the method comprises the steps: inputting an initialization parameter set into an impedance temperature mapping model, carrying out the phase angle analysis and multi-band feature fusion through a broadband impedance spectrum analysis method, obtaining a chip junction temperature instantaneous value, and carrying out the measurement of the junction temperature instantaneous value. A PID controller is utilized to dynamically compensate a junction temperature instantaneous value of a chip, a fuzzy rule base inference engine is utilized to map the junction temperature instantaneous value into an execution instruction set, the execution instruction set is converted into a bidirectional voltage signal through pulse width modulation, a semiconductor chilling plate is driven to perform bidirectional temperature rise and drop control in a three-temperature environment, and real-time temperature change test data is synchronously acquired. According to the method, the junction temperature instantaneous value of the chip can be more accurately obtained by combining broadband impedance spectroscopy analysis with a multi-band characteristic fusion technology, and meanwhile, the PID controller is combined with the fuzzy rule base inference engine, so that a response can be quickly made under the condition that the temperature is quickly changed, and the response capability is greatly improved.

The purpose of the present disclosure is to provide technology with which it is possible to obtain, from a language model by means of input of a character string into the language model, an instruction to an evaluation device for evaluating a semiconductor device. In a method according to the present disclosure, an instruction to an evaluation device for evaluating a semiconductor device is inputted into a language model, whereby specification data describing operation specifications of the evaluation device is received from the language model. The language model is fine-tuned in advance by means of at least one of domain knowledge pertaining to the semiconductor device or domain knowledge relating to the evaluation device (see fig. 2).

The invention discloses a probe integrated device and a preparation method and a control method of the probe integrated device. The device comprises a probe array, a silicon electrode substrate, a recording chip bare chip and a rigid printed circuit substrate. The preparation method comprises the following steps: preparing a probe array and a silicon electrode substrate; carrying out balling on the bare chip of the recording chip, aligning the bare chip with one end of the silicon electrode substrate, and inversely mounting the bare chip on the probe array and the silicon electrode substrate to obtain a substrate with the bare chip; and adhering to a rigid printed circuit substrate, and connecting through a metal wire to obtain the probe integrated device. The control method comprises the following steps: acquiring a brain neuron signal; and carrying out amplification and analog-to-digital conversion processing on the cerebral neuron signal to obtain a cerebral neuron digital signal. According to the embodiment of the invention, miniaturization of the device can be promoted, acquisition of high-flux signals is facilitated, and three-dimensional space neurons can be recorded. The probe array can be widely applied to the technical field of probe arrays.

Various approaches can be used to interrogate a surface such as a surface of a layered semiconductor structure on a semiconductor wafer. Certain approaches employ Second Harmonic Generation and in some cases may utilize pump and probe radiation. Other approaches involve determining current flow from a sample illuminated with radiation. Decay constants can be measured to provide information regarding the sample. Additionally, electric and / or magnetic field biases can be applied to the sample to provide additional information.

The invention discloses a chip fixing device for a low-light microscope, which relates to the technical field of low-light microscopes and comprises a base, an opening is formed in the base, light-transmitting glass is arranged at the bottom of the opening, a plurality of connecting rods are arranged on the inner wall of the opening in the circumferential direction, clamping blocks are arranged at the ends of the connecting rods, and first elastic pieces are further connected to the connecting rods. The first elastic piece is used for pushing the connecting rod to move towards one side of the center of the opening, first slopes are arranged on the side walls of the clamping blocks, and the multiple first slopes are matched to form a receiving opening. A to-be-detected chip is placed in the receiving opening and pressed towards one side of the light-transmitting glass, the connecting rod slides outwards under the action of the first inclined surface, and the clamping blocks are gradually opened until the chip is clamped among the clamping blocks. And under the action of the first elastic piece, the plurality of clamping blocks can clamp the chip in the opening. According to the chip clamping device, clamping can be completed only by pressing the chip into the receiving opening, and rapid clamping of the chip can be achieved.

Various approaches can be used to interrogate a surface such as a surface of a layered semiconductor structure on a semiconductor wafer. Certain approaches employ Second Harmonic Generation and in some cases may utilize pump and probe radiation. Other approaches involve determining current flow from a sample illuminated with radiation. Decay constants can be measured to provide information regarding the sample. Additionally, electric and / or magnetic field biases can be applied to the sample to provide additional information.

Performance evaluation and structural optimization methods for a high-power semiconductor laser chip, and a performance evaluation system for a high-power semiconductor laser chip. The performance evaluation method for a high-power semiconductor laser chip comprises: providing a window on an N-side electrode of a chip to be tested (step 1); keeping the chip in an operating state (step 2); allowing a quantum well active region of the chip to generate spontaneous emission, so that the spontaneous emission is imaged outside the chip (step 3); acquiring, by means of a spectrograph, a spectrum of the spontaneous emission outside the chip and obtaining a two-dimensional distribution of a quantum well temperature of the chip in the operating state; and acquiring, by means of a CCD camera, an image of the spontaneous emission imaging outside the chip and obtaining a two-dimensional distribution of charge carriers in the quantum well of the chip in the operating state (step 4). According to the performance evaluation and structural optimization methods for a high-power semiconductor laser chip, the distributions of the temperature and the charge carrier concentration in the quantum well of the chip to be tested in the operating state in which the resolution is freely adjusted can be obtained. Operations of the methods are convenient, and implementation is simple and easy, thereby efficiently improving the accuracy of an evaluation result.

The invention relates to the technical field of circuit testing, in particular to a circuit board detection device and method and an analysis device. The detection device of the circuit board comprises a radio frequency probe used for connecting one end of a test circuit of the circuit board to be tested; the analysis device is connected with the radio frequency probe, the analysis device transmits a detection signal to the test circuit of the to-be-tested circuit board through the radio frequency probe, the detection signal is propagated along the test circuit of the to-be-tested circuit board and is reflected to generate a reflection signal, and the radio frequency probe is further used for receiving the reflection signal and sending the reflection signal to the analysis device; the analysis device is used for determining the defect condition of the circuit board based on the reflected signal. In the application, the analysis device is connected with the radio frequency probe, so that the detection signal can be transmitted to the circuit board to be detected through the radio frequency probe, and the analysis device can also acquire the reflection signal and determine the defect condition of the circuit board based on the reflection signal, so that the defect condition of the circuit board to be detected can be rapidly determined without cutting the circuit board to be detected.

The present application provides a method for performance evaluation and structure optimization of a high-power semiconductor laser chip, and a system for performance evaluation. Wherein the method for performance evaluation of a high-power semiconductor laser chip comprises: setting a window in an N-surface electrode of a chip to be tested; maintaining the chip to be tested in an operating state, wherein spontaneous radiation is generated in an active area of a quantum well of the chip to be tested; imaging the spontaneous radiation at a position outside the chip to be tested; acquiring, by using a spectrometer outside the chip to be tested, a spectrum of the spontaneous radiation to obtain a two-dimensional distribution of temperature of the quantum well of the chip to be tested in the operating state; and acquiring, by using a CCD camera outside the chip to be tested, an image of the spontaneous radiation to obtain a two-dimensional distribution of carriers in the quantum well of the chip to be tested in the operating state. The method for performance evaluation and structure optimization of a high-power semiconductor laser chip provided by the present application can get the temperature distribution and the carrier concentration distribution of the chip to be tested in the operating state with a resolution that is freely adjustable, the operation is convenient and easy to implement, and the accuracy of evaluation results is effectively improved.

Methods and probes for exciting, detecting, and sensing a sample are disclosed. An example method includes positioning a probe of a test tool relative to a contact point associated with a sample of a sample array such that the probe is in electrical contact with the sample array at the contact point; driving a parallel electrical excitation of the sample, where the electrical contact between the probe and the contact point is continuously maintained while the driving is performed, and the parallel electrical excitation of the sample produces a value for testing the sample; and repeating the above operation on other contact points for one or more times. Another example method submerges a probe in a liquid conductive material to provide a conductive liquid at its end of the probe, and may continuously position and / or move the probe relative to a contact point of a sample to facilitate delivery of an electrical signal to drive excitation of the sample.

An optical metrology device includes a selectable pump arm that is used to produce a transient response in the target sample and a probe arm and may be configured to perform static Magneto-Optic Kerr Effect (MOKE) measurements or ellipsometry measurements when the pump arm is not selected, and time resolved (TR) MOKE measurements or ellipsometry measurements when the pump arm is selected. The optical metrology device may be further configured to perform opto-acoustic measurements when the pump arm is selected. A pulse shaper in the pump arm may be used to pulse duration, phase, or both, of the incident pump beam to enable measurement of the dependence of the magnetic dynamics on the pump pulse characteristics. The optical metrology device may be configured to operate at a single selectable wavelength or multiple wavelengths in a continuous or discontinuous spectrum.

A method is described for testing electrical connections of a substrate having a first surface contact (21) and a first electrical connection (20) extending from the first surface contact (21). The method includes the steps of (a) discharging the first surface contact (21) by focusing and deflecting a first electron beam (111) having a first electron energy on the first surface contact (21), (b) charging the first surface contact (21) by focusing and deflecting a second electron beam (112) having a second electron energy different from the first electron energy on the first surface contact (21), and (c) inspecting the first electrical connection (20) by detecting signal electrons emitted from the substrate. An apparatus for testing electrical connections of a substrate using two electron beams of different electron energies according to the methods described herein is further described.

The present invention relates to optical coupling between optical components and, more particular, to an optical probe (1) configured for optical testing of at least one micro-optical component (50), to a method for producing an optical probe (1), and to a method for optical testing of at least one micro-optical component (50). The optical probe (1) is comprising: - a probe head (10), wherein the probe head (10) comprises a test component (2); - at least one micro-optical element (20), wherein the micro-optical element (20) is a separate element with regard to the test component (2) and in mechanical contact with the test component (2), wherein the micro-optical element (20) is configured to optically couple light (3) between the test component (2) and the micro-optical component (50), thereby being configured to determine an optical performance of the micro-optical component (50), and wherein the micro-optical element (20) is configured to be operated in an index matching liquid (17).

An element includes a coupling line in which a first conductor layer, a dielectric layer, and a second conductor layer are stacked in this order, and which is connected to the second conductor layer in order to mutually synchronize a plurality of antennas at a frequency of a terahertz wave; and a bias line connecting a power supply for supplying a bias signal to a semiconductor layer and the second conductor layer. A wiring layer in which the coupling line is formed and a wiring layer in which the bias line is formed are different layers. The bias line is disposed in a layer between the first conductor layer and the second conductor layer.

Methods and systems for measurement of an expected electrical performance of a semiconductor device after device formation is complete based on structural measurements of the device in a partially fabricated state are described herein. In a further aspect, process parameters associated with a process step are adjusted based on the predicted electrical performance to improve process yield. In this manner, process parameters are tuned without having to wait several weeks for electrical performance test measurements to occur at the end of a process flow. In preferred embodiments, a Multiple Reflection Spectroscopic Ellipsometry (MRSE) system is employed to perform structural measurements of a semiconductor device in a partially fabricated state to predict electrical performance of the device at the end of the device fabrication process flow. MRSE based measurements are performed at one or more critical process steps where the structural measurements correlate strongly with final electrical performance.

A device for detecting optical loss includes a first light-guiding cable, a second light-guiding cable, a light detector, at least one angle-adjusting bracket, and a first emission microscope. The first light-guiding cable is connected with a light generator. The light detector is connected with the second light-guiding cable. When the light generator generates a light beam, the light beam is emitted to a semiconductor light-guiding chip through the first light-guiding cable. The semiconductor light-guiding chip guides the light beam to the second light-guiding cable. The light detector receives the light beam through the second light-guiding cable to retrieve the energy of the light beam. The first emission microscope captures the leakage position of the semiconductor light-guiding chip where the light beam is emitted from the semiconductor light-guiding chip.

The invention provides a ray detection system and method for an electronic product, and the system comprises an anti-radiation housing which is provided with an accommodation cavity; the radiation source is arranged in the accommodating cavity; the object carrying device is arranged in the accommodating cavity in a push-pull manner and is used for placing a to-be-detected electronic product, and the side surface, which is not wrapped by the accommodating cavity, of the object carrying device is made of an anti-radiation material; the detector is arranged in the containing cavity, and the radiation source and the detector are located on the two opposite sides of the object carrying device respectively; and the control device is arranged outside the anti-radiation shell, is in communication connection with the radiation source and the detector, and is used for controlling the radiation source to emit beams, receiving a scanning image of the detector and processing the scanning image to obtain a detection result. The ray detection system is high in detection efficiency, small in occupied area and flexible in use scene.

The present invention discloses an experimental apparatus and a test method for a pulse laser irradiation wide bandgap power device. The apparatus includes an optical path coupling system, a circuit test system, a temperature control system, and an interaction control system. According to the present invention, irradiation sensitive region locating, irradiation transient current tests, irradiation sensitive condition tests, and irradiation degradation tests for the wide bandgap power device are implemented, and advantages of convenience in experiments, simple operation, automated tests, comprehensive and accurate test results, and the like are achieved.

A method for testing a packaging substrate with at least one electron beam column is described, wherein the packaging substrate is a panel level packaging substrate or an advanced packaging substrate. The method includes placing the packaging substrate on a stage in a vacuum chamber; directing at least one electron beam of the at least one electron beam column on at least a first portion of the packaging substrate; directing the at least one electron beam of the at least one electron beam column on at least a second portion of the packaging substrate; detecting signal electrons emitted upon impingement of the at least one electron beam for testing a first device-to-device electrical interconnect path of the packaging substrate; and illuminating at least a third portion of the packaging substrate with UV radiation.

The invention provides a protection method and system based on key signal single particle error state coding characterization, which realizes key signal error state characterization and storage through key signal STMR and error key signal ID number coding and through data frames and control frames, and finally completes error state analysis by using a monitoring unit program in a PS system. And forming a protection decision. According to the invention, the resource overhead and the data transmission bandwidth of the user function circuit can be reduced, the reliability of the user function circuit system realized based on the SoC type FPGA is improved, and the method has applicability and operability for the digital circuit system of the electronic equipment for space navigation.

A method includes the steps of energizing, in a test fixture with a combination of a power signal and a clock signal, an electrical device selected from a plurality of electrical devices, measuring a first value of a parameter of the electrical device in a first emission of an electromagnetic energy in a radio frequency (RF) spectrum emitted from energized electrical device, irradiating the electrical device, irradiating the electrical device with a radiation dose in a radiation type, measuring a second value of the parameter in the second emission of the electromagnetic energy in the RF spectrum emitted from the energized and irradiated electrical device, measuring a difference between the first value and the second value, and determining a condition of the electrical device based on a measured difference.

The invention provides a detection system and method based on terahertz pulse on-chip radiation detection. The detection system and method can be applied to the technical field of terahertz nondestructive detection. The detection system comprises a terahertz pulse radiation unit, a pulse regulation and isolation unit and a terahertz pulse detection unit which are integrated on the same chip, the terahertz pulse radiation unit is used for radiating terahertz detection pulses under the action of the first femtosecond laser pulses; the pulse regulation and isolation unit is used for regulating the terahertz detection pulse input from the first port to be output through the third port and regulating the terahertz reflection pulse input from the third port to be output through the second port; and the terahertz pulse detection unit is connected with the second port and is used for detecting the terahertz reflected pulse to obtain a current signal, so that fault defect detection of the detected sample is realized based on the current signal. According to the detection system, damage to the integrated circuit structure in the detection process is avoided, and the problem of poor fault defect detection accuracy is solved.

A system and method for compensating for thermal drift of a probe device includes monitoring a first temperature of a laser source in a sensor head that receives output electrical signals from a DUT and outputs corresponding optical signals; monitoring a second temperature of a photoreceiver in a probe interface that converts the optical signals to electrical test signals to input to the test instrument; calculating a first value of a first bias voltage; applying the first value of the first bias voltage to the laser source to compensate for thermal drift when the first temperature is within a first predefined temperature range; calculating a second value of a second bias voltage for the photoreceiver; and applying the second value of the second bias voltage to the photoreceiver to compensate for thermal drift when the second temperature is within a second predefined temperature range.

The invention discloses an ADC irradiation detection method, and belongs to the field of chip detection. The method comprises the steps that firstly, an irradiation detection circuit is built, the irradiation detection circuit comprises a programmable gate array unit, a multi-path switching unit and a matrix switch unit, the programmable gate array unit analyzes a configuration instruction into excitation signals, and the multi-path switching unit and the matrix switch unit synchronously input the excitation signals into an ADC to be detected and a reference ADC; secondly, performing a transient pulse test based on an irradiation detection circuit, and detecting whether the to-be-tested ADC generates a transient pulse or not in an irradiation environment; in addition, function testing in a non-radiation environment and a radiation environment is carried out based on an irradiation detection circuit, and whether the function of the to-be-tested ADC is normal or not is detected. Through the application of the invention, whether the ADC has a problem can be accurately judged.

The utility model provides a lithium battery charging management chip testing and detecting device, which relates to the field of testing and detecting devices and comprises a base, a movable sliding rail, a first lifting frame and a second lifting frame are respectively arranged at the top of the base, and a fixing stand for fixing a battery chip is slidably mounted on the movable sliding rail. A driving assembly used for driving the fixing stand to slide transversely is arranged on one side of the movable sliding rail, a first laser detector and a second laser detector are installed on the first lifting frame and the second lifting frame correspondingly, and the first laser detector and the second laser detector can be driven to ascend and descend through the first lifting frame and the second lifting frame correspondingly. And the battery chip is driven to transversely slide in cooperation with the fixed stand, so that the detection position of the battery chip is adjusted, the detection range is widened, unqualified chips are found in time, and the detection effect is further improved.

The embodiment of the present application discloses a kind of test system and heat dissipation method of pulse laser analog single particle effect, and it is used to improve the heat dissipation efficiency of the chip to be tested for heat dissipation.The heat dissipation system includes pulse laser and heat conduction component.The heat conduction component is located between the pulse laser and the chip to be tested.The heat conduction component includes light-transmitting region and heat-conducting region.The light-transmitting region is physically connected with the heat-conducting region.The pulse laser emitted by the pulse laser is transmitted to the chip to be tested through the light-transmitting region.The pulse laser is used to carry out pulse laser analog single particle effect test on the chip to be tested.The light-transmitting region is physically connected with the chip to be tested.The heat of the chip to be tested is dissipated through the light-transmitting region and the heat-conducting region.

A method for testing a packaging substrate with at least one electron beam column is described, wherein the packaging substrate is a panel level packaging substrate or an advanced packaging substrate. The method includes placing the packaging substrate on a stage in a vacuum chamber; directing at least one electron beam of the at least one electron beam column on at least a first portion of the packaging substrate; directing the at least one electron beam of the at least one electron beam column on at least a second portion of the packaging substrate; detecting signal electrons emitted upon impingement of the at least one electron beam for testing a first device-to-device electrical interconnect path of the packaging substrate; and illuminating at least a third portion of the packaging substrate with UV radiation.

The invention provides a semi-automatic probe table type testing device for a packaging device, which is used for carrying out reliability screening and testing on the packaging device, and comprises a probe table main body, a horizontal sliding table, a lifting table, an XY rotary loading platform, a material platform and an electronic video microscope, a lifting table is fixed above the horizontal sliding table, an XY rotary loading platform is placed above the lifting table, a material platform is placed above the XY rotary loading platform, and a packaging device is placed at a pre-calibration position of the material platform; an observation groove is formed in the middle of the top of the probe station main body, probe seats are arranged on the periphery of the observation groove, and probe heads capable of being movably adjusted are arranged on the probe seats; a connecting support is fixed above the top of the probe station body, an electronic video microscope is connected to the connecting support, and a lens of the electronic video microscope faces the observation groove. And through the combination of the horizontal sliding table and the lifting table, the requirements of small-batch and multi-variety rapid testing of packaging devices are met.