33 results about "S-box" patented technology

The invention discloses a dynamic S-box and cross-channel diffusion image encryption method based on six-dimensional hyper-chaos driving, and belongs to the field of information security, and the method comprises the implementation steps: 1) constructing a novel six-dimensional hyper-chaos system; 2) constructing a cross-channel diffusion scheme based on the six-dimensional hyperchaotic system; 3) constructing a dynamic S box library based on a six-dimensional hyperchaotic system; according to the invention, by introducing an inter-channel coupling mechanism, the potential safety hazard of traditional sub-channel encryption is effectively relieved. A dynamic S box generated based on chaotic system state self-adaption enhances the nonlinear confusion characteristic, and Arnodcat mapping transformation realizes global pixel scrambling. Theoretical and experimental results show that the method overcomes the limitation of a low-dimensional system, and the aspects of statistical analysis, key sensitivity, attack resistance and the like are remarkably improved.

The invention discloses a quantum optimization-oriented design method for realizing an S box circuit, which comprises the following steps of: S1, analyzing linear operation and nonlinear operation in classical implementation of an S box, and dividing a classical implementation structure of the S box; s2, designing quantum implementation of different modules in the classical implementation structure of the S box step by step; and S3, analyzing the combinability of a linear module implementation circuit in the quantum implementation of the S box to optimize the quantum implementation of the S box. The quantum implementation efficiency of the S box in the cryptographic algorithm is effectively improved, and the implementation cost of a related quantum circuit is reduced.

The invention belongs to the technical field of information security, and discloses a method for evaluating the anti-differential fault analysis capability of 5-bit S box candidates in an NIST LWC competition, which comprises the following steps of: 1, injecting a fault into the input of a 5-bit S box applied to a target lightweight encryption algorithm, deducing the input of the 5-bit S box through an output authentication tag obtained through analysis, and determining the input of the 5-bit S box according to the input of the 5-bit S box; the middle state in the password operation process is reconstructed before the 5-bit S box layer, and the key is indirectly obtained through the middle state; 2, evaluating the anti-differential fault analysis capability of the target lightweight encryption algorithm according to the differential fault attack result in the step 1; and step 3, designing the target lightweight encryption algorithm according to the anti-differential fault analysis capability evaluation result of the target lightweight encryption algorithm. According to the invention, the security of the LWC algorithm in the face of differential fault attack is improved.

The invention provides a symmetric cipher optimization method and system based on chaotic mapping, and the method comprises the steps: initializing a chaotic mapping parameter, and determining an initial value and a control parameter of a chaotic system; based on the initial value and the control parameter, utilizing enhanced Logistic chaotic mapping to generate a high-randomness chaotic sequence; constructing an initial S box based on the generated enhanced Logistic chaotic sequence; and carrying out optimization and structural weakness correction on the generated initial S box. According to the method, the security of the symmetric cryptographic algorithm can be remarkably improved, the anti-attack capability of the S box is greatly enhanced, the cryptographic index of the S box is ensured, and the security guarantee in a wider application scene is realized by adjusting the size of the S box through fine granularity.

The invention discloses a mobile phone USIM (Universal Subscriber Identity Module) side channel analysis method based on an outlier. The method comprises the following steps: S1, collecting a power consumption signal generated in the process of executing an AES (Advanced Encryption Standard) algorithm by a USIM card; s2, filtering and aligning the acquired power consumption signal to generate standardized side channel curve data; s3, for each key byte position participating in S box operation in the first round of AES, constructing a candidate key byte value, and calculating an S box output value; s4, recognizing recovered and uncertain key bytes by adopting a correlation energy analysis method; s5, deriving S box output byte positions influenced by the uncertain bytes in the second round; s6, calculating the correlation of the candidate value at the position, and generating a correlation feature vector; s7, inputting a local outlier factor algorithm, and calculating an outlier value; and S8, selecting the key byte with the maximum outlier as a final key byte to form a key byte set. According to the invention, the accuracy and robustness of USIM key recovery are improved in a low signal-to-noise ratio scene.

The invention relates to the technical field of data encryption, in particular to an application layer data encryption method and system based on an SM4 algorithm and abstract verification, and the method comprises the steps: obtaining to-be-encrypted text data in an application layer, and dividing the to-be-encrypted text data into a plurality of plaintext blocks; calculating the information repetition degree, the semantic association degree, the information sensitivity and the adjustment coefficient of each plaintext block; the method comprises the steps of adjusting control parameters of a chaotic mapping algorithm to obtain corresponding adjusted control parameters of each plaintext block, encrypting each plaintext block by combining the chaotic mapping algorithm and an SM4 algorithm to obtain ciphertext data, and verifying the integrity of the ciphertext data in a communication transmission process through a digital digest technology. According to the method, the S box and the round key are dynamically generated by adjusting the control parameters of the chaotic mapping algorithm, the static mode of fixing the S box and the key in the traditional SM4 algorithm is broken, the attack resistance of the plaintext block is enhanced, the risk that the plaintext block is leaked is reduced, and the encryption effect on application layer data is improved.

The invention relates to a power secondary equipment fingerprint construction method and system, an electronic device and a storage medium, belongs to the field of network security, and solves the problems that the power secondary equipment is inaccurate in identity recognition, large in resource consumption and easy to be interfered by the environment. Comprising the following steps: periodically acquiring multi-dimensional features of the power secondary equipment according to an acquisition period and preprocessing the multi-dimensional features; based on the stability index value of each feature, dynamically allocating a weight for each feature, and performing tolerance mapping on the preprocessed features based on the weights to generate a robust feature character string; generating a dynamic S box exclusive to the power secondary equipment based on the plurality of high-stability characteristics of the power secondary equipment; and utilizing the exclusive dynamic S box to encrypt the robust feature character string through a lightweight encryption algorithm, carrying out Hash operation on an encryption result, and dynamically generating a fixed-length equipment fingerprint of the current acquisition period. And safe, efficient and stable identity authentication of the power secondary equipment is realized.

The invention discloses a dynamic involution block cipher S box implementation method and system. According to the method, two groups of 8-bit data can be replaced at the same time based on two rounds of Fesitel structures. In each round of Feistel structure, an F function is generated by any 8 * 8 static S box through linear recombination of private parameters. 256 S boxes depending on private parameters can be obtained in each F function. The whole dynamic S box can be kept consistent with an initial static S box in cryptographic property. Taking the static S box of the AES algorithm as an example, the dynamic S box and the S box of the AES algorithm have the same nonlinearity, difference uniformity and algebraic degree. In the average iteration output period, the S box is obviously superior to the S box of the AES algorithm. Besides, based on the symmetry of the Fesitel structure, the whole dynamic S box has involution, so that the hardware area overhead of an inverse S box does not need to be considered in the decryption process of the block cipher adopting the S box.

The invention relates to a remote sensing image encryption method based on four-dimensional hyperchaotic mapping, and belongs to the technical field of information security. The method comprises the following steps: constructing a four-dimensional hyperchaotic system based on improved Henon and Quadratic mapping; generating an initial value of a four-dimensional hyper-chaotic system by combining the chi-square test value and the hash value of the remote sensing image to be encrypted, and performing iteration to generate a pseudo-random sequence; the method comprises the following steps: partitioning a remote sensing image to be encrypted, generating a three-dimensional random matrix by using a pseudo-random sequence to perform pixel scrambling on the partitioned image, generating four one-dimensional random matrixes by using the pseudo-random sequence, and obtaining four new S boxes for pixel replacement by combining a dynamic mask interleaving method; and combining the Gaussian function and the sine function to generate a waveform curve, and performing XOR on the waveform curve and the value of the pseudo-random sequence to realize scrambling and diffusion of pixels, and finally forming a ciphertext image. The objective of the invention is to solve the technical problem that security is difficult to guarantee due to relatively single phase space structure and obvious periodic characteristics during image encryption of traditional chaotic mapping.

The application discloses a kind of security detection method and device of cryptographic algorithm, the method includes: setting target plaintext data, and the target plaintext is processed by predefined cryptographic algorithm, and target ciphertext is obtained;The inverse operation of CBC chain operation is carried out to the target ciphertext, and intermediate ciphertext is obtained;The target plaintext data and the intermediate ciphertext are compared, and S box is cracked;According to the S box, inverse S box is constructed;According to the intermediate ciphertext and the inverse S box, solution is obtained, and decryption result is obtained;The decryption result and the target plaintext data are compared, and comparison result is obtained.The device includes memory and processor for executing the security detection method of the above cryptographic algorithm.The application provides a new direction for the security performance detection of encryption method.The application can be widely applied in the field of security detection.

The invention discloses an 8-bit S box construction method based on greedy random adaptive search, which comprises the following steps of: firstly, introducing a nonlinear term power function, a trigonometric function and a logarithmic function to construct a two-dimensional hyper-chaotic system TDHM on the basis of a benchmark test function Himelblau function; secondly, constructing a bijection initial S box based on a random number sequence generated by a two-dimensional hyper-chaotic system TDHM; and finally, respectively carrying out linearity and differential uniformity optimization on the S boxes of which the cryptographic properties do not meet the requirements, setting corresponding cost function values as optimization constraint conditions, selecting an optimized exchange strategy according to corresponding greedy rules, carrying out local search on the S boxes to optimize the linearity and differential uniformity of the S boxes, and carrying out optimization on the S boxes. And the password S box meeting the target condition is constructed. According to the method, the success rate of searching the S box meeting the target requirement is improved, and the average iteration frequency of the algorithm is effectively reduced.

The application discloses a kind of SM4 S box hardware implementation method and application based on redundant tower area, belong to information security technical field, including: using redundant tower area to express AES S box, and using little end order to express affine transformation;Give the conversion relationship between the S box of AES and SM4, and express affine transformation and constant offset using little end order;Based on step 1 and step 2, give the SM4 S box expression based on redundant tower area;Combined with the mask implementation of three-stage inverse of redundant tower area, complete the complete SM4 hardware design.The application first maps SM4 S box to the redundant tower area implementation framework of AES S box, by optimizing and merging multiple affine transformation layers and constant offset, realize high compact RTF-SM4.The S box is very easy to combine with mask class and double-track class and other gate-level side channel attack protection schemes, realize compact and anti-side channel attack SM4 hardware implementation, ensure the side channel security of encryption hardware.

The invention provides a self-anti-S box construction method and system based on m-sequence generation and logic optimization, and belongs to the technical field of cryptography and hardware security. The method comprises the following steps: firstly, constructing an n-level linear feedback shift register according to a set S box number n and a primitive polynomial, generating an m sequence in a non-all-zero initial state, and adding an all-zero state at the tail; a self-reverse S box lookup table is constructed through a symmetric mapping strategy, so that the ith element in the sequence and the element at the symmetric position form mapping, and the same S box is used for encryption and decryption. Thirdly, the lookup table serves as a Boolean function truth table, is simplified into a simplest expression through a logic minimization algorithm and is decomposed into a layered logic circuit; during actual processing, N data blocks are converted into a bit plane format from block type storage, then parallel operation is carried out through a hierarchical circuit, and finally a result is transposed back to block type storage. According to the method, the same S box hardware module can be reused in the encryption and decryption process, and hardware resources are remarkably saved.

The invention discloses an S box, a data processing method, a computer program product, equipment and a medium, and relates to the technical field of cryptography, the S box comprises an input calculation module, an intermediate calculation module, an output calculation module and a first register block; the input calculation module is used for reading the input data, the first matrix and the first vector from the first register group, performing operation on the input data, the first matrix and the first vector to obtain a first operation result and storing the first operation result into the first register group; the intermediate calculation module is used for reading the first operation result from the first register block, performing inverse operation on the first operation result to obtain a second operation result and storing the second operation result into the first register block; and the output calculation module is used for reading the second operation result, the second matrix and the second vector from the first register block, performing operation on the second operation result, the second matrix and the second vector to obtain an output result and storing the output result in the first register block. And all modules can be subjected to parallel calculation, so that the calculation performance is improved.

The invention provides a data processing method and device based on a logic gate, and relates to the technical field of communication. The method comprises the following steps: acquiring input data, wherein the input data belongs to a finite field; the input data is processed through an S box, the S box is used for a symmetric encryption algorithm, the S box comprises a plurality of logic gates, and the plurality of logic gates comprise three input logic gates. According to the method in the embodiment of the invention, the calculation efficiency of the symmetric encryption algorithm can be improved.

The invention provides a method and a system for searching a password difference feature based on a weight construction SAT model. The method and the system mainly solve the problems that more Boolean variables are introduced and the efficiency of searching the password difference feature is low when an S box probability is described in the prior art. According to the implementation scheme, the method comprises the steps that a linear component of a target cryptographic algorithm is converted into a linear differential propagation assembly; according to DDT of a target algorithm S box, Boolean variables are introduced, weights are given, impossible propagation clauses are generated and simplified, and an S box differential propagation component in the SAT model is obtained; establishing an objective function according to the difference feature probability expected to be searched, and converting the objective function into an objective function part component in a conjunctive normal form by using weight sequence coding; and forming an SAT model by the components, and solving the SAT model to find out the difference feature of the target password. The method can effectively reduce the number of Boolean variables introduced for describing the S-box difference probability information, improves the efficiency of searching the difference characteristics of the cryptographic algorithm, and can be used for the design and analysis of the cryptographic algorithm.

The application relates to a power secondary equipment fingerprint construction method and system, an electronic device and a storage medium, and belongs to the network security field, and solves the problems of inaccurate power secondary equipment identity recognition, large resource consumption and easy environmental interference. The method comprises the following steps: periodically collecting multi-dimensional characteristics of power secondary equipment according to a collection period and preprocessing; based on stability index values of the characteristics, dynamically assigning weights to the characteristics, and based on the weights, performing tolerance mapping on the preprocessed characteristics to generate a robust feature string; based on a plurality of high-stability characteristics of the power secondary equipment, generating a dynamic S box special for the power secondary equipment; and using the special dynamic S box to encrypt the robust feature string through a lightweight encryption algorithm, and performing a hash operation on the encryption result to dynamically generate a fixed-length device fingerprint of the current collection period. The identity authentication of the power secondary equipment is safe, efficient and stable.

The invention discloses a security detection method and device for a cryptographic algorithm, and the method comprises the steps: setting target plaintext data, and carrying out the processing of a target plaintext through a predefined cryptographic algorithm, and obtaining a target ciphertext; performing inverse operation of CBC chain operation on the target ciphertext to obtain an intermediate ciphertext; comparing the target plaintext data with the intermediate ciphertext, and cracking to obtain an S box; constructing an inverse S box according to the S box; solving according to the intermediate ciphertext and the inverse S box to obtain a decryption result; and comparing the decryption result with the target plaintext data to obtain a comparison result. The device comprises a memory and a processor used for executing the security detection method of the cryptographic algorithm. The invention provides a new direction aiming at the security performance detection of the encryption method. The method can be widely applied to the field of security detection.

The application discloses a kind of anti side channel attack mask protection methods and systems based on circulant matrix, it is related to data security technology, including: generating random matrix, and, generating random permutation array based on the generated random matrix, wherein the random matrix only contains 1,0 element;Based on the generated random matrix, generate mask set by the cyclic shift of matrix;According to the generated random permutation array, the disorder calculation of S box is carried out in AES encryption algorithm, and based on the generated mask set, mask is added in the intermediate value in different positions.The application updates mask set by the cyclic shift of matrix, simultaneously generates permutation array using matrix, for the disorder calculation of S box, finally adds different mask on the intermediate value in different positions, achieves the purpose of protecting intermediate value.

The application discloses a kind of 8 bit S box construction method based on improved genetic algorithm, comprising the following steps: (1) by Logistic chaotic mapping and Tent chaotic mapping to form a kind of compound chaotic system, generates initialization population;(2) combined with the nonlinearity of S box, difference uniformity and strict avalanche criterion generates a multi-objective segmented weighted fitness function;(3) using the cross operation of guaranteeing S box bijectivity;(4) construct a reverse search method to search mutation point, and combined with hill climbing algorithm, random search method, generate based on 2N round search mutation operation, 2 point mutation point search is carried out in the first N rounds, 3 point mutation point search is used in the last N rounds, and a look-up table statistics method is further used to evaluate the property of optimized S box;(5) based on improved genetic algorithm constructs 8 bit password S box.The method of the application can generate 8 bit S box with excellent cryptographic properties based on improved genetic algorithm.

The present invention proposes a configurable white box AES algorithm for an on-board system, comprising setting an intermediate value variable state, setting it as a byte array, then performing round key addition, performing byte replacement after performing XOR on the intermediate value state and the round key, mapping through an S box, then starting row shifting, performing replacement between bytes inside the intermediate value state matrix, performing column confusion after completing the replacement, performing a reversible matrix on the intermediate value, each action affects a column of the intermediate value state, repeating the above operations, and completing 10 rounds of encryption, wherein the encryption process determines the ratio of the use of a confusion table and algorithm restoration in the encryption process according to CipherState, and then encrypts through a confusion table query method, and restores part of the confusion table to the algorithm to participate in the encryption and decryption process; the restoration algorithm first removes redundant calculation tables, and reduces the size of the confusion table by removing redundant tables; and performs algorithm optimization to reduce the use of unnecessary confusion tables.

The invention provides a lithium battery protection board software security communication method and device, equipment and a medium, and the method comprises the steps: S1, obtaining a voltage ripple signal of a lithium battery protection board, carrying out the spectrum analysis of the voltage ripple signal, and generating a ripple feature vector; s2, mapping the ripple feature vector into an intermediate parameter through a Hash algorithm, and decomposing the intermediate parameter to obtain a time slot offset and an interval control factor; s3, based on the ripple feature vector and the interval control factor, performing dynamic disturbance on the standard encryption algorithm to generate a dynamic encryption component, the dynamic encryption component comprising a dynamic S box; and S4, the obtained lithium battery state data is encrypted based on the dynamic encryption component, an encrypted data block is generated, and the sending time sequence of the encrypted data block is determined according to the time slot offset. By adopting the method, fixed correlation characteristics of encryption operation and physical signals can be eliminated, and the capability of resisting side channel attacks in the communication process is improved.

The invention relates to a power-down algebraic fault analysis method and device for lightweight block cipher, and belongs to the field of communication and information security. The method comprises the following steps: inputting a plaintext into a target lightweight block cipher to obtain a correct ciphertext, realizing fault injection of the target lightweight block cipher in a last R round, and inputting the same plaintext into the target lightweight block cipher to obtain a fault ciphertext; decomposing the S box of the target lightweight block cipher, and decomposing the original S box into two S boxes with low algebraic times; constructing a correct encryption algebraic equation and a fault encryption algebraic equation of the target lightweight block cipher; assigning the correct ciphertext, the fault ciphertext and the fault information to obtain an assignment algebraic equation; and solving all algebraic equations to obtain an encryption key used for encrypting the target lightweight block cipher. According to the method, the S box substitution operation is subjected to algebraic equation representation by using the equation sets with low algebraic times and small number, and the solving efficiency is improved.

The invention provides an encryption / decryption method and device. The method comprises the steps that multiple rounds of operation are carried out based on input data and a secret key to generate output data, each round of operation is used for processing N pieces of grouped data to generate rounds of output data, and the N pieces of grouped data of the first round of operation are obtained after random mask processing is carried out on the input data, the N grouped data of the other rounds of operation are obtained according to the N-1 grouped data of the previous round of operation and the round output data. In each round of operation, performing random mask processing according to the round key and N-1 grouped data of the round of operation to generate first data; performing nonlinear transformation on the first data by using the S box with the mask to generate second data; performing linear transformation on the second data to generate third data; performing XOR operation on the other packet data of the current round of operation and the third data to generate fourth data; and performing mask processing on the fourth data to generate round output data of the round of operation. According to the method, the security of equipment and data can be improved.

The invention discloses a minimum time delay S-box circuit searching method based on an STP solver, and the method comprises the steps: constructing a constraint model comprising circuit topology, logic functions and process library weighted time delay, and employing an automatic tool STP solver to achieve the searching of a minimum time delay S-box circuit under the given logic gate number and depth limitation. And the S-box circuit which meets the specific cryptographic property and has the minimum physical time delay is automatically searched. According to the method, the security of the S box for resisting the password attack is considered, the physical delay of the critical path can be accurately constrained and optimized, and meanwhile, the low delay characteristic of the composite logic gate can be utilized to explore and determine the delay performance boundary of the S box under a specific process.

The application discloses a differential fault attack method of a lightweight cipher GIFT based on a byte model, and comprises the following steps: obtaining correct cipher texts generated by using the GIFT algorithm to encrypt plaintexts without injecting byte faults and error cipher texts generated by encrypting the plaintexts after injecting byte faults, wherein the GIFT algorithm is encrypted through a plurality of S boxes; performing an exclusive or operation on the correct cipher texts and the error cipher texts to obtain output differentials of each corresponding S box in the encryption process of target plaintexts, and determining a target S box injected with a byte fault in the plurality of S boxes according to the output differentials of each S box and input differentials of each S box obtained in advance; determining an input value of the target S box in the encryption process of plaintexts without injecting byte faults as a correct input value of the target S box according to the input differentials and the output differentials of the target S box; and recovering an encryption key used by the plaintexts without injecting byte faults and the plaintexts with injecting byte faults through the correct input value of the target S box.

The invention provides a data encryption method and a related device, and is applied to the technical field of communication, and the data encryption method comprises the steps: obtaining a timestamp and a first equipment identifier of a target electronic student identity card under the condition of receiving plaintext data, obtaining a second device identifier of a super subscriber identity module SIM card bound with the target electronic student identity card; generating N first keys based on the timestamp, the first device identifier and the second device identifier, N being an integer greater than 1; generating a dynamic S box based on the second device identifier and the timestamp; and performing N rounds of encryption on the plaintext data based on the N first keys and the dynamic S box to obtain ciphertext data. In the method, a first secret key and a dynamic S box are determined through a first device identifier, a second device identifier and a timestamp, and then the dynamic S box and the first secret key are utilized to perform multi-round encryption on plaintext data, so that the plaintext data are fully mixed and diffused, and the encryption capability for the data can be improved.

The invention relates to the technical field of software application, in particular to an optimization method and system based on an improved AES algorithm and an ECC algorithm, and the method comprises the following steps: selecting an elliptic curve parameter P-192 recommended by an NIST, the finite field being GF (p), and using the elliptic curve parameter P-192 and the finite field being GF (p) for subsequent ECC algorithm related calculation; the AES algorithm is transformed, specifically, the affine transformation period of an S box is adjusted to be 16, the iteration output period is adjusted to be 256, and an affine pair with the minimum strict avalanche effect distance is selected from multiple obtained results to construct the S box; the method has the beneficial effects that the space capacity is increased by increasing the S box affine transformation period, improving the security of the AES algorithm, adjusting the iteration output period, increasing the efficiency of AES encryption by strictly selecting the affine pair with the minimum avalanche effect distance, improving the security of AES encryption by increasing the ECC encryption of the secret key, and improving the security of the AES encryption by increasing the ECC digital signature verification. And the data integrity is ensured.

The invention relates to a continuous fault point selection method and device for a lightweight block cipher, and belongs to the field of communication and information security. According to the method, an S box is decomposed into two S boxes with low algebraic times, algebraic equations are constructed respectively, and then a correct encryption algebraic equation, a fault encryption algebraic equation and an assignment algebraic equation are constructed, so that an encryption key is obtained, solving success rates and average solving time under different fault models are obtained, and an optimal fault injection point is determined. According to the method, the influence of different fault points on the continuous fault analysis solving success rate and solving time is analyzed, the optimal fault injection point is obtained, the technical time is short, the technical efficiency is high, and the method has good universality.

The invention discloses a fast implementation method for an FBC block cipher algorithm based on an x86 processor. The method comprises the following steps of: performing slice recombination and parallel arrangement on plaintext data to be encrypted; carrying out bit-level expansion on the secret key, and carrying out bitwise exclusive-or operation on the multi-path slice data which are arranged in parallel and the expanded round secret key; performing secondary slicing on the data subjected to round key operation according to bytes, and inputting the data into an S box which is converted into a Boolean algebra expression for parallel operation; performing parallel optimization on linear operations such as row shift and column confusion by using an AVX2 instruction set; and finally, performing inverse arrangement on the bit slicing result, outputting ciphertext groups, and completing data encryption. According to the method, on the premise of not changing an FBC block cipher algorithm structure and security characteristics, the parallel computing capability of the instruction set is fully utilized, high-speed parallel encryption of the FBC block cipher is realized, and the encryption efficiency and throughput performance of software implementation are effectively improved.