35 results about "Scalable computing" patented technology

The subject matter described herein includes methods, systems, and computer readable media for early detection of a neurodevelopmental or psychiatric disorder using scalable computational behavioral phenotyping. According to one method for early detection of a neurodevelopmental or psychiatric disorder using scalable computational behavioral phenotyping includes obtaining user related information, wherein the user related information includes metrics derived from a user interacting with one or more applications executing on at least one user device; generating, using the user related information and a machine learning based model, a user assessment report including a prediction value indicating a likelihood that the user has a neurodevelopmental or psychiatric (neurodevelopmental / psychiatric) disorder and a prediction confidence value computed using relative contributions of the metrics to the prediction value generated using the machine learning based model; and providing the user assessment report to a display or a data store.

The invention belongs to the technical field of extensible computer architecture, and particularly relates to a two-level cache coherence protocol based on a many-core computing architecture. Comprising a many-core computing architecture, the many-core computing architecture comprises a plurality of computing clusters, each computing cluster is formed by interconnection of a plurality of core grains and an I / O and memory controller, and the I / O and memory controller is interconnected with at least two memory DDRs; each core particle is formed by interconnection of a plurality of computing cores and a shared cache LLC; each calculation core is provided with a private cache, and when the data is not in the private cache, the memory access request continues to go to the next-level shared cache LLC or the memory DDR until the latest data is obtained; the shared cache LLC can access the memory DDR only after the shared cache LLC is in butt joint with the memory controller through high-speed interconnection and I / O; and the two-level cache consistency protocol directory is composed of a first-level directory and a second-level directory. According to the invention, the delay of re-reading from the storage system is omitted, the performance is further improved, and the congestion at the storage position is reduced.

End-to-end explanation techniques, which efficiently explain the behavior (feature importance) of any machine learning model on large tabular datasets, are disclosed. These techniques comprise two down-sampling methods to efficiently select a small set of representative samples of a high-dimensional dataset for explaining a machine learning model by making use of the characteristics of the dataset or of an explainer of a machine learning model to optimize the explanation quality. These techniques significantly improve the explanation speed while maintaining the explanation quality of a full dataset evaluation.

A scalable AI system includes a plurality of slots on a main board, at least one AI module mounted in the slots to perform AI operations, and a main processor that controls the entire system. A user can flexibly scale the overall AI computation performance of the system by adjusting the number of AI modules as needed. Each AI module is equipped with a low-power NPU specialized for AI operations and adopts standard form factors (e.g., M.2, E1.S) to improve economy and scalability. This can solve the problems of high-power consumption and cost, which are limitations of GPU-based systems, and can efficiently support various AI applications.

Method(s), apparatus, system(s) and platform(s) are provided for operating a personal data management component (PDMC) and provisioning / operating a personal database server (PDS) for a user in a personal database management (PDM) platform. The PDM platform comprising the PDMC communicatively coupled to a plurality of PDSs provisioned for one or more of a plurality of users. Each PDS configured for storing and exchanging personal data controlled by said corresponding user. The PDM platform communicates over a communication network with a plurality of applications. Each application is configured for providing an application service requiring access to personal data of one or more of the plurality of user(s). Provisioning a PDS for a user includes: receiving a request for creating a PDS for a user of the plurality of users; creating a PDS for the user based on scalable computing infrastructure, where the PDS is configured for a user to control automatic storage and exchange of personal data of the user with one or more of the applications; registering data representative of the user and PDS of the user; providing a PDS identifier to the user for enabling an application to store and access personal data in the PDS of the user based on personal data access control information of the application.

A method and system for leveraging an existing issuer user application, associated with a payment network, to create centralized merchant loyalty platform. The centralized merchant loyalty platform consolidates computing resources from different merchant systems to a centralized processing system. The centralized processing system creates a scalable computing platform that allows for loyalty programs associated with a plurality of different merchants to be seamlessly accessed through the existing issuer user application.

Scalable computer architectural frameworks for quantum computers or for classical digital computers. According to one implementation, the framework includes a plurality of processing nodes, each processing node including at least three processing elements, and a plurality of couplings. The processing elements in a processing node (11) are connected in series forming a string comprising two end processing elements and at least one intermediate processing element. Each processing node is connected to each of the other processing nodes by means of only one external coupling. The intermediate processing elements are connected to processing elements of other processing nodes by the same number of external couplings, and the end processing elements are connected to processing elements of other processing nodes by the same number of external couplings or one more.

This application provides a key generation method and a core cryptographic processing system based on a scalable computing data path. The method includes: determining plaintext data, initial key data, counter configuration parameters, and encryption operation parameters based on key generation requirement information; generating counter block data based on the counter configuration parameters, and generating multiple round keys based on the initial key data; performing multi-level folding operations on the counter block data and round keys by the scalable computing data path according to the folding factor and pipeline number under preemptive release logic to generate intermediate key data, and performing synchronization buffer alignment processing on the plaintext data based on the pipeline number to obtain aligned plaintext data; and performing a bitwise XOR operation on the aligned plaintext data based on the intermediate key data to generate target key data. Through the above method, high performance, resource adaptability, accurate synchronization, and continuous reliability are achieved in key generation.

An apparatus comprises at least one processing device configured to register two or more source services, wherein registering a given source service comprises executing the given source service to identify inputs and outputs of the given source service, and to select a set of outputs from the registered source services for generating at least a portion of a user interface of an application in an application client, the selected set of outputs comprising at least first and second output from first and second ones of the registered source services. The processing device is also configured to determine an orchestration of the registered source services for obtaining the selected set of outputs, to generate a custom microservice configured to execute the registered source services in accordance with the determined orchestration, and to deploy the custom microservice in an auto-scalable computing framework accessible to the application client of the application.

Disclosed herein are systems, methods, and devices in which a controller can automatically manage the physical infrastructure of a computer system based on a plurality of system rules, a system state of the computer system, and a plurality of templates. Techniques for automatically adding resources such as computer resources, storage resources, and / or networking resources to the computer system are described. Techniques for automatically deploying applications and services on such resources are also described. These techniques provide a scalable computer system that can function as a one-stop scalable private cloud.

The present invention provides a method and apparatus for biosequence engineering guided by machine learning. Specifically, a Bayesian optimization-guided evolutionary algorithm (BO-EVO) is provided, which combines Bayesian optimization (BO) and evolutionary algorithm (EVO). EVO solves the problem of excessive computational complexity caused by BO locating the global optimum by brute force search of the entire design space. At the same time, the exploratory nature of BO is used to neutralize the greed and under-exploration shortcomings of EVO to achieve efficient iteration between machine learning models and robotic experiments, so as to economically obtain new protein variants of high value. The method of the present invention is expected to achieve efficient and scalable computing and exploration, and provide an efficient biosequence engineering solution.

Systems, methods, and apparatus are disclosed herein in which a controller is capable of automatically managing a physical infrastructure of a computer system based on a plurality of system rules, a system state of the computer system, and a plurality of templates. Techniques are described for automatically adding resources, such as computer resources, storage resources, and / or networking resources, to the computer system. Techniques for automatically deploying applications and services on such resources are also described. The techniques provide a scalable computer system capable of serving as a one-stop scalable private cloud.

Embodiments of the invention relate to dynamic computing resource assignment and scalable computing environment generation for a real-time environment. A computing environment is scalably generated and built based on metadata associated with individually defined containers of a sandbox group. Each container of the sandbox group is a digitized construction of itself and is packaged by metadata defining properties and aspects of the packet, including enumerating individual members in the team, assigned factors or attributes, and the like. Thus, the metadata identifies the sandboxes to be generated and identifies within these sandboxes the computing environment to be generated and how such computing environment will be built. In variable team settings, the amount and identity of individuals may be unknown and may change dynamically. The administrator provides a team definition without a roster or with a roster including only previously registered individuals. The subsequently joined individuals are dynamically added to the roster, and appropriate sandboxes and computing environments are generated at a different time than generating sandboxes and computing environments for other users.

The utility model provides a computing device capable of expanding computing power. The computing device comprises a circuit board, a first computing chip, a second computing chip, a first resistance-capacitance discrete device, a second resistance-capacitance discrete device, a third resistance-capacitance discrete device, a packaging shell, a first wire and a second wire, wherein the first computing chip, the second computing chip, the first resistance-capacitance discrete device, the second resistance-capacitance discrete device and the third resistance-capacitance discrete device are mounted on the circuit board; the first end of the first resistance-capacitance discrete device is connected with the first computing chip, and the second end is connected with the first end of the first wire; the first end of the second resistance-capacitance discrete device is connected with the second computing chip, and the second end is connected with the second end of the second wire; the first end of the third resistance-capacitance discrete device is connected with the first end of the first resistance-capacitance discrete device, and the second end of the third resistance-capacitance discrete device is connected with the first end of the second resistance-capacitance discrete device; the second end of the first wire and the second end of the second wire are used for being connected with an external computing power extension module. According to the computing device capable of expanding the computing power, the computing power expansion module can be connected to expand two signal channels, the signal transmission rate is improved, and signal interference is avoided.

Scalable Computing Device This description relates to a network chip (108) comprising: a programmable infrastructure (201) having a plurality of access points (202); at least one 3D plug communication interface adapted to interface with at least one 110 fragment chip, each 3D plug communication interface being connected to a corresponding access point (202); and a plurality of network-to-network communication interfaces (206, 208, 210, 212), each adapted to interface with another network chip (108). Figure for the abstract: Fig. 2

The invention relates to the technical field of extensible computing, in particular to a subunit system for AI extensible computing power, and the subunit system for the AI extensible computing power comprises a resource prediction and adjustment module, a task optimization scheduling module, a fault detection and recovery module and a micro-service management and recombination module. According to the method, through real-time monitoring and accurate analysis of AI task performance data, future resource demands are allowed to be effectively predicted, instant optimization of resource allocation is realized, and dynamic adaptability not only improves the resource utilization rate, but also prevents performance bottleneck caused by improper resource allocation, and improves the resource utilization rate. By continuously monitoring the running state and quickly identifying and solving potential faults, the stability and reliability of the system are remarkably enhanced, and the micro-service configuration is dynamically adjusted, so that the system can keep the highest efficiency under different service loads, and particularly, the system can keep high performance when a large number of tasks are processed in parallel; therefore, the processing speed and the cost efficiency are remarkably improved.

The present invention discloses a multi-core neural network tensor processor with scalable computing power, comprising a PCIE controller, M MTC cores and M SDRAM controllers; each MTC core includes S STC cores, and each STC core includes L LTC cores; wherein the LTC core is the minimum computing module, and all LTC cores in the same multi-core neural network tensor processor are configured as the same functional module; the PCIE controller is used to implement access control between the multi-core neural network tensor processor and external devices; the SDRAM controller is used to correspond to the MTC core's access to an off-chip SDRAM memory. The multi-core neural network tensor processor of the present invention adopts a modular reuse design scheme, and forms a neural network tensor processor with a certain computing power specification by repeatedly calling the minimum computing module and combining these minimum computing modules together; this structure can greatly reduce the complexity of design and verification.

A system for repeatable and flexible predictive analysis of very large data sets using a distributed computational graph using a domain specific language for pipeline and resource declaration has been developed. Data receipt software receives data from one or more sources. In a declared data pathway, data formalization software formats input data for storage, enrichment, or continued processing. An event analysis server inspects stored data for trends, situations, or knowledge. Aggregated data is passed to event message store and data stream handler software. Transformation pipeline software stores, triggers, executes and monitors declared transformation steps and pipelines to manipulate and act on bulk data and data streams, provides results and enables dynamic model and routine re-training and learning.

A data management system (DMS) may support the backing up of scalable computing objects, such as hierarchical computing objects. For example, the DMS may backup a computing system and facilitate that capture and storage of snapshots of the computing system. The DMS may determine to capture a first snapshot of a computing object within the computing system. The DMS may identify components corresponding to respective portions of the computing object and cause the computing system to generate respective snapshots of the components. That is, the DMS may cause the computing system to generate multiple individual snapshots that together may constitute snapshot of the computing object. The DMS may generate the first snapshot that includes metadata for the snapshots of the components. The metadata may include a first identifier for the first snapshot and respective identifiers for the respective snapshots of the components.

The present application relates to a computing system, a model training method and apparatus, and a product. The computing system relates to a computing unit, and the computing unit comprises: a main board, which is configured with a central processing unit (CPU); and a base board, which is connected to the main board by means of a first communication link, wherein the base board is configured with a plurality of accelerator cards, and the plurality of accelerator cards are connected to each other by means of a second communication link. The main board is used for splitting a training task of a target model into a plurality of concurrent model training tasks and releasing same to the plurality of accelerator cards, and processing training results of the plurality of accelerator cards, so as to obtain a trained target model. The plurality of accelerator cards are used for concurrently executing the respective model training tasks thereof, so as to obtain the training results. The computing system forms an elastically scalable computing system architecture by means of modular base-board design and interconnection, such that the computing power and bandwidth of the computing system can match model training tasks at different parameter scales.

Data processing system for real-time processing and analysis of distributed data in scalable computer networks, comprehensive a plurality of processing units distributed from one another, a data stream acquisition unit for the continuous recording of incoming data streams, a coordinating control unit for assigning data processing tasks to the processing units, as well as an intermediate storage unit for the temporary storage of data and processing results, characterized by the fact that The data processing system has a hardware-implemented synchronization and consistency control unit, which is set up to synchronize time-distributed data streams in real time using deterministic timestamp mechanisms and to physically suppress inconsistent data states before further processing, with the processing units performing parallel analysis processes and the results being merged into a consistent global state space.

The present invention discloses a neural network accelerator and a neural network acceleration method based on structured pruning and low-bit quantization. The neural network accelerator includes a master controller, an activations selection unit, an extensible calculation array, a multifunctional processing element, a DMA, a DRAM and a buffer. The present invention makes full use of the data reusability during inference operation of a neural network, reduces the power consumption of selecting input activation and weights of effective calculations, and relieves the high transmission bandwidth pressure between the activations selection unit and the extensible calculation array through structured pruning and data sharing on the extensible calculation array, reduces the number of weight parameters and the storage bit width by combining the low-bit quantization technology, and further improves the throughput rate and energy efficiency of the convolutional neural network accelerator.

The application discloses a kind of based on distributed scheduling's real-time monitoring Spark engine output progress method and platform, belong to information technology field, including: task creation, task execution and progress monitoring and task state and progress monitoring display.The application integrates distributed scheduling and Spark computing engine, adopts MasterServer, WorkerServer and SeaTunnel engine to carry out task execution and progress monitoring, obtains relevant information of output progress from Spark computing engine end in real time and sends back to scheduling system, so that user can see the output progress condition of task in real time from the page of scheduling monitoring conveniently while using reliable and stable performance scheduling ability and high-performance scalable computing ability, improve data reconciliation efficiency, reduce data operation cost.

The technology disclosed in this patent document can be implemented to combine quantum computing and classical digital computing in a scalable computing system based on superconducting qubits using Josephson junctions that exhibit low dissipation long coherence times and can be fabricated with well-developed integrated circuit fabrication techniques. More specifically, the disclosed technology can be implemented by using two radio frequency (RF) superconducting quantum interference device (SQUID) circuits coupled in balance to preserve general symmetry and form a quantum readout circuit for reading and digitizing a superconducting qubit state with improved readout fidelity and sensitivity.

The invention provides a rail transit ATS system based on a cloud native stateless multi-activity architecture, which adopts the technical scheme that a rail transit ATS application is transformed into the stateless multi-activity architecture from stateful active-standby switching, and is characterized in that a client layer is used for separating state data management and service logic of the rail transit ATS system; the stateless service cluster is composed of a plurality of elastic scalable computing nodes and is used for processing service logic and managing temporary data of high-frequency access; the configuration center is used for uniformly managing configuration parameters of all modules of the system and supporting hot update and gray release; the stateless service layer is used for managing the full life cycle of service state data and automatically adjusting the number of computing nodes based on system performance indexes monitored in real time; the message middleware is used for guaranteeing high concurrent processing and real-time message transmission among layers of the system through asynchronous communication; and the persistent storage layer is used for persistently storing business key data of the rail transit ATS system by adopting a multi-type storage engine and providing data backup and disaster recovery support.

A method and system for leveraging an existing issuer user application, associated with a payment network, to create centralized merchant loyalty platform. The centralized merchant loyalty platform consolidates computing resources from different merchant systems to a centralized processing system. The centralized processing system creates a scalable computing platform that allows for loyalty programs associated with a plurality of different merchants to be seamlessly accessed through the existing issuer user application.

The invention provides a key generation method based on a scalable operation data path and a password processing core system, and the method comprises the steps: determining plaintext data, initial key data, counter configuration parameters and encryption operation parameters based on key generation demand information; generating counter block data based on the counter configuration parameters, and generating a plurality of round keys based on the initial key data; based on the counter block data and the round key, a scalable operation data path carries out multi-level folding operation according to a folding factor and a pipeline series under preemptive release logic to generate intermediate key data, and carries out synchronous buffer alignment processing on the plaintext data based on the pipeline series to obtain aligned plaintext data; and based on the intermediate key data, performing bitwise XOR operation on the aligned plaintext data to generate target key data. By means of the method, the effects of high performance, resource adaptation, accurate synchronization, continuity and reliability during key generation are achieved.

The content of the invention can provide an extensible artificial intelligence system. The system includes a plurality of slots on a mainboard, at least one artificial intelligence module mounted in the slots to perform artificial intelligence operations, and a main processor controlling the entire system. A user can adjust the number of the artificial intelligence modules according to needs, and the overall artificial intelligence calculation performance of the system is flexibly expanded. Each artificial intelligence module can be provided with a low-power-consumption neural processing unit specially used for artificial intelligence operation, and standard appearance specifications (such as M.2 and E1. S) are adopted, so that economical efficiency and expandability are improved. This can solve the limitation problems of high power consumption and high cost of a GPU-based system, and efficiently support various artificial intelligence applications.

This invention discloses a circuit structure that enables data sharing between computing units, a method for optimizing computing performance and energy efficiency across multiple computing units using this structure, and a scalable computing system based on the combination of these multiple computing units. This invention enables data reuse and sharing during computing, reducing repeated data read and write operations, thereby improving computing system energy efficiency.

Systems and methods for processing orders for products customized in a store are disclosed herein. An example system may include a management system, a plurality of micro-services, and an in-store custom order platform. The management system may be associated with a customized store within a store providing a product. The plurality of microservices may include at least a virtual queue system, a commerce platform, an event proxy system, and a user messaging system. The in-store customized order platform may be configured to integrate functions of the management system and the plurality of micro-services to perform operations to process orders of products customized in the store using a self-service terminal application executing on a self-service terminal device.