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A low dropout linear regulator

A low-dropout linear voltage regulator technology, applied in the direction of instruments, electric variable adjustment, control/regulation systems, etc., can solve the problems of complex structure of low-dropout linear voltage regulators, achieve low power consumption, fast transient response, The effect of simple structure

Inactive Publication Date: 2011-12-14
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to solve the problem of complex structure of the existing fast load transient response low dropout linear voltage regulator, and propose a low dropout linear voltage regulator

Method used

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Embodiment Construction

[0013] The present invention will be further elaborated below in conjunction with the accompanying drawings and specific embodiments.

[0014] The structure diagram of the low dropout linear voltage regulator of the present invention is as follows figure 1 As shown, it includes the error amplifier slew rate enhancement circuit and the feedback sampling network, and the slew rate enhancement circuit is integrated between the error amplifier and the output VOUT, and CF1 and CF2 are used for Miller compensation and phase lead compensation respectively.

[0015] The overall circuit diagram of the LDO of the present invention is as figure 2 , a low-dropout linear voltage regulator, including an error amplifier, a feedback sampling network, a bias circuit and a slew rate enhancement circuit, a part of the slew rate enhancement circuit is included in the error amplifier, and the error amplifier includes a first PMOS transistor MP1, a second Two PMOS transistors MP2, the first NMOS ...

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Abstract

The invention discloses a low dropout linear regulator. Aiming at the problem of complicated structure of the existing low-dropout linear regulator, the LDO of the present invention includes an error amplifier, a feedback sampling network, a bias circuit and a slew rate enhancement circuit, and is characterized in that a part of the slew rate enhancement circuit is included in the error amplifier Among them, the error amplifier includes a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, and a fourth NMOS transistor; wherein the first NMOS transistor and the second NMOS transistor serve as slew rate enhancement As a component of the circuit, the slew rate enhancing circuit further includes a first capacitor and a second capacitor. The voltage stabilizer of the present invention constitutes a slew rate enhancement circuit through two NMOS transistors and two capacitors, does not require too many additional auxiliary circuits, has a simple structure and low power consumption, and can be applied without reducing performance. Under low voltage, it has extremely fast transient response.

Description

technical field [0001] The invention belongs to the technical field of power supply management, and in particular relates to the design of a low dropout linear regulator (LDO, Low Dropout Regulator). Background technique [0002] As a solution to improve static power consumption and battery life of full battery-operated devices, power management modules play a very important role. As an important type in power management modules, LDOs are widely used because they can provide low-noise, high-precision power supply voltages for noise-sensitive analog modules. With the wide application of portable devices, new requirements are put forward for the performance of LDO: lower power consumption, that is, smaller quiescent current; better transient response, that is, better compensation method and topology. [0003] For low voltage, capless LDOs that can only integrate limited load capacitance, various slew rate enhancement circuits have been proposed to achieve fast load transient ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05F1/56
Inventor 周泽坤胡志明王会影石跃明鑫张波
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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