382results about How to "Save wiring space" patented technology

The invention discloses a pixel driving circuit for an active organic light-emitting diode (OLED) display and a driving method thereof. The pixel driving circuit comprises a driving transistor, three switch transistors, a storage capacitor and an OLED, wherein the drain electrode of a first transistor is connected with a data line; the grid electrode of the first transistor is connected with a first scanning control line; the source electrode of the first transistor is connected with the end A of the storage capacitor; the drain electrode of a second transistor is connected with the source electrode of a third transistor; the grid electrode of the second transistor is connected with the end A of the storage capacitor; the source electrode of the second transistor is connected with the drain electrode of a fourth transistor and the end B of the storage capacitor and is grounded through the OLED; the drain electrode of the third transistor is connected with a power wire; the grid electrode of the third transistor is connected with a light-emitting control line; the grid electrode of the fourth transistor is connected with a second scanning control line; and the source electrode of the fourth transistor is grounded. The pixel driving circuit of the invention can effectively compensate the non-uniformity of threshold voltages of the transistors and the degradation of a starting voltage of the OLED so as to realize uniform display screen brightness of the OLED and high contrast ratio.

The invention discloses a grid driving circuit and a driving method thereof and a display device, and relates to the field of displaying. The grid driving circuit can reduce wiring space and realize frame narrowing of a panel and is particularly applicable to small-size panels. The grid driving circuit comprises a shifting register and a control unit, wherein the control unit is connected with an input end of the shifting register and used for converting first pulse signals output by the shifting register into multiple second pulse signals which are respectively used for driving a multiple grid lines.

The present invention provides a shift register unit and a gate driving circuit, wherein the shift register unit and the gate driving circuit are provided for reducing noise interference, improving shift register stability, and reducing a size of the shift register unit. The shift register unit comprises: an input module for responding to an input signal and providing a first voltage signal for an input module of an output terminal; a reset module for responding to a reset signal and providing a second voltage signal for a first node adopted as an input module output terminal in the input module; an output module for responding to a voltage of the first node, and providing a first clock signal for an output module of the output terminal; a pull-down control module for responding to a second clock signal, providing the second clock signal for a second node, responding to the voltage of the first node or the output terminal, and providing a power supply negative voltage for a second node; and a pull-down module for responding to a voltage of the second node, and providing the power supply negative voltage for the first node and the output terminal.

The invention relates to an LCD (liquid crystal display) data driven IC (integrated circuit) output compensation circuit and a compensation method. The circuit comprises a data driven IC, a plurality of first switching unit and a delay control unit. A plurality of output channels of the data driven IC are respectively connected with pixel electrodes on corresponding lines in a glass substrate through data lines and output charging signals to charge the pixel electrodes on the corresponding lines; each output channel is provided with one first switching unit for controlling the output channel on which the first switching unit is positioned according to delay control signals generated by the delay control unit and outputting the charging signals according to preset delayed time; and the delay control unit generates the corresponding delay control signals according to impedance values of the corresponding data lines so as to control to start the corresponding first switching unit according to the preset delayed time and ensure each pixel electrode to have equal charging time. The LCD data driven IC output compensation circuit does not need to be wound with a wire; the routing space of the glass substrate is reduced, the LCD data driven IC output compensation circuit is beneficial to the design of a narrow border of a liquid crystal display, and the EMI (Electro Magnetic Interference) problem generated when all the output channels are simultaneously opened are improved.

A spread illuminating apparatus includes: a light conductor plate; at least one LED disposed at a side surface of the light conductor plate; an FPC including a substrate and first and second conductive patterns formed respectively at the front ad rear surfaces of the substrate; and a heat radiating plate to hold the FPC. The LED is mounted on electrode pads formed at the first conductive pattern of the FPC, and all the side faces of the LED are covered with an individual thermal conductor enclosure which is connected to the second conductive pattern via an opening formed at the substrate of the FPC. Thus, a heat radiation system is established from the side faces of the LED through to the heat radiating plate which is affixed to the rear surface of the FPC.

The present disclosure relates to the technical field of communication. There is provided a shift register unit and a gate driving circuit for decreasing noise interferences, enhancing stability of the shift register unit, and at the same reducing the size of the shift register unit. The shift register unit comprises: an input module configured to provide a first voltage signal to an output terminal in response to an input signal; a reset module configured to provide a second voltage signal to a first node as an output terminal of the input module in the input module in response to a reset signal; an output module configured to provide a first clock signal to the output terminal in response to a voltage at a first node; a pull-down control module configured to provide a second clock signal to a second node in response to the second clock signal and provide a power supply negative voltage to the second node in response to the voltage at the first node or the voltage at the output terminal; and a pull-down module configured to provide the power supply negative voltage to the first node and the output terminal in response to the voltage at the second node.

The embodiment of the invention provides a shift register unit circuit, a shift register, an array substrate and a display device and belongs to liquid crystal display technologies. According to the shift register unit circuit provided by the embodiment of the invention, a relatively small number of thin film transistors are adopted and are used for inhibiting interference noises in the circuit, so that the wiring space is reduced while the signal transmission function and the noise reduction function of a shift register unit are realized, the area occupied by the shift register unit circuit is reduced, and thus, a narrow border for a liquid crystal display with the shift register is realized.

The invention relates to a light emitting diode (LED) driving system and the method thereo for driving a light emitting diode shine continuously and steadily. The invention is mainly formed by that a direct current voltage source circuit supplies direct current power source to the light emitting diode. By a constant-voltage and constant-current regulator, an alternating current power source comprising a domestic power source is used efficiently, the light emitting diode is driven to shine continuously with constant power, and a plurality of light emitting diodes can still be driven by one driver for keeping the equal constant power.

The invention provides a shifting register unit, a gate drive circuit and a display device, which are used for suppressing interfering noise caused by the change of alternating-current clock signals and improving the stability of the shifting register unit. The shifting register unit comprises an input module for responding to an input signal and charging a pull-up node, a pull-down module for responding to a voltage signal of a pull-down node and providing a low voltage signal for the pull-up node and an output terminal, a pull-down driving module for responding to a voltage signal of the pull-up node and discharging to the pull-down node, an output module for responding the voltage signal of the pull-up node and providing a first clock signal for the output terminal, and a reset module for responding to a second clock signal and discharging to the output terminal.

The invention discloses a liquid crystal display (LCD) driving circuit, a data driving chip, a liquid crystal panel and a liquid crystal display device. The LCD driving circuit comprises the data driving chip which is provided with a plurality of output ends, and a plurality of data cables which are respectively connected with the output ends of the data driving chip; an output resistor is respectively arranged between each output end of the data driving chip and each data cable; not all the equivalent resistance of the data cables is the same; and the equivalent resistance of each data cable and the sum of the corresponding output resistors is equal. According to the invention, because the output resistors are adopted to replace snake-shaped windings, the widths that the output resistors occupy are smaller than those of the snake-shaped windings, a wiring space of a glass substrate can be reduced, and the design of a narrow frame is realized; and in addition, because more data cables can be laid in the frame with a unit of width, the cost can be reduced.

The invention relates to a magnetic resonance three-component noise removing device. The magnetic resonance three-component noise removing device is formed through a structure. The structure is characterized in that an upper computer is connected with a transmitting coil through a control system, a transmitting circuit and a resonance matching capacitor; the transmitting circuit is connected with a power supply; the control system is connected with a receiving coil and a reference coil respectively through an A / D (Analog to Digital) collection and amplification circuit and a conditioning circuit. The magnetic resonance three-component noise removing device is applicable to a detection area with complex and changeable environment noise and uneven space distribution of the noise; due to the adoption of relevance between x-component signals, y-component signals and z-component signals which are sensed by coils paved in the same detection place, the z-component noise is removed, then filtered and processed to obtain reliable magnetic resonance signals, so that the wiring space is greatly saved and the processing result is flexible and accurate; in particular, when sharp-peak noise with great amplitude exists, the noise removing effect is excellent. Through the magnetic resonance three-component noise removing device, the influence of strong electromagnetic interference near the cities, the villages and the water-deficient areas is eliminated, and the problem of limited application of a nuclear magnetic resonance underground water detection method is solved.

The invention discloses a liquid crystal display panel and a repairing method of the liquid crystal display panel. The liquid crystal display panel comprises a data wire, a scanning line crossed with the data wire, a testing subassembly positioned in a signal wire setting area, and a repairing wire subassembly positioned in the signal wire setting area, wherein the repair wire subassembly comprises a first repairing wire set and a second repairing wire set, when the repairing is not performed, the first repairing wire set is separated from the corresponding front end data wire; the second repairing wire set is separated from the corresponding testing data wire; when the repairing is performed, the first repairing wire set is electrically connected with the corresponding front end data wire; and the second repairing wire set is electrically connected with the corresponding testing data wire. With the adoption of the technical scheme, the same routing is effectively utilized; a static protective circuit is adopted, therefore, the static protection function is achieved, and a wire repairing validating loop is added for timely validating.

The invention relates to an LED display screen with same-color chips arrayed diagonally and a method for reusing pixels. The three-primary-color LED chips of the display screen are respectively transversely and longitudinally linearly arranged equidistantly, the same-primary-color LED chips are arranged to form diagonals, and the corresponding three-primary-color LED chips are equidistantly, sequentially, alternately and diagonally arranged in the direction perpendicular to each diagonal. The method for reusing the pixels includes corresponding to primary-color display data of an optional LED chip to primary-color display data of n adjacent pixels of an image source, adding the primary-color display data of the n adjacent pixels to obtain a sum, and dividing the sum by the number n to obtain display data of the LED chip; transmitting acquired display data of the various three-primary-color LED chips to the display screen via a scanning driving circuit so that the display data can be displayed on the display screen. The LED display screen and the method have the advantages that the circuit board wire arrangement pressure is effectively relieved, the production cost can be greatly lowered, the production efficiency is improved, and the LED display screen and the method are particularly applicable to ultrahigh-density LED display.

The embodiment of the invention provides a shift register unit and a gate drive circuit. The gate drive circuit is used for reducing the dimensions of the shift register unit and simultaneously can provide stable output signals and effectively maintain the potential of an output end. The shift register unit comprises an input unit, an output unit, a pull-up unit, a pull-down control unit and a pull-down unit, wherein the input unit is used for responding to input signals and providing the input signals to the output unit; the output unit is used for responding to the voltage of a first node and providing a first clock signal to an output terminal; and the pull-up unit is used for responding to the voltage of the first nose and providing the first clock signal to the first node; the pull-down control unit is used for responding to the first clock signal, a second clock signal and the voltage of the first node and providing the first clock signal, the second clock signal and the voltage of a negative power pole to the pull-down unit; and the pull-down unit is used for responding to the voltage of a second node and providing the voltage of the negative power pole to the first node and the output terminal.

The invention discloses a display panel and a display device. The display panel is provided with a first display area, a second display area and a transition display area, and the display panel comprises a first pixel unit, a third pixel unit, a first pixel circuit unit and a third pixel circuit unit. The first pixel unit is located in the first display area; the third pixel unit is located in thetransition display area; the first pixel circuit unit is located in the transition display area, and the first pixel circuit unit is electrically connected with the first pixel unit; the third pixelcircuit unit is located in the transition display area, the third pixel circuit unit is electrically connected with the third pixel unit, the transition display area is divided into a plurality of subareas, and each subarea is an area occupied by one corresponding third pixel unit; each subarea contains the third pixel circuit unit electrically connected with the corresponding third pixel unit andat least one first pixel circuit unit. According to the display panel provided by the embodiment of the invention, wiring structures in the first display area are reduced, so that the light transmittance of the first display area is improved.

The invention discloses a thin film transistor liquid crystal display device which comprises a plurality of pixel areas, wherein each pixel area comprises a thin film transistor, a transparent electrode, a pixel electrode and a shading electrode; each pixel electrode passes through each thin film transistor, is coupled with scanning lines and data wires, is overlapped with each transparent electrode, is insulated to each transparent electrode, and is overlapped with the scanning line at a former row or the scanning line at a latter row; each shading electrode is insulated to each pixel electrode; the edges of each shading electrode and each pixel electrode are overlapped at least partially; each shading electrode is insulated to the data wire, and is overlapped with the data wire; and each transparent electrode and each shading electrode are electrically connected with the scanning line at the former row or the scanning line at the latter row. According to the invention, the thin film transistor liquid-crystal display device leaves out a storage electrode wire occupying routing space of the conventional liquid-crystal display device, reserves the shading electrode, so that the aperture opening ratio of the pixels is increased.

The invention discloses a panel function test circuit, a display panel, a function testing method and an electrostatic protection method. The invention settles a problem that a relatively large wiring space is occupied by the panel test circuit and the electrostatic protection circuit of the display panel in the prior art. The panel function test circuit comprises a first subcircuit and a second subcircuit which are electrically connected with a same data line of the display panel. The first subcircuit and the second subcircuit are used for supplying testing signals to the data line of the display panel in a testing state; or used for performing electrostatic discharging on electrostatic signals transmitted by the data line of the display panel in an operation state. In an embodiment of the invention, the panel function test circuit is compatible with an electrostatic protection function. The number of the elements and corresponding wirings are reduced, thereby saving wiring space.

The invention discloses a wiring method of a differential signal line and a PCB. The wiring method includes: rectangular fiberglass fabrics are provided, and the fiberglass fabrics are formed by fiberglass mutually woven in a staggered manner and adhesives filled between the fiberglass; the wiring direction of the differential line is determined, and the bundle number of the fiberglass of the fiberglass fabrics in the direction is obtained; the wiring direction comprises the length direction or the width direction of the fiberglass fabrics; the fiberglass fabrics are divided into fiberglass units with the number equal to the bundle number in the wiring direction, the width of the fiberglass units is obtained according to the dimension and the quantity of the fiberglass fabrics in the direction vertical to the wiring direction, and the fiberglass units comprise fiberglass in the wiring direction and the adhesives; the line distance and the line width of the differential signal line are determined according to the width of the fiberglass units; and wiring is performed on a metal layer along the wiring direction according to the line distance and the line width to form the required differential signal line, and the metal layer is pasted on the surface of the fiberglass fabrics. According to the method, the problems of high cost, large occupied wiring space, and long wiring time of the conventional control differential signal delay wiring method are solved.

The invention discloses an organic light emitting diode display array. According to the organic light emitting diode display array, through changing the time sequence control relationship and circuit connection relationship of organic light emitting diode pixel units, organic light emitting diode sub pixels of adjacent lines can share signals of scanning lines arranged in the middle of the two. On the premise of not reducing the performances of a pixel compensation circuit, wiring of N-1 scanning lines can be reduced for N lines of sub pixel unit arrays, wiring density can be greatly reduced, and the wiring space is saved.

The invention relates to an array substrate and a display device. The array substrate comprises a substrate, a driving circuit and N rows of light emitting units, wherein the driving circuit is arranged on the substrate; the N rows of light-emitting units are arranged on one side, far away from the substrate, of the driving circuit; the driving circuit comprises N rows of driving circuit units anda plurality of first scanning signal lines; the projection of one of the first scanning signal lines on the substrate is located in a first area, wherein the first area is the area between the projection of the first row of light emitting unit of any two adjacent rows of light emitting units in the N rows of light emitting units on the substrate and the projection of the second row of light emitting unit on the substrate; and the grid electrode of a second transistor of the first row driving circuit and the grid electrode of a first transistor of the second row driving circuit are connected to the corresponding first scanning signal lines.

The invention provides an array substrate and a display device, and belongs to the technical field of display. The array substrate and the display device can solve the problem that an existing display device is low in resolution. The array substrate comprises multiple sets of data lines and multiple sets of grid lines, wherein the data lines and the grid lines are ranked in an intersecting mode, one set of data lines are arranged between every two adjacent pixel units, each set of data lines comprise the first data line and the second data line, each set of grid lines comprise the first grid line and the second grid line, and the pixel units are limited at the intersections of the first grid lines and the first data lines and the intersections of the second grid lines and the second data lines. The first data line in each set of data lines is arranged on a first data line layer, the second data line in each set of data lines is arranged on a second data line layer, and the projection of the first data line and the projection of the second data line on the array substrate do not coincide. The display device comprises the array substrate.

The invention discloses an SoC chip security design method, and the method comprises the following steps: setting a security storage area in an SoC chip to store security configuration information; obtaining entities of all stages of SoC chip starting, creating a security mirror image file and generating security configuration information; taking first-stage boot firmware on an SoC chip as a root of trust, acquiring a mirror image of a next stage at a current stage, and performing digital signature verification; if verification succeeds, the mirror image is trusted, the mirror image is loaded, and starting is executed; if verification fails, tampering the mirror image, and terminating the starting process. The verification of the bootstrap program, the operating system and the application program is realized by means of encryption and digital signature, the security and credibility of firmware and software are ensured, the key is safely stored, and the security is improved.

A packaging substrate structure with an electronic component embedded therein and a fabricating method thereof are disclosed. The packaging substrate structure comprises a core plate; a first built-up structure disposed on a surface of the core plate and comprising a first dielectric layer and a first circuit layer disposed on the first dielectric layer; a second built-up structure disposed on the first built-up structure, wherein a cavity is disposed in the second built-up structure to expose the first built-up structure; an electronic component disposed in the cavity, wherein the electronic component has an active surface having a plurality of electrode pads and an inactive surface facing the first built-up structure; and a solder mask disposed on the surfaces of the second built-up structure and the electronic component, and having a plurality of first openings to expose the electrode pads of the electronic component.

The invention discloses a device with the terminal communication noise suppression function, a method and a communication terminal, and the device comprises a main control chip of the terminal, a first analog switch, a main microphone used for collecting non-earphone communication sound and a reference microphone used for collecting communication noise of the terminal; wherein an output end of the first analog switch is connected with a first microphone interface of the main control chip of the terminal, and the main microphone and the reference microphone are respectively connected with two input ends of the first analog switch; and the main control chip of the terminal is used for controlling the first analog switch to communicate the main microphone and the reference microphone with the main control chip through the time division multiplexing way and collecting the communication sound of the main microphone and the communication noise of the reference microphone for carrying out noise suppression treatment. The device, the method and the communication terminal can reduce the wiring space of a mainboard and effectively save hardware cost while effectively suppressing the communication background noise.

The invention discloses an array substrate and a preparation method thereof. The array substrate comprises a substrate, a buffer layer, a semiconductor pattern layer, a first grid electrode insulation layer, a second grid electrode insulation layer, a first conductive pattern layer, an interlayer insulation layer and a second conductive pattern layer, wherein the substrate comprises a thin-film transistor region and a capacitor region; the buffer layer is formed on the substrate; the semiconductor pattern layer is formed on the buffer layer and comprises a source and drain electrode region and a first electrode; the first grid electrode insulation layer is formed on the semiconductor pattern layer and correspondingly covers regions, except the first electrode, of the thin-film transistor region and the capacitor region; the second grid electrode insulation layer is formed on the first grid electrode insulation layer; the first conductive pattern layer is formed on the second grid electrode insulation layer and comprises a grid electrode and a second electrode; the interlayer insulation layer is formed on the first conductive pattern layer; the second conductive pattern layer is formed on the interlayer insulation layer and comprises a source electrode and a drain electrode which are coupled with the source and drain electrode region as well as a third electrode. With the adoption of the array substrate and the preparation method thereof, the capacitance of a capacitor is increased, film layer structures of the regions except the capacitor region are not changed, the signal line load is effectively decreased, and meanwhile, short-circuit risks of upper and lower film layers of the grid electrode insulation layers are reduced.

The invention relates to a printed circuit board, which comprises a signal layer and a grounding layer close to the signal layer; a pair of difference transmission lines is arranged on the signal layer; a common-mode filter is arranged on the grounding layer and comprises two filtering parts positioned on the two sides of the difference transmission lines projected on the grounding layer; each filtering part is formed by connecting a plurality of mutually-parallel strip copper foils in an end-to-end manner at intervals; and a hollow area on the two filtering parts is communicated with a strip hollow area. The common-mode filter is applied to the printed circuit board, and a common-mode signal running through the difference transmission lines can be effectively filtered out.

An image sensor module package structure with a supporting element comprises a chip, the supporting element and a light-transmitting element. The chip has light-sensing elements arranged on a light-sensing area of a first surface thereof, first conducting pads electrically connected to the light-sensing elements, and a conducting channel passing through the chip and electrically connected to the first conducting pads at one end. The supporting element has an opening, a first coupling surface, and a second coupling surface. The opening corresponds to the light-sensing area and the first coupling surface is combined with the first surface of the chip while the light-transmitting element is combined with the second coupling surface. The supporting element separates the light-transmitting element from the chip by a proper distance, so as to enhance an image sensing accuracy of an image sensor module. The chip having the conducting channel effectively facilitates reducing an overall volume of the image sensor module package structure.

The invention relates to a capacitive electromagnetic flowmeter. A sensor of the capacitive electromagnetic flowmeter comprises a high-dielectric-constant industrial ceramic liner and a non-contact plated metal detecting sheet electrode. The sensor is provided with two opposite excitation coils serially connected to excite the inside of the sensor. The metal detecting electrode and a metal shielding electrode are connected to input and output ends of an operational preamplifier respectively to allow for equipotential shielding. A timing control circuit controls a switch of a full-bridge inverter circuit and an analog switch of a flow signal processing circuit according to logic signals of exciting current so as to control the exciting current in the coils and process the flow signals. The full-bridge inverter circuit is capable of enhancing the exciting current to increase the signal-to-noise ratio of the flow signals while inhibiting differential disturbing influence. The full-bridge inverter circuit is used with the timing control circuit to centrally control the power switch of the inverter circuit and the analog switch of the flow signal processing circuit, differential disturbance in the flow signals are removed accurately, and reliable detection on fluid flow is realized finally.