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Shift register unit and gate driving circuit

A shift register and gate connection technology, applied in the field of communication, can solve the problems of circuit interference noise, large size of shift register unit, large volume of liquid crystal display, etc.

Active Publication Date: 2013-07-31
BOE TECH GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the change of each AC clock signal in the gate drive circuit will cause interference noise in the circuit, affecting the output of the signal and the stability of the shift register unit; at the same time, more thin film transistors require a larger wiring space, making The size of the entire shift register unit is large, which in turn leads to a large volume of the liquid crystal display

Method used

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  • Shift register unit and gate driving circuit
  • Shift register unit and gate driving circuit
  • Shift register unit and gate driving circuit

Examples

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Embodiment Construction

[0021] The embodiment of the present invention provides a shift register unit and a gate drive circuit, which are used to suppress the interference noise caused by the change of the AC clock signal, adopting the DC pull-down mode, which can effectively improve the stability of the shift register unit, and at the same time Reduce the size of the shift register cell.

[0022] The present invention will be described below in conjunction with the accompanying drawings.

[0023] Embodiment 1 of the present invention provides a shift register unit, the structure of which is as follows figure 2 shown, from figure 2 It can be seen that the registers include: an input module 201, a reset module 202, an output module 203, a pull-down control module 204 and a pull-down module 205;

[0024] The input module 201 is respectively connected to the input signal terminal, the first voltage signal terminal, and the output terminal, and is used to provide the first voltage signal input from t...

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PUM

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Abstract

The present invention provides a shift register unit and a gate driving circuit, wherein the shift register unit and the gate driving circuit are provided for reducing noise interference, improving shift register stability, and reducing a size of the shift register unit. The shift register unit comprises: an input module for responding to an input signal and providing a first voltage signal for an input module of an output terminal; a reset module for responding to a reset signal and providing a second voltage signal for a first node adopted as an input module output terminal in the input module; an output module for responding to a voltage of the first node, and providing a first clock signal for an output module of the output terminal; a pull-down control module for responding to a second clock signal, providing the second clock signal for a second node, responding to the voltage of the first node or the output terminal, and providing a power supply negative voltage for a second node; and a pull-down module for responding to a voltage of the second node, and providing the power supply negative voltage for the first node and the output terminal.

Description

technical field [0001] The invention relates to the field of communication technology, in particular to a shift register unit and a gate drive circuit. Background technique [0002] The thin film transistor liquid crystal display (TFT-LCD) driver mainly includes a gate driver and a data driver. Among them, the gate driver converts the input clock signal through the shift register unit and then adds it to the gate line of the liquid crystal display panel. The gate drive circuit It can be formed on the LCD panel with the same process as the TFT and simultaneously with the TFT. The gate driving circuit includes a shift register unit having multiple stages, and each stage is connected to a corresponding gate line to output a gate driving signal. The stages of the gate drive circuit are connected to each other, the start signal is input to the first stage of each stage and the gate drive signal is sequentially output to the gate line, wherein the input terminal of the previous s...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C19/28G09G3/36
CPCG11C19/28G09G3/3648G09G3/3674G09G2300/04G09G2310/0286G09G2310/08
Inventor 李付强李成安星俊
Owner BOE TECH GRP CO LTD
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