Array substrate and display device

Abstract

The invention provides an array substrate and a display device, and belongs to the technical field of display. The array substrate and the display device can solve the problem that an existing display device is low in resolution. The array substrate comprises multiple sets of data lines and multiple sets of grid lines, wherein the data lines and the grid lines are ranked in an intersecting mode, one set of data lines are arranged between every two adjacent pixel units, each set of data lines comprise the first data line and the second data line, each set of grid lines comprise the first grid line and the second grid line, and the pixel units are limited at the intersections of the first grid lines and the first data lines and the intersections of the second grid lines and the second data lines. The first data line in each set of data lines is arranged on a first data line layer, the second data line in each set of data lines is arranged on a second data line layer, and the projection of the first data line and the projection of the second data line on the array substrate do not coincide. The display device comprises the array substrate.

Description

technical field [0001] The invention belongs to the field of display technology, and in particular relates to an array substrate and a display device. Background technique [0002] Thin Film Transistor Liquid Crystal Display (TFT-LCD for short) is a main flat panel display (Flat Panel Display, FPD for short). It has become a mainstream product in the market. [0003] Currently in the TFT-LCD industry, display devices with ultra-high-definition and ultra-narrow bezels have become the technological development trend of enterprises. Especially for large-sized display panels, for example, a resolution of 4K*2K, or even a resolution of 8K*4K has become the mainstream in the market. However, in order to increase the resolution, the first technical problem to be overcome is the guarantee of pixel charging ratio. Since the resolution is positively correlated with the number of pixel units per unit area, the higher the resolution of the display panel, the more the number of pixel ...

AI Technical Summary

Problems solved by technology

[0005] The inventors found that there are at least the following problems in the prior art: due to the doubling of the number of data lines, the black matrix (BM) shading width on the side of the data lines increases, thereby reducing the pixel aperture ratio, which in turn causes an increase in optical costs, such as figure 2 shown

Moreover, for ultra-narrow bezel display, it is necessary to minimize the size around the effective display area (AA, active area), which increases the difficulty of wiring around AA

At this time, since the number of data lines doubles, the space required for the fan-out area (Fan-out wiring area) will also increase accordingly.

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