Wafer bonding method and wafer bonding structure

A wafer bonding and wafer technology, applied in the manufacture of electrical components, electrical solid devices, semiconductor/solid devices, etc., can solve the problems of 3D integrated circuit failure, short circuit, etc., and achieve the effect of reducing the risk of short circuit

Active Publication Date: 2016-04-20
SEMICON MFG INT (SHANGHAI) CORP
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  • Abstract
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Problems solved by technology

[0003] refer to figure 1 , showing a side view of a method for bonding wafers in the prior art. The surface of the first wafer 01 is provided with a plurality of first bonding ends 03, and the surface of the second wafer 02 is provided with a plurality of second bonding ends. Bonding end 04, with the development of semiconductor technology, the density of the first bonding end 03 and the second bonding end 04 graduall

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  • Wafer bonding method and wafer bonding structure
  • Wafer bonding method and wafer bonding structure
  • Wafer bonding method and wafer bonding structure

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[0031] As described in the background art, in the manufacturing process of 3D integrated circuits, after the wafer bonding process, short circuits between bonding ends are likely to occur, which affects the bonding quality.

[0032] Analyze the causes of short circuits between the bonded ends, and continue to refer to figure 1 As shown, since the distance between the first bonding ends 03 on the surface of the first wafer 01 is small, the distance between the second bonding ends 04 on the surface of the second wafer 02 is relatively small, so that the first bonding ends 03 Or the metal ions in the second bonding end 04 such as figure 1 As shown by the dotted line in the middle, diffusion is prone to occur, so that short-circuiting between adjacent first bonding ends 03 or between adjacent second bonding ends 04 is likely to occur.

[0033] In addition, the first bonding end 03 and the second bonding end 04 are usually made of copper. Copper exposed to the air is easily corroded by o...

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Abstract

The invention provides a wafer bonding method and a wafer bonding structure. The wafer bonding method is characterized in that before the wafer bonding processing, an interlayer dielectric layer is formed on a wafer, and the interlayer dielectric layer comprises a first dielectric layer and an insulation layer, which are formed sequentially; an interconnection structure can be formed in the interlayer dielectric layer, and a part of the interconnection structure is protruded from the surface of the interlayer dielectric layer, and is a bonding end of the interconnection structure; and side walls are formed on the side walls of the bonding end. The wafer bonding method and the wafer bonding structure are advantageous in that the insulation layer is used to completely cover the surface of the interlayer dielectric layer, and the side walls are used to cover the side walls of the bonding end; after the bonding processing of a plurality of wafers, the adjacent bonding ends are provided with the insulation layers and the side walls for the isolation, and the short circuit is not easy to occur; and in addition, under the protection of the side walls, the bonding ends are not exposed in the external environment, and the oxide is not easy to form under the influence of the oxygen and the water vapour, and at the same time, the short circuit risk can be reduced.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a wafer bonding method and a wafer bonding structure. Background technique [0002] As a key technology of 3D integrated circuits, wafer-level copper-copper bonding (Waferlevel Cu-Cubonding) has an important application trend in high-end products. Wafer-level copper-copper bonding is an interconnection technology between wafers. Multiple wafers are aligned and bonded to each other, so that the copper interconnections on the surface of multiple wafers protrude from the bonding ends of the wafer surface. Bonding, so as to realize the electrical connection of multiple interconnection structures. [0003] refer to figure 1 , showing a side view of a method for bonding wafers in the prior art. The surface of the first wafer 01 is provided with a plurality of first bonding ends 03, and the surface of the second wafer 02 is provided with a plurality of second bonding ends. Bonding end 0...

Claims

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Application Information

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IPC IPC(8): H01L21/603H01L23/485
Inventor 王伟包德君陈政张海芳戚德奎李新张蓓蓓
Owner SEMICON MFG INT (SHANGHAI) CORP
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