The invention discloses a multi-micropacket parallel processing structure, which aims to solve the problem that in a single-micropacket processing structure, the bandwidth of a physical layer and a link layer is not matched, so that the speed of the processing of the chip of a node controller to the communication among processors is reduced. The multi-micropacket parallel processing structure comprises an interface conversion module, a receiving module, a receiving buffer area, a message distribution module, a first protocol layer message FIFO (First In First Out), a second protocol layer message FIFO, a link state machine, a message assembly module, a send buffer area, a retransmission buffer area and a sending module, wherein the interface conversion module works under a physical layer clock domain, other modules work under a link layer clock domain, the interface conversion module comprises asynchronous receiving FIFO and asynchronous transmission FIFO, and data paths in the receiving module and the sending module are multi-path parallel data paths aiming at multi micropackets, and can process the multi micropackets in parallel. According to the invention, the bandwidth of the physical layer/the link layer is matched, so that the speed of the processing of the chip of the node controller to the communication among the processors is improved.