The application relates to a high-power-supply-rejection low-
voltage-difference linear
voltage stabilizer based on
gate capacitance offset, which comprises an
error amplifier, a power tube M P , a feedback network R1 and R2, a load
capacitor C L , a
frequency compensation capacitor C M and a gate
capacitor offset circuit; the output end of the
error amplifier, the output end of the gate capacitor offset circuit, the gate of the power tube M P and one end of the
frequency compensation capacitor C M are connected; the other end of the
frequency compensation capacitor C M , the drain of the power tube M P , one end of the
resistor R1, one end of the load capacitor C L and the V OUT end are connected; the source of the power tube M P is connected to the V IN end; the other end of the load capacitor C L , one end of the
resistor R2 and the ground end GND are connected; the other end of the
resistor R1, the other end of the resistor R2 and the non-inverting input end V FB of the
error amplifier are connected. The application changes the
equivalent capacitance of a node by introducing a gate capacitor offset circuit at the output end of the error
amplifier, reduces the input-to-output
gain and improves the power supply rejection capability.