Band-gap reference source circuit and system with exponential curvature compensation

Abstract

The invention relates to the technical field of analog integrated circuits, in particular to an index curvature compensation band-gap reference source circuit and system. Comprising a band-gap core sub-circuit, an index curvature compensation sub-circuit, a power interface and a voltage interface, wherein the band-gap core sub-circuit is used for generating positive temperature coefficient current; and the index curvature compensation sub-circuit is used for receiving the positive temperature coefficient current so as to generate a base current and further output an index curvature compensation voltage to the voltage interface. According to the band-gap reference source circuit with the exponential curvature compensation, the positive temperature coefficient current of the band-gap core sub-circuit is converted into the base current through the exponential curvature compensation sub-circuit, so that the influence of a first-order item temperature coefficient and a high-order item temperature coefficient in the positive temperature coefficient current is eliminated; the exponential curvature compensation voltage which is not influenced by temperature drift is output, and the precision and the stability of the output voltage are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of analog integrated circuits, and particularly to a bandgap reference circuit and system with exponential curvature compensation. Background Art

[0002] In the technical field of analog integrated circuits, a bandgap reference (BGR) is a widely used circuit structure. It generates a reference voltage independent of temperature by combining a voltage with a positive temperature coefficient and a voltage with a negative temperature coefficient (such as the base-emitter voltage of a bipolar transistor), thereby providing a stable voltage reference with good temperature characteristics.

[0003] Traditional bandgap references need to introduce a positive temperature coefficient term to compensate for the temperature coefficient term of the base-emitter voltage. Since the positive temperature coefficient term is a first-order function of temperature T, it can only compensate for the first-order coefficient related to temperature in the base-emitter voltage. Therefore, this technology is called first-order compensation in this field. Although the existing first-order compensation technology can achieve the stability of the reference voltage to a certain extent, in a wide temperature range, the temperature characteristics of the first-order compensation reference voltage will show high-order non-linear changes, resulting in a curvature effect, and causing a deviation of the reference voltage at extreme temperatures, affecting the accuracy and stability of the circuit. Summary of the Invention

[0004] The present invention aims to provide a bandgap reference circuit and system with exponential curvature compensation to improve the accuracy and stability of the reference voltage of the bandgap reference.

[0005] To achieve the above object, a first aspect of the present invention provides a bandgap reference circuit with exponential curvature compensation, including a bandgap core sub-circuit, an exponential curvature compensation sub-circuit, a power supply interface, and a voltage interface; the bandgap core sub-circuit and the exponential curvature compensation sub-circuit are respectively electrically connected to the power supply interface; a first output terminal of the bandgap core sub-circuit is electrically connected to a first input terminal of the exponential curvature compensation sub-circuit; a second output terminal of the bandgap core sub-circuit is electrically connected to a second input terminal of the exponential curvature compensation sub-circuit; an output terminal of the exponential curvature compensation sub-circuit is electrically connected to the voltage interface; wherein:

[0006] The bandgap core sub-circuit is used to generate a positive temperature coefficient current; the exponential curvature compensation sub-circuit is used to receive the positive temperature coefficient current, thereby generating a substrate current, and further outputting an exponential curvature compensation voltage to the voltage interface.

[0007] The above-mentioned bandgap reference circuit with exponential curvature compensation converts the positive temperature coefficient current of the bandgap core sub-circuit into a substrate current through the exponential curvature compensation sub-circuit, thereby eliminating the influence of the first-order term temperature coefficient and the high-order term temperature coefficient in the positive temperature coefficient current, and outputting an exponential curvature compensation voltage that is not affected by temperature drift, improving the accuracy and stability of the output voltage.

[0008] Further, the bandgap core sub-circuit includes a first PMOS transistor, a second PMOS transistor, a first triode, a second triode, a first resistor, and a high-gain operational amplifier; where:

[0009] The source of the first PMOS transistor is electrically connected to the power supply interface, the gate of the first PMOS transistor is electrically connected to the gate of the second PMOS transistor, and the drain of the first PMOS transistor is electrically connected to the non-inverting input terminal of the high-gain operational amplifier;

[0010] The source of the second PMOS transistor is electrically connected to the power supply interface, the drain of the second PMOS transistor is electrically connected to the inverting input terminal of the high-gain operational amplifier, and the gate of the second PMOS transistor serves as the first output terminal of the bandgap core sub-circuit;

[0011] The collector of the first triode is electrically connected to the non-inverting input terminal of the high-gain operational amplifier, the base of the first triode is electrically connected to the collector of the first triode, and the emitter of the first triode is electrically connected to the ground terminal;

[0012] One end of the first resistor is electrically connected to the inverting input terminal of the high-gain operational amplifier, and the other end of the first resistor is electrically connected to the collector of the second triode;

[0013] The base of the second triode is electrically connected to the collector of the second triode, the emitter of the second triode is electrically connected to the ground terminal, and the collector of the second triode serves as the second output terminal of the bandgap core sub-circuit and is electrically connected;

[0014] The output terminal of the high-gain operational amplifier is electrically connected to the gate of the second PMOS transistor.

[0015] It should be noted that in this circuit, the first triode and the second triode are used to generate a positive temperature coefficient current, and the functional relationship between the base-emitter voltage and the collector current is shown in the following formula 1:

[0016]

[0017] Where is the thermal voltage, I S is the reverse saturation current of the emitter junction of the triode, I Cis the collector current, T is the absolute temperature in the Kelvin function, q is the unit charge of an electron, and k is the Boltzmann constant.

[0018] In the above embodiment, the voltage clamps of the non-inverting input terminal and the inverting input terminal of the high-gain operational amplifier are equal. At the same time, the current I 1+ at the non-inverting input terminal and the current I 1- at the inverting input terminal satisfy I 1+ = I 1- = 0; The first PMOS transistor and the second PMOS transistor are used to balance the currents passing through the first triode and the second triode. The size of the second triode is n times that of the first triode. Thus, the base-emitter voltage difference between the first triode and the second triode can be obtained as shown in Equation 2 below:

[0019]

[0020] In a possible embodiment, the size of the second triode is 8 times that of the first triode. Therefore, from Equation 2 above, it can be known that the base-emitter voltage difference between the first triode and the second triode is V T ln 8. Therefore, the positive temperature coefficient current output by the bandgap core sub-circuit can be expressed by Equation 3 below:

[0021]

[0022] Where, R 1 is the resistance value of the first resistor, and I R1 is the current of the first resistor, that is, the positive temperature coefficient current.

[0023] It should also be noted that the traditional bandgap reference circuit compensates V T by introducing a positive temperature coefficient term containing V BE . Since V T is a first-order function of temperature T, the traditional bandgap reference circuit can only compensate the first-order term related to temperature in V BE , that is, perform first-order compensation. However, since the relationship between V BE of the bipolar transistor and temperature T is as shown in Equation 4 below, it is not a simple linear relationship:

[0024]

[0025] Where, is the thermal voltage, T is the absolute temperature in the Kelvin function, q is the unit charge of an electron, k is the Boltzmann constant, V G is the bandgap voltage of silicon, and T 0is the reference temperature, η = 4 - n (n is the order of the temperature dependence of the carrier mobility), and δ is the constant of the temperature dependence of the collector current. When the collector current is a PTAT (Proportional To Absolute Temperature) current, i.e., a positive temperature coefficient current, δ is 1, and when the collector current is independent of temperature, δ is 0.

[0026] Therefore, to eliminate the influence of the first-order term temperature coefficient and the high-order term temperature coefficient of V in the positive temperature coefficient current shown in Equation 3, further, the exponential curvature compensation sub-circuit includes a third PMOS transistor, a first capacitor, a third triode, a fourth triode, a fifth triode, and a trimming module; where: BE The source of the third PMOS transistor is electrically connected to the power supply interface, the drain of the third PMOS transistor is electrically connected to the collector of the fourth triode, and the gate of the third PMOS transistor serves as the first input terminal of the exponential curvature compensation sub-circuit;

[0027] The collector of the third triode is electrically connected to the low-potential terminal of the trimming module, the emitter of the third triode is electrically connected to the ground terminal, and the base of the third triode serves as the second input terminal of the exponential curvature compensation sub-circuit;

[0028] The base of the fourth triode is electrically connected to the low-potential terminal of the trimming module, and the emitter of the fourth triode is electrically connected to the ground terminal;

[0029] One end of the first capacitor is electrically connected to the collector of the fourth triode, and the other end of the first capacitor is electrically connected to the base of the fourth triode;

[0030] The collector of the fifth triode is electrically connected to the power supply interface, the base of the fifth triode is electrically connected to the drain of the third PMOS transistor, and the emitter of the fifth triode is electrically connected to the high-potential terminal of the trimming module.

[0031] In the above embodiment, the third triode in the exponential curvature compensation sub-circuit replicates the positive temperature coefficient current through the second output terminal of the bandgap core sub-circuit; the current mirror third PMOS transistor in the exponential curvature compensation sub-circuit replicates the positive temperature coefficient current through the first output terminal of the bandgap core sub-circuit and causes the positive temperature coefficient current to flow through the fourth triode, thereby generating a substrate current. According to the foregoing, the size of the second triode is 8 times that of the first triode, and the base-emitter voltage difference between the first triode and the second triode is V

[0032] T ​According to the information of ln 8, the ratio of the current flowing through the third triode to the current flowing through the fourth triode can be obtained, and then the exponential curvature compensation voltage at the output end of the exponential curvature compensation sub-circuit is as shown in Equation 5 below:

[0033]

[0034] Wherein, V BE4 is the voltage of the emitter junction in the fourth triode, m and n are the ratio of the current flowing through the third triode to the current flowing through the fourth triode, R 1 is the resistance value of the first resistor, R 2 is the resistance value of the trimming module, and is the common-emitter DC amplification factor β.

[0035] Substituting the V BE function formula shown in Equation 4 into Equation 5, it can be solved that the second term in Equation 5 can effectively cancel the first-order temperature coefficient in the V BE function formula. At the same time, the common-emitter DC amplification factor β shown in the third term of Equation 5 can be expressed by the following Equation 6:

[0036]

[0037] Wherein, β ∞ is β at infinite temperature, ΔE G is the part of the emitter bandgap narrowing factor to the emitter doping level, and exp() is the exponential function with the natural constant e (approximately equal to 2.71828) as the base. Combining Equation 6 and Equation 5, it can be seen that the third term in Equation 5 can approximately cancel the high-order temperature coefficient in the V BE function formula shown in Equation 4.

[0038] Furthermore, substituting Equation 6 into Equation 5, the organized exponential curvature compensation voltage is obtained as shown in the following Equation 7:

[0039]

[0040] Wherein, the second term of Equation 7 can effectively cancel the first-order temperature coefficient in the V BE function formula, and then eliminate the influence of the first-order term temperature coefficient of V BE in the positive temperature coefficient current; the third term of Equation 7 can approximately cancel the high-order temperature coefficient in the V BE function formula, and then eliminate the influence of the high-order term temperature coefficient of V BE in the positive temperature coefficient current.

[0041] By adjusting the first-order term coefficient K 1 and the high-order term coefficient K 2The value can adjust the exponentially-curved compensation voltage output by the exponentially-curved compensation sub-circuit, thereby minimizing the temperature drift of the exponentially-curved compensation voltage.

[0042] Based on the above analysis, the advantage of the exponentially-curved compensation sub-circuit compared with the existing second-order compensation technology is that it does not need to additionally generate a bias current for curvature compensation in the second-order compensation BGR, thus avoiding the use of high-precision resistors for generating the bias current, further optimizing the circuit complexity and the circuit structure size, and avoiding the influence of resistor process mismatch and temperature coefficient variation on the output voltage, improving the stability and accuracy of the output exponentially-curved compensation voltage.

[0043] The exponentially-curved compensation sub-circuit designed by the present invention uses the base current of a triode as the curvature compensation source, directly utilizes the PTAT current (positive temperature coefficient current) biasing mechanism adopted in the first-order compensation, and naturally realizes high-order temperature compensation through the base current characteristics of the triode. Compared with the traditional second-order compensation technology that requires the introduction of a complex compensation current source design, the present invention only needs to adjust the current source parameters to effectively suppress the non-linear temperature drift of the base-emitter voltage, while simplifying the circuit complexity and significantly reducing the design cost, providing a more efficient technical solution for the design of a high-precision low-temperature-drift reference source.

[0044] Further, the trimming module includes a non-trimming resistor, a first trimming unit, a second trimming unit, a third trimming unit, a fourth trimming unit, a fifth trimming unit, and a sixth trimming unit; wherein:

[0045] The low-potential end of the first trimming unit serves as the low-potential end of the trimming module, and the high-potential end of the first trimming unit is electrically connected to the low-potential end of the second trimming unit;

[0046] The high-potential end of the second trimming unit is electrically connected to the low-potential end of the third trimming unit;

[0047] The high-potential end of the third trimming unit is electrically connected to the low-potential end of the fourth trimming unit;

[0048] The high-potential end of the fourth trimming unit is electrically connected to the low-potential end of the fifth trimming unit;

[0049] The high-potential end of the fifth trimming unit is electrically connected to the low-potential end of the sixth trimming unit;

[0050] The high-potential end of the sixth trimming unit is electrically connected to one end of the non-trimming resistor;

[0051] The other end of the non-trimming resistor serves as the high-potential end of the trimming module.

[0052] It should be noted that due to errors and inconsistencies in the component manufacturing process, there will be a certain degree of deviation in the bandgap reference of each component, which directly affects the accuracy of the exponential curvature compensation voltage. Based on this, this embodiment introduces a trimming structure. By adjusting the resistance values of the trimming units in the trimming module, the substrate current generated by the fourth triode is trimmed, thereby trimming the positive temperature coefficient voltage output by the bandgap core sub-circuit, so as to achieve the effect of trimming the output voltage, improve the accuracy of the output exponential curvature compensation voltage, and reduce the influence brought by the component manufacturing process deviation.

[0053] Further, the first trimming unit includes a first trimming resistor and a first trimming MOS transistor; the source electrode of the first trimming MOS transistor is electrically connected to one end of the first trimming resistor, serving as the low potential end of the first trimming unit; the drain electrode of the first trimming MOS transistor is electrically connected to the other end of the first trimming resistor, serving as the high potential end of the first trimming unit;

[0054] The second trimming unit includes a second trimming resistor and a second trimming MOS transistor; the source electrode of the second trimming MOS transistor is electrically connected to one end of the second trimming resistor, serving as the low potential end of the second trimming unit; the drain electrode of the second trimming MOS transistor is electrically connected to the other end of the second trimming resistor, serving as the high potential end of the second trimming unit;

[0055] The third trimming unit includes a third trimming resistor and a third trimming MOS transistor; the source electrode of the third trimming MOS transistor is electrically connected to one end of the third trimming resistor, serving as the low potential end of the third trimming unit; the drain electrode of the third trimming MOS transistor is electrically connected to the other end of the third trimming resistor, serving as the high potential end of the third trimming unit;

[0056] The fourth trimming unit includes a fourth trimming resistor and a fourth trimming MOS transistor; the source electrode of the fourth trimming MOS transistor is electrically connected to one end of the fourth trimming resistor, serving as the low potential end of the fourth trimming unit; the drain electrode of the fourth trimming MOS transistor is electrically connected to the other end of the fourth trimming resistor, serving as the high potential end of the fourth trimming unit;

[0057] The fifth trimming unit includes a fifth trimming resistor and a fifth trimming MOS transistor; the source electrode of the fifth trimming MOS transistor is electrically connected to one end of the fifth trimming resistor, serving as the low potential end of the fifth trimming unit; the drain electrode of the fifth trimming MOS transistor is electrically connected to the other end of the fifth trimming resistor, serving as the high potential end of the fifth trimming unit;

[0058] The sixth trimming unit includes a sixth trimming resistor and a sixth trimming MOS transistor; the source electrode of the sixth trimming MOS transistor is electrically connected to one end of the sixth trimming resistor, serving as the low-potential end of the sixth trimming unit; the drain electrode of the sixth trimming MOS transistor is electrically connected to the other end of the sixth trimming resistor, serving as the high-potential end of the sixth trimming unit.

[0059] It should be noted that, among the above six trimming units, the base electrodes of the trimming MOS transistors in each trimming unit are all electrically connected to an external signal source. When it is necessary to adjust the equivalent resistance value of the trimming module, the digital signal level transmitted to the base electrode of the trimming MOS transistor is adjusted through the external signal source to control the on-off state of the corresponding trimming MOS transistor, so as to control whether the corresponding trimming resistor is connected to the trimming module, and further realize the adjustment of the equivalent resistance value of the trimming module.

[0060] Preferably, the exponential curvature compensation sub-circuit further includes a filtering module, the input end of the filtering module is electrically connected to the high-potential end of the trimming module, and the output end of the filtering module serves as the output end of the exponential curvature compensation sub-circuit, where: the filtering module is used to stabilize the exponential curvature compensation voltage.

[0061] In the above embodiment, a filtering module is added to the exponential curvature compensation sub-circuit. The filtering module eliminates the possible variation ripples of the exponential curvature compensation voltage, thereby stabilizing the exponential curvature compensation voltage and improving the stability of the output voltage of the exponential curvature compensation sub-circuit.

[0062] Further, the filtering module includes a filtering resistor and a second capacitor; where:

[0063] The first end of the filtering resistor serves as the input end of the filtering module, and the second end of the filtering resistor serves as the output end of the filtering module; the first end of the second capacitor is electrically connected to the second end of the filtering resistor, and the second end of the second capacitor is electrically connected to the ground terminal.

[0064] In the above embodiment, the filtering resistor and the second capacitor form a passive low-pass filter. By the principle that the capacitor passes high-frequency signals and blocks low-frequency signals, the possible variation ripples of the exponential curvature compensation voltage are eliminated, thereby stabilizing the exponential curvature compensation voltage and improving the stability of the output voltage of the exponential curvature compensation sub-circuit.

[0065] Preferably, the bandgap reference source circuit for exponential curvature compensation further includes a startup sub-circuit, and the output end of the high-gain operational amplifier is electrically connected to the gate electrode of the second PMOS transistor through the startup sub-circuit; where:

[0066] The promoter circuit is electrically connected to the power supply interface; the input end of the promoter circuit is electrically connected to the output end of the exponential curvature compensation sub-circuit; the first transmission end of the promoter circuit is electrically connected to the output end of the high-gain operational amplifier; the second transmission end of the promoter circuit is electrically connected to the gate of the second PMOS transistor;

[0067] The promoter circuit is used to provide a bias current and a bias voltage to the bandgap core sub-circuit, so that the bandgap core sub-circuit gradually enters a stable operating state after being powered on.

[0068] It should be noted that the bandgap core sub-circuit may be in an unstable state during the power-on process, resulting in abnormal operation of the circuit. Based on this, the above embodiment provides a temporary bias current and a bias voltage to the bandgap core sub-circuit at the initial stage of power-on through the promoter circuit, so that the bandgap core sub-circuit gradually enters a stable operating state and starts to work after being powered on.

[0069] Further, the promoter circuit includes a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth PMOS transistor, and a fifth PMOS transistor; where:

[0070] The gate of the first NMOS transistor serves as the first transmission end of the promoter circuit, the source of the first NMOS transistor is electrically connected to the ground terminal, and the drain of the first NMOS transistor is electrically connected to the drain of the fourth PMOS transistor;

[0071] The gate of the second NMOS transistor serves as the input end of the promoter circuit, the source of the second NMOS transistor is electrically connected to the ground terminal, and the drain of the second NMOS transistor is electrically connected to the gate of the third NMOS transistor;

[0072] The source of the third NMOS transistor is electrically connected to the ground terminal, and the drain of the third NMOS transistor is electrically connected to the drain of the fourth PMOS transistor;

[0073] The source of the fourth PMOS transistor is electrically connected to the power supply interface, the gate of the fourth PMOS transistor serves as the second transmission end of the promoter circuit, and the drain of the fourth PMOS transistor is electrically connected to the gate of the fourth PMOS transistor;

[0074] The source of the fifth PMOS transistor is electrically connected to the power supply interface, the gate of the fifth PMOS transistor is electrically connected as the input end of the promoter circuit, and the drain of the fifth PMOS transistor is electrically connected to the gate of the third NMOS transistor.

[0075] In the above embodiments, when the power interface is connected to an external power supply and the exponential curvature compensated bandgap reference circuit starts to power on, as the voltage at the power interface terminal rises to the conduction threshold of the fifth PMOS transistor, the fifth PMOS transistor conducts, thereby pulling up the level of the gate of the third NMOS transistor to a high level. The third NMOS transistor conducts, and further pulls down the gate level of the fourth PMOS transistor to a low level until the gate levels of the fourth PMOS transistor, the first PMOS transistor, and the second PMOS transistor reach their conduction conditions. After the fourth PMOS transistor, the first PMOS transistor, and the second PMOS transistor conduct, the bandgap core sub-circuit starts to operate and generates a positive temperature coefficient current, so that the exponential curvature compensation sub-circuit receives the positive temperature coefficient current and normally outputs an exponential curvature compensation voltage. The exponential curvature compensation voltage is input to the input terminal of the startup sub-circuit, thereby pulling up the gate level of the second NMOS transistor to a high level to make the second NMOS transistor conduct, and further gradually reducing the gate voltage of the third NMOS transistor until the third NMOS transistor turns off. After the third NMOS transistor turns off, the startup sub-circuit turns off, and at this time, the bandgap core sub-circuit enters a stable operating state.

[0076] The second aspect of the present invention provides an exponential curvature compensated bandgap reference system, which includes the exponential curvature compensated bandgap reference circuit according to any one of the embodiments of the first aspect of the present invention, a power supply, and a load; the power supply is electrically connected to the power interface of the exponential curvature compensated bandgap reference circuit; the load is electrically connected to the voltage interface of the exponential curvature compensated bandgap reference circuit; wherein:

[0077] The power supply is used to input a positive voltage to the exponential curvature compensated bandgap reference circuit;

[0078] The exponential curvature compensated bandgap reference circuit is used to output an exponential curvature compensation voltage to the load.

[0079] In the above exponential curvature compensated bandgap reference system, the exponential curvature compensation sub-circuit converts the positive temperature coefficient current of the bandgap core sub-circuit into a substrate current, thereby eliminating the influence of the first-order term temperature coefficient and the high-order term temperature coefficient in the positive temperature coefficient current, providing an exponential curvature compensation voltage to the load that is not affected by temperature drift, improving the accuracy and stability of the output voltage, and improving the stability and safety of the load operating environment. BRIEF DESCRIPTION OF THE DRAWINGS

[0080] Figure 1 is a structural diagram of an exponential curvature compensated bandgap reference circuit provided by an embodiment of the present invention;

[0081] Figure 2 is a structural diagram of a traditional Bandgap circuit provided by an embodiment of the present invention;

[0082] Figure 3 It is a schematic diagram of a β - index curvature compensation technology provided by an embodiment of the present invention;

[0083] Figure 4 It is a structural diagram of a VBE linear compensation circuit provided by an embodiment of the present invention;

[0084] Figure 5 It is a structural diagram of a resistor compensation circuit provided by an embodiment of the present invention;

[0085] Figure 6 It is a structural diagram of a band - gap reference source circuit with exponential curvature compensation provided by an embodiment of the present invention;

[0086] Figure 7 It is a structural diagram of a band - gap reference source circuit with exponential curvature compensation provided by an embodiment of the present invention;

[0087] Figure 8 It is a structural diagram of a trimming module provided by an embodiment of the present invention;

[0088] Figure 9 It is a structural diagram of a band - gap reference source circuit with exponential curvature compensation provided by an embodiment of the present invention;

[0089] Figure 10 It is a structural diagram of a band - gap reference source system with exponential curvature compensation provided by an embodiment of the present invention;

[0090] Wherein: 100, band - gap core sub - circuit; 200, exponential curvature compensation sub - circuit; 210, filtering module; 300, power supply interface; 400, voltage interface; 500, startup sub - circuit; 600, load. Specific embodiments

[0091] The present invention will be described in detail below with reference to the accompanying drawings and in conjunction with embodiments. It should be noted that the following detailed description is exemplary and is intended to provide further details of the present invention. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which this application belongs; the terms used in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" and any variations thereof in the specification and claims of this application and the above - mentioned drawings are intended to cover non - exclusive inclusion. The terms "first", "second", etc. in the specification and claims of this application or the above - mentioned drawings are used to distinguish different objects and are not used to describe a specific order.

[0092] Before describing this application in detail with reference to the accompanying drawings and in conjunction with embodiments, the technical problems to be solved by the present invention will be described first.

[0093] In the field of analog integrated circuits, a bandgap reference (BGR) is a widely used circuit structure that provides a stable voltage or current reference with good temperature characteristics. This technology generates a temperature-independent reference voltage by combining a voltage with a positive temperature coefficient (such as proportional to the absolute temperature, PTAT) and a voltage with a negative temperature coefficient (such as the base-emitter voltage VBE of a bipolar transistor).

[0094] In the above bandgap reference, a bipolar transistor is used to construct a temperature-independent bandgap reference circuit. In this circuit, the functional relationship between the base-emitter voltage and the collector current is shown in Equation 8:

[0095]

[0096] where is the thermal voltage, I S is the reverse saturation current of the emitter junction of the triode, I C is the collector current, T is the absolute temperature in the Kelvin function, q is the unit electric charge of an electron, and k is the Boltzmann constant.

[0097] Please refer to Figure 2 , Figure 2 which is a traditional bandgap reference. Figure 2 In 1+ , the main function of operational amplifier A1 is to ensure that the voltage V 1- at the non-inverting input terminal is clamped equal to the voltage V 1+ at the inverting input terminal, that is, V 1- = V 1+ . At the same time, the current I 1- at the non-inverting input terminal and the current I 1+ at the inverting input terminal satisfy I 1- = I 01 = 0. Also, because R 02 = R Q1 = I Q2 = I R01 = I R02 , the voltage difference ΔV 1 across the resistor R BE is shown in Equation 9 below:

[0098]

[0099] It can be seen from Equation 9 that Figure 2 the generated reference voltage V REF is shown in Equation 10 below:

[0100]

[0101] Equation 10 shows that by adjusting R 1 and R 2 , the coefficient of the positive temperature coefficient term V T can be changed. Adding this adjusted positive temperature coefficient term to the negative temperature coefficient term V BE3 results in V REF with an approximate zero temperature coefficient.

[0102] At the same time, the temperature coefficient T C is also an important indicator of the bandgap reference voltage source, and its expression is shown in Equation 11 below:

[0103]

[0104] where V max , V min , and V mean are the maximum, minimum, and average values of the reference voltage within the simulation temperature range, respectively; T max and T min are the highest and lowest temperatures of the simulation, respectively.

[0105] In common first-order compensation techniques, although the first-order compensation technique can achieve the temperature stability of the reference voltage, within a relatively wide temperature range, the temperature characteristics of the reference voltage will exhibit second-order (or higher-order) non-linear variations, i.e., the curvature effect. This curvature effect will cause deviations of the reference voltage at extreme temperatures, affecting the accuracy and stability of the circuit.

[0106] To solve the above problems, the β-exponential curvature compensation technique is usually introduced for the bandgap reference source. This technique is one of the key techniques to improve the performance of the bandgap reference source. This technique utilizes the non-linear relationship between the base current or related parameters of the bipolar transistor and temperature to design a specific circuit structure to generate a compensation current. The compensation current is injected into the PTAT current, and the two currents with different temperature coefficients are combined to adjust the temperature characteristics of the reference voltage, thereby achieving the purpose of second-order compensation and reducing the influence of the curvature effect.

[0107] The principle of the β-exponential curvature compensation technique is as shown in Figure 3 . Figure 3 where A and B are constant coefficients respectively, and T is the temperature. The two paths of current have different positive temperature coefficients. Since the current gain of the triode is β, the current flowing through the base of the triode can be obtained as shown in Equation 12 below:

[0108]

[0109] Assuming β >> 1 in Equation 12, the current flowing through R in Figure 3 can be obtained as shown in Equation 13:

[0110]

[0111] In Equation 13, β has an exponential relationship with temperature, and the relationship is shown in Equation 14 below:

[0112]

[0113] where C is a constant. Combining Equation 12 and Equation 13, we can obtain Figure 3 The compensated reference output voltage in [reference] is shown in Equation 15 below:

[0114]

[0115] Based on the principle of the above β exponential curvature compensation technology, in order to solve the technical problem that the traditional bandgap reference circuit can only compensate the first-order term related to temperature in [reference], the prior art introduces a linear compensation technology to compensate each high-order term in the expansion of [reference] one by one. As BE shown, since the relationship between V [parameter] of the bipolar transistor and temperature T is not a simple linear relationship, but shows the relationship shown in Equation 16 below: BE Figure 4 where BE is the thermal voltage, T is the absolute temperature in the Kelvin function, q is the unit electric charge of an electron, k is the Boltzmann constant, V [parameter] is the bandgap voltage of silicon, T [parameter] is the reference temperature, η = 4 - n (n is the order of the temperature dependence of the carrier mobility), and δ is the constant of the temperature dependence of the collector current. When the collector current is a PTAT (Proportional To Absolute Temperature) current, that is, a positive temperature coefficient current, δ is 1, and when the collector current is independent of temperature, δ is 0.

[0116]

[0117] where is the thermal voltage, T is the absolute temperature in the Kelvin function, q is the unit electric charge of an electron, k is the Boltzmann constant, V [parameter] is the bandgap voltage of silicon, T [parameter] is the reference temperature, η = 4 - n (n is the order of the temperature dependence of the carrier mobility), and δ is the constant of the temperature dependence of the collector current. When the collector current is a PTAT (Proportional To Absolute Temperature) current, that is, a positive temperature coefficient current, δ is 1, and when the collector current is independent of temperature, δ is 0. G is the thermal voltage, T is the absolute temperature in the Kelvin function, q is the unit electric charge of an electron, k is the Boltzmann constant, V [parameter] is the bandgap voltage of silicon, T [parameter] is the reference temperature, η = 4 - n (n is the order of the temperature dependence of the carrier mobility), and δ is the constant of the temperature dependence of the collector current. When the collector current is a PTAT (Proportional To Absolute Temperature) current, that is, a positive temperature coefficient current, δ is 1, and when the collector current is independent of temperature, δ is 0. 0 is the thermal voltage, T is the absolute temperature in the Kelvin function, q is the unit electric charge of an electron, k is the Boltzmann constant, V [parameter] is the bandgap voltage of silicon, T [parameter] is the reference temperature, η = 4 - n (n is the order of the temperature dependence of the carrier mobility), and δ is the constant of the temperature dependence of the collector current. When the collector current is a PTAT (Proportional To Absolute Temperature) current, that is, a positive temperature coefficient current, δ is 1, and when the collector current is independent of temperature, δ is 0.

[0118] The linear compensation technology adopts the circuit structure shown in Figure 4 to cancel or reduce the high-order term of V [parameter] shown in Equation 16 to obtain a smaller temperature coefficient. Assuming BE that the ratio of the emitter junction areas of transistors Q1, Q2, and Q3 in [reference] is n:1:1 and the current mirror ratio is the same. Then the difference between the emitter junction voltage of transistor Q2 and the emitter junction voltage of transistor Q3 falls on resistor R3. And the bias current of Q1 is proportional to temperature, and the bias current of Q2 is independent of temperature, so the current I Figure 4 flowing through resistor R3 is shown in Equation 17 below: R3 In Equation 17 below:

[0119] ​

[0120] Also, because Figure 4 the current of the current mirror in is the sum of the currents flowing through R1, R2, and R3. Therefore, based on Equation 17, V REF can be expressed as shown in Equation 18 below:

[0121]

[0122] In Equation 18, the first term is a first-order positive temperature coefficient term, the second term is the negative temperature coefficient term of V BE , and the third term is a high-order compensated TlnT term. Therefore, the linear compensation technique compensates for the TlnT term in the expansion of V Figure 4 by adjusting the resistance values of resistors R2, R3, and R4 in to obtain a lower temperature coefficient and reduce the influence of temperature on V BE . REF

[0123] Combining the above analysis, Figure 4 the reference voltage V REF output by the shown linear compensation circuit has a temperature coefficient of about 10 - 20 ppm / °C; if ideal devices are used for simulation, its temperature coefficient is below 2 ppm / °C.

[0124] Although the above linear compensation technique achieves high-order compensation, however, the circuit structure of this linear compensation technique requires the use of a large number of resistors with precise resistance values, and has extremely high requirements for the production process. Any slight mismatch of the resistors will increase the reference voltage error of this linear compensation technique. Moreover, the large number of resistors introduced by this linear compensation technique severely restricts the reduction of the chip area, which is not conducive to the technical development direction of chip miniaturization.

[0125] Another commonly used high-order compensation technique is the resistor compensation technique. Resistor compensation is to add resistors with different temperature coefficients in the circuit design for compensation, and generate high-order terms by constructing the ratio of resistors with different temperature coefficients, so as to cancel the high-order terms of voltage V BE . Its implementation principle is as shown in Figure 5 .

[0126] Please refer to Figure 5 , Figure 5 where R2 is a resistor with the same temperature coefficient type as R1, R3 is a resistor with a different temperature coefficient type from R1; the ratio of the emitter junction area of transistor Q2 to that of transistor Q1 is N. Therefore, Figure 5 the output reference voltage V REF in can be expressed as Equation 19:

[0127]

[0128] ​Based on equation 19, the temperature T is derived, and equation 20 is obtained as follows:

[0129]

[0130] Formula 20 shows that if Figure 5 The resistor compensation technique shown compensates V by using the temperature coefficient of resistors R3 and R1. BE Therefore, the resistance compensation technology needs to select a resistor with a suitable temperature coefficient for compensation according to the process manual. The error of the temperature coefficient of the resistor directly determines the error of the reference voltage of the overall circuit. Therefore, this method has high requirements for the resistance accuracy and still has high requirements for the process.

[0131] In summary, although the existing linear compensation technology and resistance compensation technology can introduce high-order compensation to the traditional first-order compensation technology to reduce the high-order nonlinear changes in the temperature characteristics of the reference voltage, the above methods require the use of a large number of resistors with precise resistance values, which has extremely high requirements for production processes; its accuracy depends on the accuracy of the resistance temperature coefficient, and a small error in the resistance temperature coefficient will affect the accuracy of the reference voltage. In addition, the large number of resistors introduced by the above technology seriously limits the reduction of chip area, which is not conducive to the technical development direction of chip miniaturization.

[0132] See also Figure 1 In order to solve the above technical problems, the first aspect of the present invention provides a bandgap reference source circuit for exponential curvature compensation, comprising a bandgap core subcircuit 100, an exponential curvature compensation subcircuit 200, a power interface 300 and a voltage interface 400; the bandgap core subcircuit 100 and the exponential curvature compensation subcircuit 200 are electrically connected to the power interface 300 respectively; the first output end of the bandgap core subcircuit 100 is electrically connected to the first input end of the exponential curvature compensation subcircuit 200; the second output end of the bandgap core subcircuit 100 is electrically connected to the second input end of the exponential curvature compensation subcircuit 200; the output end of the exponential curvature compensation subcircuit 200 is electrically connected to the voltage interface 400; wherein:

[0133] The bandgap core subcircuit 100 is used to generate a positive temperature coefficient current; the exponential curvature compensation subcircuit 200 is used to receive the positive temperature coefficient current, thereby generating a base current, and then outputting an exponential curvature compensation voltage V to the voltage interface 400. REF .

[0134] The above-mentioned exponential curvature compensated bandgap reference source circuit converts the positive temperature coefficient current of the bandgap core subcircuit 100 into a substrate current through the exponential curvature compensation subcircuit 200, thereby eliminating the influence of the first-order temperature coefficient and the high-order temperature coefficient in the positive temperature coefficient current, and outputs an exponential curvature compensation voltage V that is not affected by temperature drift. REF, the accuracy and stability of the output voltage are improved.

[0135] See Figure 6 , further, the bandgap core sub-circuit 100 includes a first PMOS transistor MP 1 , a second PMOS transistor MP 2 , a first triode Q 1 , a second triode Q 2 , a first resistor R 1 and a high-gain operational amplifier OPA; wherein:

[0136] The source of the first PMOS transistor MP 1 is electrically connected to the power supply interface 300, and the gate of the first PMOS transistor MP 1 is electrically connected to the gate of the second PMOS transistor MP 2 , and the drain of the first PMOS transistor MP 1 is electrically connected to the non-inverting input terminal of the high-gain operational amplifier OPA;

[0137] The source of the second PMOS transistor MP 2 is electrically connected to the power supply interface 300, and the drain of the second PMOS transistor MP 2 is electrically connected to the inverting input terminal of the high-gain operational amplifier OPA, and the gate of the second PMOS transistor MP 2 serves as the first output terminal of the bandgap core sub-circuit 100;

[0138] The collector of the first triode Q 1 is electrically connected to the non-inverting input terminal of the high-gain operational amplifier OPA, and the base of the first triode Q 1 is electrically connected to the collector of the first triode Q 1 , and the emitter of the first triode Q 1 is electrically connected to the ground terminal;

[0139] One end of the first resistor R 1 is electrically connected to the inverting input terminal of the high-gain operational amplifier OPA, and the other end of the first resistor R 1 is electrically connected to the collector of the second triode Q 2 ;

[0140] The base of the second triode Q 2 is electrically connected to the collector of the second triode Q 2 , the emitter of the second triode Q 2 is electrically connected to the ground terminal, and the collector of the second triode Q 2 serves as the second output terminal of the bandgap core sub-circuit 100 and is electrically connected;

[0141] The output terminal of the high-gain operational amplifier OPA is electrically connected to the gate of the second PMOS transistor MP 2 .

[0142] It should be noted that in this circuit, the first triode Q 1 and the second triode Q 2 are used to generate a positive temperature coefficient current, and the functional relationship between its base-emitter voltage and collector current is shown in the following formula 21:

[0143]

[0144] Wherein, is the thermal voltage, I S is the reverse saturation current of the emitter junction of the triode, I C is the collector current, T is the absolute temperature in the Kelvin function, q is the unit electric charge of an electron, and k is the Boltzmann constant.

[0145] In the above embodiment, the voltage clamps of the in-phase input terminal and the anti-phase input terminal of the high-gain operational amplifier OPA are equal. At the same time, the in-phase input terminal current I 1+ and the anti-phase input terminal current I 1- satisfy I 1+ = I 1- = 0; while the first PMOS transistor MP 1 and the second PMOS transistor MP 2 are used to balance the currents passing through the first triode Q 1 and the second triode Q 2 . The size of the second triode Q 2 is n times that of the first triode Q 1 . From this, the base-emitter voltage difference between the first triode Q 1 and the second triode Q 2 is as follows

[0146] shown in formula 22:

[0147]

[0148] In a possible embodiment, the size of the second triode Q 2 is 8 times that of the first triode Q 1 . Therefore, from the above formula 22, it can be known that the base-emitter voltage difference between the first triode Q 1 and the second triode Q 2 is V T ln 8. Therefore, the positive temperature coefficient current output by the bandgap core sub-circuit 100 can be expressed by the following formula 23:

[0149]

[0150] Among them, R 1 is the resistance value of the first resistor R 1 I R1 is the current of the first resistor R 1 , that is, the positive temperature coefficient current.

[0151] It should also be noted that the traditional bandgap reference circuit compensates V T by introducing a positive temperature coefficient term containing V BE . Since V T is a first-order function of temperature T, the traditional bandgap reference circuit can only compensate the first-order term related to temperature in V BE , that is, perform first-order compensation. However, since the relationship between the V BE of the bipolar transistor and the temperature T is as shown in Equation 24 below, it is not a simple linear relationship:

[0152]

[0153] Among them, is the thermal voltage, T is the absolute temperature in the Kelvin function, q is the unit charge of an electron, k is the Boltzmann constant, V G is the bandgap voltage of silicon, T 0 is the reference temperature, η = 4 - n (n is the order of the temperature dependence of the carrier mobility), and δ is the constant of the temperature dependence of the collector current. When the collector current is a PTAT (Proportional To Absolute Temperature) current, that is, a positive temperature coefficient current, δ is 1, and when the collector current is independent of temperature, δ is 0.

[0154] Please refer to Figure 7 , to eliminate the influence of the first-order term temperature coefficient and the high-order term temperature coefficient of V BE in the positive temperature coefficient current shown in Equation 3, further, the exponential curvature compensation sub-circuit 200 includes a third PMOS transistor MP 3 , a first capacitor C 1 , a third triode Q 3 , a fourth triode Q 4 , a fifth triode Q 5 and a trimming module TRIM(R 2 ); where:

[0155] The source of the third PMOS transistor MP 3 is electrically connected to the power supply interface 300, and the drain of the third PMOS transistor MP 3 is connected to the fourth triode Q4 is connected to the collector of, and the third PMOS transistor MP 3 has its gate serving as the first input terminal of the exponential curvature compensation sub - circuit 200;

[0156] The collector of the third triode Q 3 is electrically connected to the low - potential terminal of the trimming module TRIM. The emitter of the third triode Q 3 is electrically connected to the ground terminal. The base of the third triode Q 3 serves as the second input terminal of the exponential curvature compensation sub - circuit 200;

[0157] The base of the fourth triode Q 4 is electrically connected to the low - potential terminal of the trimming module TRIM. The emitter of the fourth triode Q 4 is electrically connected to the ground terminal;

[0158] One end of the first capacitor C 1 is electrically connected to the collector of the fourth triode Q 4 and the other end of the first capacitor C 1 is electrically connected to the base of the fourth triode Q 4 ;

[0159] The collector of the fifth triode Q 5 is electrically connected to the power supply interface 300. The base of the fifth triode Q 5 is electrically connected to the drain of the third PMOS transistor MP 3 . The emitter of the fifth triode Q 5 is electrically connected to the high - potential terminal of the trimming module TRIM.

[0160] In the above - mentioned embodiment, the third triode Q in the exponential curvature compensation sub - circuit 200 3 copies the positive temperature - coefficient current through the second output terminal of the band - gap core sub - circuit 100; The current - mirror third PMOS transistor MP in the exponential curvature compensation sub - circuit 200 3 copies the positive temperature - coefficient current through the first output terminal of the band - gap core sub - circuit 100 and makes the positive temperature - coefficient current flow through the fourth triode Q 4 , thereby generating a substrate current. According to the information that the size of the aforementioned second triode Q 2 is 8 times that of the first triode Q 1 , and the base - emitter voltage difference between the first triode Q 1 and the second triode Q 2 is V T ln8, it can be known that the current flowing through the third triode Q 3 and the fourth triode Q 4The ratio of the flowing currents, and then the exponential curvature compensation voltage V at the output end of the exponential curvature compensation sub-circuit 200 is obtained REF As shown in Equation 25 below:

[0161]

[0162] Wherein, V BE4 is the voltage of the emitter junction in the fourth triode Q 4 , m and n are the ratio of the flowing current in the third triode Q 3 to the flowing current in the fourth triode Q 4 , R 1 is the resistance value of the first resistor R 1 , R 2 is the resistance value of the trimming module TRIM, and is the common-emitter DC amplification factor β

[0163] Substituting the V BE function formula shown in Equation 4 into Equation 25, it can be solved that the second term in Equation 25 can effectively cancel the first-order temperature coefficient in the V BE function formula. At the same time, the common-emitter DC amplification factor β shown in the third term in Equation 25 can be expressed by the following Equation 26:

[0164]

[0165] Wherein, β ∞ is the β when the temperature is infinite, ΔE G is the part of the emitter bandgap narrowing factor to the emitter doping level, and exp() is the exponential function with the natural constant e (approximately equal to 2.71828) as the base. Combining Equation 26 and Equation 25, it can be seen that the third term in Equation 25 can approximately cancel the higher-order temperature coefficient in the V BE function formula

[0166] Furthermore, substituting Equation 26 into Equation 25 to obtain the sorted exponential curvature compensation voltage V REF as follows

[0167] As shown in Equation 7:

[0168]

[0169] Wherein, the second term of Equation 7 can effectively cancel the first-order temperature coefficient in the V BE function formula, and then eliminate the influence of the first-order term temperature coefficient in the positive temperature coefficient current; the third term of Equation 7 BE can approximately cancel the higher-order temperature coefficient in the V function formula, and then eliminate the influence of the higher-order term temperature coefficient in the positive temperature coefficient current BE BE ​​

[0170] By adjusting the coefficient K of the first-order term 1 and the coefficient K of the high-order term 2 value, the exponential curvature compensation voltage V output by the exponential curvature compensation sub-circuit 200 can be adjusted REF , thereby minimizing the temperature drift of the exponential curvature compensation voltage V REF .

[0171] Based on the above analysis, the advantage of the exponential curvature compensation sub-circuit 200 compared with the existing second-order compensation technology is that it does not need to additionally generate a bias current for curvature compensation in the second-order compensation BGR, thus avoiding the use of high-precision resistors for generating the bias current, further optimizing the circuit complexity and the circuit structure size, and avoiding the influence of resistor process mismatch and temperature coefficient variation on the output voltage, improving the stability and accuracy of the output exponential curvature compensation voltage V REF .

[0172] The exponential curvature compensation sub-circuit 200 designed by the present invention uses the base current of the triode as the curvature compensation source, directly utilizes the PTAT current (positive temperature coefficient current) biasing mechanism adopted in the first-order compensation, and naturally realizes high-order temperature compensation through the base current characteristics of the triode. Compared with the traditional second-order compensation technology that requires the introduction of a complex compensation current source design, the present invention only needs to adjust the current source parameters to effectively suppress the non-linear temperature drift of the base-emitter voltage, while simplifying the circuit complexity, significantly reducing the design cost, and providing a more efficient technical solution for the design of a high-precision low-temperature drift reference source.

[0173] Furthermore, the trimming module TRIM includes a non-trimming resistor R 0 , a first trimming unit, a second trimming unit, a third trimming unit, a fourth trimming unit, a fifth trimming unit, and a sixth trimming unit; where:

[0174] The low-potential end of the first trimming unit serves as the low-potential end of the trimming module TRIM, and the high-potential end of the first trimming unit is electrically connected to the low-potential end of the second trimming unit;

[0175] The high-potential end of the second trimming unit is electrically connected to the low-potential end of the third trimming unit;

[0176] The high-potential end of the third trimming unit is electrically connected to the low-potential end of the fourth trimming unit;

[0177] The high-potential end of the fourth trimming unit is electrically connected to the low-potential end of the fifth trimming unit;

[0178] The high-potential end of the fifth trimming unit is electrically connected to the low-potential end of the sixth trimming unit;

[0179] The high potential end of the sixth trimming unit is electrically connected to one end of the untrimmed resistor R 0 .

[0180] The other end of the untrimmed resistor R 0 serves as the high potential end of the trimming module TRIM

[0181] It should be noted that due to errors and inconsistencies in the component manufacturing process, the bandgap reference of each component will have a certain degree of deviation, which directly affects the accuracy of the exponential curvature compensation voltage V REF . Based on this, this embodiment introduces a trimming structure. By adjusting the resistance values of the trimming units in the trimming module TRIM, the substrate current generated by the fourth triode Q 4 is trimmed, so as to trim the positive temperature coefficient voltage output by the bandgap core sub-circuit 100, achieve the effect of trimming the output voltage, improve the accuracy of the output exponential curvature compensation voltage V REF , and reduce the influence brought by the component manufacturing process deviation

[0182] Please refer to Figure 8 . Further, the first trimming unit includes a first trimming resistor R t1 and a first trimming MOS transistor M t0 ; the source of the first trimming MOS transistor M t0 is electrically connected to one end of the first trimming resistor R t1 to serve as the low potential end of the first trimming unit; the drain of the first trimming MOS transistor M t0 is electrically connected to the other end of the first trimming resistor R t1 to serve as the high potential end of the first trimming unit

[0183] The second trimming unit includes a second trimming resistor R t2 and a second trimming MOS transistor M t1 ; the source of the second trimming MOS transistor M t1 is electrically connected to one end of the second trimming resistor R t2 to serve as the low potential end of the second trimming unit; the drain of the second trimming MOS transistor M t1 is electrically connected to the other end of the second trimming resistor R t2 to serve as the high potential end of the second trimming unit

[0184] The third trimming unit includes a third trimming resistor R t3 and a third trimming MOS transistor M t2 ; the source of the third trimming MOS transistor M t2 is electrically connected to one end of the third trimming resistor Rt3 is electrically connected to one end as the low potential end of the third trimming unit; the drain of the third trimming MOS transistor M t2 is electrically connected to the other end of the third trimming resistor R t3 as the high potential end of the third trimming unit;

[0185] The fourth trimming unit includes a fourth trimming resistor R t4 and a fourth trimming MOS transistor M t3 ; the source of the fourth trimming MOS transistor M t3 is electrically connected to one end of the fourth trimming resistor R t4 as the low potential end of the fourth trimming unit; the drain of the fourth trimming MOS transistor M t3 is electrically connected to the other end of the fourth trimming resistor R t4 as the high potential end of the fourth trimming unit;

[0186] The fifth trimming unit includes a fifth trimming resistor R t5 and a fifth trimming MOS transistor M t4 ; the source of the fifth trimming MOS transistor M t4 is electrically connected to one end of the fifth trimming resistor R t5 as the low potential end of the fifth trimming unit; the drain of the fifth trimming MOS transistor M t4 is electrically connected to the other end of the fifth trimming resistor R t5 as the high potential end of the fifth trimming unit;

[0187] The sixth trimming unit includes a sixth trimming resistor R t6 and a sixth trimming MOS transistor M t5 ; the source of the sixth trimming MOS transistor M t5 is electrically connected to one end of the sixth trimming resistor R t6 as the low potential end of the sixth trimming unit; the drain of the sixth trimming MOS transistor M t5 is electrically connected to the other end of the sixth trimming resistor R t6 as the high potential end of the sixth trimming unit.

[0188] It should be noted that the trimming part of the above trimming module TRIM is composed of six trimming resistors connected in series. Among them, each trimming resistor is connected in parallel with a trimming MOS transistor to form a trimming unit. In the above six trimming units, the bases of the trimming MOS transistors in each trimming unit are electrically connected to an external signal source. When it is necessary to adjust the equivalent resistance value of the trimming module TRIM, the digital signal level transmitted to the base of the trimming MOS transistor is adjusted by an externally input digital signal to control the on / off state of the corresponding trimming MOS transistor, so as to control whether the corresponding trimming resistor is connected to the trimming module TRIM, and further realize the adjustment of the equivalent resistance value of the trimming module TRIM.

[0189] Specifically, in a possible embodiment, a unit resistance value R is set, and the resistance values of the trimming resistors from low potential to high potential are respectively: the first trimming resistor R t1 =R, the second trimming resistor R t2 =2R, the third trimming resistor R t3 =4R, the fourth trimming resistor R t4 =8R, the fifth trimming resistor R t5 =16R, the sixth trimming resistor R t6 =32R. The sizes of each trimming MOS transistor are kept consistent and arranged together in the layout design.

[0190] As Figure 8 shown, the equivalent resistance value of the trimming module TRIM is denoted as R 2 , R 2 includes the non-trimming resistor R 0 and the equivalent resistance value R t of the trimming part. Thus, the output voltage V REF can be recalculated according to Equation 10 as follows

[0191] shown in Equation 28:

[0192]

[0193] It can be seen from this that in the above trimming module TRIM, when the external binary digital signal input increases by 1, that is, every time a trimming resistor is connected to the trimming module TRIM, the change amount is as shown in Equation 29 below:

[0194]

[0195] Furthermore, when the equivalent resistance value of the trimming module TRIM is trimmed from the maximum to the minimum, the change amount of V REF is as shown in Equation 30 below:

[0196]

[0197] As can be seen from Equation 29, the value of R can determine the accuracy of the trimming module TRIM. As can be seen from Equation 30, 63R can determine the range of the above-mentioned trimming module TRIM. Therefore, the output voltage V can be adjusted by adjusting the input digital signal REF for the purpose of trimming.

[0198] Please refer to Figure 9 , preferably, the exponential curvature compensation sub-circuit 200 further includes a filtering module 210. The input end of the filtering module 210 is electrically connected to the high-potential end of the trimming module TRIM, and the output end of the filtering module 210 serves as the output end of the exponential curvature compensation sub-circuit 200, where: the filtering module 210 is used to stabilize the exponential curvature compensation voltage V REF .

[0199] In the above embodiment, a filtering module 210 is added to the exponential curvature compensation sub-circuit 200. The filtering module 210 stabilizes the exponential curvature compensation voltage V by eliminating the possible fluctuating ripple REF thereby stabilizing the exponential curvature compensation voltage V REF and improving the stability of the output voltage of the exponential curvature compensation sub-circuit 200.

[0200] Further, the filtering module 210 includes a filtering resistor R 3 and a second capacitor C 2 ; where:

[0201] The first end of the filtering resistor R 3 serves as the input end of the filtering module 210, and the second end of the filtering resistor R 3 serves as the output end of the filtering module 210; the first end of the second capacitor C 2 is electrically connected to the second end of the filtering resistor R 3 , and the second end of the second capacitor C 2 is electrically connected to the ground terminal.

[0202] In the above embodiment, the filtering resistor R 3 and the second capacitor C 2 constitute a passive low-pass filter. By the principle that the capacitor passes high frequencies and blocks low frequencies, the possible fluctuating ripple of the exponential curvature compensation voltage V is eliminated REF thereby stabilizing the exponential curvature compensation voltage V REF and improving the stability of the output voltage of the exponential curvature compensation sub-circuit 200.

[0203] Please refer to Figure 10, preferably, the exponential curvature compensated bandgap reference source circuit further includes a startup sub-circuit 500, and the output terminal of the high-gain operational amplifier OPA is electrically connected to the gate of the second PMOS transistor MP through the startup sub-circuit 500; where: 2 ; where:

[0204] The startup sub-circuit 500 is electrically connected to the power supply interface 300; the input terminal of the startup sub-circuit 500 is electrically connected to the output terminal of the exponential curvature compensation sub-circuit 200; the first transmission terminal of the startup sub-circuit 500 is electrically connected to the output terminal of the high-gain operational amplifier OPA; the second transmission terminal of the startup sub-circuit 500 is electrically connected to the gate of the second PMOS transistor MP 2 ;

[0205] The startup sub-circuit 500 is used to provide a bias current and a bias voltage to the bandgap core sub-circuit 100, so that the bandgap core sub-circuit 100 gradually enters a stable working state after being powered on.

[0206] It should be noted that the bandgap core sub-circuit 100 may be in an unstable state during the power-on process, resulting in abnormal operation of the circuit. Based on this, in the above embodiment, the startup sub-circuit 500 provides a temporary bias current and a bias voltage for the bandgap core sub-circuit 100 in the initial stage of power-on, so that the bandgap core sub-circuit 100 gradually enters a stable working state and starts to work after being powered on.

[0207] Further, the startup sub-circuit 500 includes a first NMOS transistor MN 1 , a second NMOS transistor MN 2 , a third NMOS transistor MN 3 , a fourth PMOS transistor MP 4 and a fifth PMOS transistor MP 5 ; where:

[0208] The gate of the first NMOS transistor MN 1 serves as the first transmission terminal of the startup sub-circuit 500, the source of the first NMOS transistor MN 1 is electrically connected to the ground terminal, and the drain of the first NMOS transistor MN 1 is electrically connected to the drain of the fourth PMOS transistor MP 4 ;

[0209] The gate of the second NMOS transistor MN 2 serves as the input terminal of the startup sub-circuit 500, the source of the second NMOS transistor MN 2 is electrically connected to the ground terminal, and the drain of the second NMOS transistor MN 2 is electrically connected to the drain of the third NMOS transistor MN 3Gate electrical connection;

[0210] The source of the third NMOS transistor MN 3 is electrically connected to the ground terminal, and the drain of the third NMOS transistor MN 3 is electrically connected to the drain of the fourth PMOS transistor MP 4 ;

[0211] The source of the fourth PMOS transistor MP 4 is electrically connected to the power supply interface 300, and the gate of the fourth PMOS transistor MP 4 serves as the second transmission terminal of the promoter circuit 500, and the drain of the fourth PMOS transistor MP 4 is electrically connected to the gate of the fourth PMOS transistor MP 4 ;

[0212] The source of the fifth PMOS transistor MP 5 is electrically connected to the power supply interface 300, and the gate of the fifth PMOS transistor MP 5 is electrically connected as the input terminal of the promoter circuit 500, and the drain of the fifth PMOS transistor MP 5 is electrically connected to the gate of the third NMOS transistor MN 3 .

[0213] In the above embodiment, when the power supply interface 300 is connected to an external power supply and the power is turned on for the exponential curvature compensation bandgap reference source circuit, as the voltage at the power supply interface 300 rises to the conduction threshold of the fifth PMOS transistor MP 5 , the fifth PMOS transistor MP 5 conducts, thereby raising the level of the gate of the third NMOS transistor MN 3 to a high level, and the third NMOS transistor MN 3 conducts, further pulling down the gate level of the fourth PMOS transistor MP 4 to a low level until the gate levels of the fourth PMOS transistor MP 4 , the first PMOS transistor MP 1 and the second PMOS transistor MP 2 reach their conduction conditions. After the fourth PMOS transistor MP 4 , the first PMOS transistor MP 1 and the second PMOS transistor MP 2 conduct, the bandgap core sub-circuit 100 starts to operate and generates a positive temperature coefficient current, so that the exponential curvature compensation sub-circuit 200 receives the positive temperature coefficient current and normally outputs the exponential curvature compensation voltage V REF . The exponential curvature compensation voltage V REF is input to the input terminal of the promoter circuit 500, thereby enabling the second NMOS transistor MN2 The gate level of is pulled high to a high level to turn on the second NMOS transistor MN 2 and further turn on the third NMOS transistor MN 3 such that the gate voltage of the third NMOS transistor MN gradually decreases until the third NMOS transistor MN 3 is turned off. After the third NMOS transistor MN 3 is turned off, the startup sub-circuit 500 is turned off, and at this time, the bandgap core sub-circuit 100 enters a stable operating state.

[0214] It should also be noted that the startup time of the circuit reflects the response speed of the bandgap reference voltage source to the power-on process. For some circuit systems with fast timing, such as ADCs, DACs, etc., the power-on response time of the bandgap reference must be fast enough, otherwise it may cause system timing chaos and even prevent the system from starting or operating properly.

[0215] Refer to Figure 10 , a second aspect of the present invention provides an exponentially-curvature-compensated bandgap reference source system, which includes the exponentially-curvature-compensated bandgap reference source circuit according to any one of the embodiments of the first aspect of the present invention, a power supply VDD, and a load 600; the power supply VDD is electrically connected to the power supply interface 300 of the exponentially-curvature-compensated bandgap reference source circuit; the load 600 is electrically connected to the voltage interface 400 of the exponentially-curvature-compensated bandgap reference source circuit; wherein:

[0216] The power supply VDD is used to input a positive voltage to the exponentially-curvature-compensated bandgap reference source circuit;

[0217] The exponentially-curvature-compensated bandgap reference source circuit is used to output an exponentially-curvature-compensated voltage V REF to the load 600.

[0218] In the above-mentioned exponentially-curvature-compensated bandgap reference source system, the exponentially-curvature-compensation sub-circuit 200 converts the positive temperature coefficient current of the bandgap core sub-circuit 100 into a substrate current, thereby eliminating the influence of the first-order term temperature coefficient and the high-order term temperature coefficient in the positive temperature coefficient current, and providing an exponentially-curvature-compensated voltage V REF to the load 600 that is not affected by temperature drift, improving the accuracy and stability of the output voltage, and improving the stability and safety of the working environment of the load 600.

[0219] According to the exponentially-curvature-compensated bandgap reference source circuit and system provided by the present invention, compared with the prior art, it has at least the following advantages:

[0220] To eliminate the influence of the first-order temperature coefficient and the high-order temperature coefficient in the positive temperature coefficient current and achieve the goal of improving the accuracy and stability of the reference voltage of the bandgap reference source, the present invention adds an exponential curvature compensation sub-circuit to the traditional bandgap circuit, which effectively compensates and adjusts the high-order temperature coefficient of the base-emitter voltage in the bipolar transistor. At the same time, the present invention adds a trimming module TRIM to adjust the output voltage deviation caused by process influence, further improving the accuracy of the output exponential curvature compensation voltage V REF accuracy.

[0221] See Appendix Figure 10 With Equation 7, the designed exponential curvature compensation bandgap reference source circuit of the present invention can obtain the output exponential curvature compensation voltage V REF as shown in Equation 7. Among them, the second term in Equation 7 is the first-order temperature compensation term, and the third term in Equation 7 is the high-order (exponential) temperature compensation term. By combining the two, the influence of the first-order temperature coefficient and the high-order temperature coefficient of V BE in the positive temperature coefficient current is offset. By adjusting the coefficients K 1 and K 2 , an exponential curvature compensation voltage V REF with an approximate zero temperature coefficient can be obtained, thereby effectively reducing the influence of the temperature coefficient of the bandgap reference voltage source on the voltage accuracy and improving the accuracy of the output voltage.

[0222] Compared with the traditional second-order compensation techniques such as linear compensation and resistor compensation that require the introduction of complex compensation current sources and resistor designs, the present invention only needs to adjust the current source parameters to effectively suppress the non-linear temperature drift of the base-emitter voltage. While simplifying the circuit complexity, the design cost is significantly reduced, providing a more efficient technical solution for the design of high-precision low-temperature drift reference sources.

[0223] As used herein, the term "embodiment" means that the specific features, structures, or characteristics described in connection with the embodiment may be included in at least one embodiment of the present application. The phrase appears in various places in the specification and does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein may be combined with other embodiments. For the sake of brevity of description, not all possible combinations of the various technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered to be within the scope recorded in this specification.

[0224] The above-described embodiments merely represent several implementation manners of the present application. The description thereof is relatively specific and detailed, but it should not be construed as a limitation on the patent scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several improvements and substitutions can still be made, and these improvements and substitutions should also be regarded as the protection scope of the present invention. Therefore, the protection scope of the present application shall be subject to the appended claims.

Claims

1. A bandgap reference source circuit for exponential curvature compensation, characterized in that: The invention comprises a bandgap core subcircuit, an exponential curvature compensation subcircuit, a power interface and a voltage interface; the bandgap core subcircuit and the exponential curvature compensation subcircuit are electrically connected to the power interface respectively; the first output end of the bandgap core subcircuit is electrically connected to the first input end of the exponential curvature compensation subcircuit; The second output terminal of the bandgap core subcircuit is electrically connected to the second input terminal of the exponential curvature compensation subcircuit; the output terminal of the exponential curvature compensation subcircuit is electrically connected to the voltage interface; wherein: The bandgap core subcircuit is used to generate a positive temperature coefficient current; The exponential curvature compensation subcircuit is used to receive the positive temperature coefficient current, thereby generating a base current, and further outputting an exponential curvature compensation voltage to the voltage interface.

2. The bandgap reference source circuit for exponential curvature compensation according to claim 1, characterized in that: The bandgap core subcircuit comprises a first PMOS transistor, a second PMOS transistor, a first triode, a second triode, a first resistor and a high-gain operational amplifier; wherein: The source of the first PMOS tube is electrically connected to the power interface, the gate of the first PMOS tube is electrically connected to the gate of the second PMOS tube, and the drain of the first PMOS tube is electrically connected to the non-inverting input terminal of the high-gain operational amplifier; The source of the second PMOS tube is electrically connected to the power interface, the drain of the second PMOS tube is electrically connected to the inverting input terminal of the high-gain operational amplifier, and the gate of the second PMOS tube serves as the first output terminal of the bandgap core sub-circuit; The collector of the first transistor is electrically connected to the non-inverting input terminal of the high-gain operational amplifier, the base of the first transistor is electrically connected to the collector of the first transistor, and the emitter of the first transistor is electrically connected to the ground terminal; One end of the first resistor is electrically connected to the inverting input terminal of the high-gain operational amplifier, and the other end of the first resistor is electrically connected to the collector of the second transistor; The base of the second triode is electrically connected to the collector of the second triode, the emitter of the second triode is electrically connected to the ground terminal, and the collector of the second triode is electrically connected as the second output terminal of the bandgap core subcircuit; The output end of the high-gain operational amplifier is electrically connected to the gate of the second PMOS tube.

3. The bandgap reference source circuit for exponential curvature compensation according to claim 1, characterized in that: The exponential curvature compensation subcircuit includes a third PMOS transistor, a first capacitor, a third transistor, a fourth transistor, a fifth transistor and a trimming module; wherein: The source of the third PMOS tube is electrically connected to the power interface, the drain of the third PMOS tube is electrically connected to the collector of the fourth transistor, and the gate of the third PMOS tube serves as the first input terminal of the exponential curvature compensation subcircuit; The collector of the third triode is electrically connected to the low potential end of the trimming module, the emitter of the third triode is electrically connected to the ground end, and the base of the third triode serves as the second input end of the exponential curvature compensation subcircuit; The base of the fourth transistor is electrically connected to the low potential end of the trimming module, and the emitter of the fourth transistor is electrically connected to the ground end; One end of the first capacitor is electrically connected to the collector of the fourth transistor, and the other end of the first capacitor is electrically connected to the base of the fourth transistor; The collector of the fifth transistor is electrically connected to the power interface, the base of the fifth transistor is electrically connected to the drain of the third PMOS tube, and the emitter of the fifth transistor is electrically connected to the high potential end of the trimming module.

4. The bandgap reference source circuit for exponential curvature compensation according to claim 3, characterized in that: The trimming module includes a non-trimable resistor, a first trimming unit, a second trimming unit, a third trimming unit, a fourth trimming unit, a fifth trimming unit and a sixth trimming unit; wherein: The low potential end of the first trimming unit serves as the low potential end of the trimming module, and the high potential end of the first trimming unit is electrically connected to the low potential end of the second trimming unit; The high potential end of the second trimming unit is electrically connected to the low potential end of the third trimming unit; The high potential end of the third trimming unit is electrically connected to the low potential end of the fourth trimming unit; The high potential end of the fourth trimming unit is electrically connected to the low potential end of the fifth trimming unit; The high potential end of the fifth trimming unit is electrically connected to the low potential end of the sixth trimming unit; The high potential end of the sixth trimming unit is electrically connected to one end of the non-trimming resistor; The other end of the non-adjustable resistor serves as a high potential end of the adjustment module.

5. The bandgap reference source circuit for exponential curvature compensation according to claim 4, characterized in that: The first trimming unit includes a first trimming resistor and a first trimming MOS tube; the source of the first trimming MOS tube is electrically connected to one end of the first trimming resistor, serving as a low potential end of the first trimming unit; the drain of the first trimming MOS tube is electrically connected to the other end of the first trimming resistor, serving as a high potential end of the first trimming unit; The second trimming unit includes a second trimming resistor and a second trimming MOS tube; the source of the second trimming MOS tube is electrically connected to one end of the second trimming resistor, serving as a low potential end of the second trimming unit; the drain of the second trimming MOS tube is electrically connected to the other end of the second trimming resistor, serving as a high potential end of the second trimming unit; The third trimming unit includes a third trimming resistor and a third trimming MOS tube; the source of the third trimming MOS tube is electrically connected to one end of the third trimming resistor, serving as a low potential end of the third trimming unit; the drain of the third trimming MOS tube is electrically connected to the other end of the third trimming resistor, serving as a high potential end of the third trimming unit; The fourth trimming unit includes a fourth trimming resistor and a fourth trimming MOS tube; the source of the fourth trimming MOS tube is electrically connected to one end of the fourth trimming resistor, serving as a low potential end of the fourth trimming unit; the drain of the fourth trimming MOS tube is electrically connected to the other end of the fourth trimming resistor, serving as a high potential end of the fourth trimming unit; The fifth trimming unit includes a fifth trimming resistor and a fifth trimming MOS tube; the source of the fifth trimming MOS tube is electrically connected to one end of the fifth trimming resistor, serving as a low potential end of the fifth trimming unit; the drain of the fifth trimming MOS tube is electrically connected to the other end of the fifth trimming resistor, serving as a high potential end of the fifth trimming unit; The sixth trimming unit includes a sixth trimming resistor and a sixth trimming MOS tube; the source of the sixth trimming MOS tube is electrically connected to one end of the sixth trimming resistor, serving as a low potential end of the sixth trimming unit; the drain of the sixth trimming MOS tube is electrically connected to the other end of the sixth trimming resistor, serving as a high potential end of the sixth trimming unit.

6. The bandgap reference source circuit for exponential curvature compensation according to claim 3, characterized in that: The exponential curvature compensation subcircuit further includes a filtering module, the input end of the filtering module is electrically connected to the high potential end of the adjustment module, and the output end of the filtering module serves as the output end of the exponential curvature compensation subcircuit, wherein: The filtering module is used to stabilize the exponential curvature compensation voltage.

7. The bandgap reference source circuit for exponential curvature compensation according to claim 6, characterized in that: The filtering module includes a filtering resistor and a second capacitor; wherein: The first end of the filter resistor serves as the input end of the filter module, and the second end of the filter resistor serves as the output end of the filter module; The first end of the second capacitor is electrically connected to the second end of the filter resistor, and the second end of the second capacitor is electrically connected to the ground.

8. The bandgap reference source circuit for exponential curvature compensation according to claim 2, characterized in that: It also includes a starter circuit, and the output end of the high-gain operational amplifier is electrically connected to the gate of the second PMOS tube through the starter circuit; wherein: The starter subcircuit is electrically connected to the power interface; the input end of the starter subcircuit is electrically connected to the output end of the exponential curvature compensation subcircuit; the first transmission end of the starter subcircuit is electrically connected to the output end of the high-gain operational amplifier; the second transmission end of the starter subcircuit is electrically connected to the gate of the second PMOS tube; The start-up subcircuit is used to provide a bias current and a bias voltage to the bandgap core subcircuit, so that the bandgap core subcircuit gradually enters a stable working state after being powered on.

9. The bandgap reference source circuit for exponential curvature compensation according to claim 8, characterized in that: The starter circuit includes a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth PMOS transistor and a fifth PMOS transistor; wherein: The gate of the first NMOS tube serves as the first transmission end of the starter subcircuit, the source of the first NMOS tube is electrically connected to the ground end, and the drain of the first NMOS tube is electrically connected to the drain of the fourth PMOS tube; The gate of the second NMOS tube serves as the input end of the starter circuit, the source of the second NMOS tube is electrically connected to the ground end, and the drain of the second NMOS tube is electrically connected to the gate of the third NMOS tube; The source of the third NMOS tube is electrically connected to the ground terminal, and the drain of the third NMOS tube is electrically connected to the drain of the fourth PMOS tube; The source of the fourth PMOS tube is electrically connected to the power interface, the gate of the fourth PMOS tube serves as the second transmission end of the starter subcircuit, and the drain of the fourth PMOS tube is electrically connected to the gate of the fourth PMOS tube; The source of the fifth PMOS tube is electrically connected to the power interface, the gate of the fifth PMOS tube is electrically connected as the input end of the starter subcircuit, and the drain of the fifth PMOS tube is electrically connected to the gate of the third NMOS tube.

10. A bandgap reference source system for exponential curvature compensation, characterized in that: The invention comprises a bandgap reference source circuit for exponential curvature compensation, a power supply and a load as claimed in any one of claims 1 to 9; the power supply is electrically connected to the power interface of the bandgap reference source circuit for exponential curvature compensation; the load is electrically connected to the voltage interface of the bandgap reference source circuit for exponential curvature compensation; wherein: The power supply is used to input a positive voltage to the bandgap reference source circuit for exponential curvature compensation; The exponential curvature compensated bandgap reference source circuit is used to output an exponential curvature compensated voltage to the load.

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