831 results about "Charge sharing" patented technology

A memory cell includes a storage capacitor, a read line, and a storage transistor, where the storage transistor is connected to the read line and is subject to activation by a charge in the storage capacitor. An in-memory processor includes a memory array which stores data, and an activation unit to activate at least two cells in a column of the memory array at generally the same time, thereby to generate a Boolean function output of the data of the at least two cells, wherein each of the at least two cells includes at least a storage capacitor, a storage transistor and a read line, where the storage transistor is connected to the read line and subject to activation by a charge in the storage capacitor.

The invention is a capacitance fingerprint access chip, it includes capacitance sensing array which is arranged with planar type and a dynamic random access memory peripheral circuit. The device usesDRAM charge sharing theory to examine the apex and the vale of the fingerprint. The peripheral circuit outputs the result of each capacitance sensor. The manufacturing method belongs to integrate circuit craft, especially the CMOS craft. The invention can be biological identification of people, applies to notebook PC, personal digital assistant and mobile.

A LCD and a method of driving the LCD are provided. The LCD includes first and second gate lines extending in a first direction, a data line insulated from the first gate line and crossing the first gate line, a pixel electrode including first and second sub-pixel electrodes, the pixel electrode being disposed in a pixel having a long side in the first direction, a first thin film transistor (TFT) connected to the first gate line, the data line, and the first sub-pixel electrode, a second TFT connected to the first gate line, the data line, and the second sub-pixel electrode, and a third TFT connected to the second gate line, the second sub-pixel electrode, and a charge-sharing capacitor, the charge-sharing capacitor sharing a data voltage applied to the second sub-pixel electrode.

According to different embodiments of the present invention, various methods, devices and systems are described for managing power in charge pumps in a non-volatile memory system having a high voltage charge pump and associated regulator. A method includes the following operations, receiving an operation command corresponding to an operation, pumping up a charge pump output voltage to a desired output voltage, turning off the regulator and the charge pump when the output voltage is approximately the desired output voltage compensating for charge sharing by turning on the charge pump and setting a pump clock rate to a slow clock rate in order to avoid overshooting the desired output voltage by the charge pump while the operation is being carried out, and compensating for junction leakage by turning on the regulator and the charge pump until the charge pump output voltage is the desired output voltage.

A liquid crystal display device with a charge sharing function is suitable for reducing the power consumption below a predetermined limit. In the liquid crystal display device, a pair of pixels adjacent along the data line is charged with pixel data voltages of polarity opposite to that of another pair of pixels adjacent to the pair of the pixels. A charge sharing unit selectively allows the data lines to share charges at intervals between periods in which the pixel data voltages are supplied to the pair of the pixels adjacent along the data line.

A method for correcting at least one of pileup effects or charge sharing effects in multi-cell photon counting detectors includes determining a correction coefficient using a count rate of an entire spectrum and applying the determined correction to the counts recorded in an energy window of interest.

This invention discloses a HiNAND array scheme with multiple-level of bit lines (BLs) including metal3 global bit lines (GBLs), divided metal2 Segment bit lines (SBLs), and divided metal1 block bit lines (BBLs) laid out in parallel to each other respectively for a plurality of NAND Strings. All other source lines or power lines connected to bottoms of corresponding String capacitances of GBLs, SBLs, and BBLs are associated with metal0 line laid out perpendicular to those BLs. Under the HiNAND array scheme, conventional one-WL Read and Program-Verify operations are replaced by multiple-WL and All-BL Read and Program-Verify operations executed with charge capacitance of SBLs being reduced to 1/10- 1/20 of capacitance of GBLs to achieve DRAM-like faster operation, less operation stress, and lower power consumption. A preferred set of program biased voltages on the selected WL and remaining non-selected WLs associated with a Multiplier and a DRAM-like charge-sharing Latch Sensing Amplifier is proposed.

A liquid crystal display includes first and second gate lines, a data line crossing the first and second gate lines, a pixel electrode including first and second sub-pixel electrodes electrically disconnected from each other, a first thin film transistor connected to the first gate line, the data line, and the first sub-pixel electrode, a second thin film transistor connected to the first gate line, the data line, and the second sub-pixel electrode, and a third thin film transistor connected to the second gate line, the second sub-pixel electrode, and a charge sharing capacitor including a first and second electrode. A data voltage applied to the second sub-pixel electrode and to a first electrode swings between a negative voltage and a positive voltage with respect to a common voltage, and a voltage smaller than an average value of the negative voltage and the positive voltage is applied to a second electrode.

The disclosure provides a gate driving circuit on array applied to a display panel with charge sharing pixel structure. In particular, the gate driving circuit is adapted to receive multi-phase clock signal and includes a plurality of shift registers. Each shift register includes a driving circuit including a first driving transistor and a second driving transistor, a pull-down unit and at least one pull-up unit, so that is capable of generating mutually non-overlapped main gate driving signal and sub gate driving signal. Furthermore, the advantage of the disclosure is to provide a gate driving circuit with simplified circuit structure and circuit layout.

A method is provided for driving a liquid crystal display having a multi-channel single-amplifier structure, where the number of times of coupling according to video signals transmitted to adjacent source lines while the source lines are floated is 3 and it is equal for the respective source lines for 6 frames, noise aspects of the respective source lines are similarly repeated for every 6 frames, kick-back noise compensation is uniformly applied to the source lines S_r, S_g and S_b with noise of the 6 frames averaged, and charge sharing time of parasitic capacitors between the source lines and charge sharing time of capacitors of liquid crystal cells become similar to each other.

There is provided a TFT-LCD using multi-phase charge sharing, in which odd-numbered source lines and even-numbered source line are connected to an external capacitor through a switching element during a period of multi-phase charge sharing time, to share the charges charged in the source lines. The TFT-LCD includes: a source driver for outputting video data signals each of which corresponds to one pixel through a plurality of source lines; switching elements for multi-phase charge sharing; and an external capacitor, connected between a liquid crystal panel and the source driver, for collecting charges of a source line having a voltage higher than a common electrode voltage and supplying them to a source line having a voltage lower than the common electrode voltage when the source lines are connected thereto.

A pixel structure includes a first sub-pixel and a second sub-pixel. The first sub-pixel includes a first switching transistor and a first liquid crystal capacitor, wherein when the first switching transistor is turned on, the first liquid crystal capacitor is biased to a first gray level voltage. The second sub-pixel includes a second switching transistor, a second liquid crystal capacitor, a third switching transistor, a charge sharing capacitor and a fourth switching transistor, wherein when the second switching transistor is turned on, the second liquid crystal capacitor is biased to the first gray level voltage; when the fourth switching transistor is turned on, the charge sharing capacitor is reset to a predetermined voltage; and when the third switching transistor is turned on, the second liquid crystal capacitor and the charge sharing capacitor are charge-shared to a second gray level voltage through the third switching transistor.

A method for charge sharing between source lines of a pixel array. The method includes the steps of grouping the source lines into pairs, implementing charge sharing if data polarities of a currently and a last scanned row are different; otherwise, in each pair of the source lines, estimating a first and second energy driving the two source lines respectively with and without a preliminary charge sharing, and implementing charge sharing only if the first energy is smaller than the second energy.

A radiation detector system is provided including a semiconductor detector, plural pixelated anodes, and at least one processor. At least one of the pixelated anodes is configured to generate a collected charge signal corresponding to charge collected by the pixelated anode and to generate a non-collected charge signal corresponding to charge collected by an adjacent anode. The at least one processor includes a tangible and non-transitory memory having stored thereon instructions configured to direct the at least one processor to determine a collected value for the collected charge signal, to determine a non-collected value for the non-collected charge signal, determine a calibrated value for the non-collected charge signal, determine a total charge produced by a charge sharing event using the collected value and the calibrated value, and count the charge sharing event as a single event if the total charge exceeds a predetermined value.

A liquid crystal display includes first and second gate lines arranged in parallel to each other and sequentially transmitting a gate voltage, a data line crossing the first and second gate lines and transmitting a data voltage, a pixel electrode constituted by first and second sub-pixel electrodes and electrically disconnected from each other, a first switching element connected to the first gate line, the data line, and the first sub-pixel electrode, a second switching element connected to the first gate line, the data line, and the second sub-pixel electrode, a third switching element connected to the first sub-pixel electrode across a charge-sharing capacitor, and a fourth switching element connected to the second gate line and the second sub-pixel electrode and connected to the first sub-pixel electrode across the charge-sharing capacitor.

The present invention relates to a technique for outputting threshold voltages by properly changing the threshold voltages such that the threshold voltages can protect low-voltage driving elements within an analog to digital converter when the threshold voltages of an OLED display panel are sensed and outputted to the analog to digital converter. The present invention comprises: a sampling capacitor which samples threshold voltages sensed and inputted from an organic light-emitting diode on a display panel; a charge-sharing capacitor which charges and shares the threshold voltages sampled from the sampling capacitor, or solely charges the threshold voltages to bypass the threshold voltages; and a sample-and-hold unit which has a plurality of switches for performing switching operations for the sampling operation of the sampling capacitor and the charging and the sharing of the charge-sharing capacitor, and scales the threshold voltages to threshold voltage areas having a certain value or less.

The present invention provides an internal voltage generator including a high efficient charge pump. The internal voltage generator includes an oscillation signal generator for receiving a reference voltage and a pumping voltage to thereby output an oscillation signal, a pump control logic for outputting a pumping control signal and a precharge signal in response to the oscillation signal, and a charge pump for precharging the pair of bootstrapping node by connecting the pair of bootstrapping node in response to the precharge signal to thereby generate the pumping voltage of a predetermined level after precharging the pair of bootstrapping node into a level of the power supply voltage and charge sharing the pair of bootstrapping node and the pumping voltage in response to the precharge signal. Herein, the pumping control signal controls a pumping operation and the precharge signal precharges a pair of bootstrapping node for generating the pumping voltage by pumping a power supply voltage.

In at least one embodiment of the present invention, deterioration of display quality is prevented from occurring in a display device provided with an active matrix substrate even when a larger size or a higher resolution is employed and a drive frequency is increased. In an active matrix substrate of a liquid crystal display device, a charge sharing control signal line is disposed so as to be arranged along each gate line and charge sharing TFTs are provided for each source line in numbers equal to the number of the gate lines. The gate terminal of the charge sharing TFT is connected to the charge sharing control signal line and the source and drain terminals are connected with neighboring source lines via connection electrode portions, respectively. Each of the charge sharing control signal lines is provided with a signal which turns on the charge sharing TFT for a predetermined period of every one horizontal period.

A liquid crystal display includes a liquid crystal display panel having a plurality of data lines, a plurality of gate lines crossing the plurality of data lines, and a plurality of liquid crystal cells, a timing controller to determine gray levels of input digital video data and a time at which a polarity of a data voltage to be supplied to the data lines is inverted, to activate a dynamic charge share control signal to indicate a time at which the gray level of the data voltage is changed from a white gray level to a black gray level and a time at which the polarity of the data voltage is inverted, to detect weakness patterns in which the data of the white gray level and the black gray level are regularly arranged in the input digital video data, and to activate a dot inversion control signal for widening a horizontal polarity inversion period of data voltages to be supplied to the data lines when the weakness patterns are input, a data driving circuit to convert the digital video data from the timing controller into the data voltage, to convert the polarity of the data voltage, to supply any one of a common voltage and a charge share voltage between a positive data voltage and a negative data voltage to the data lines in response to the dynamic charge share control signal, and to widen the horizontal polarity inversion period of the data voltages in response to the dot inversion control signal, and a gate driving circuit to sequentially supply a scan pulse to the gate lines under the control of the timing controller.

An add-on adapter 110 enables a single charging port 102 of an electric vehicle charging station 100 to simultaneously charge two electric vehicles. An adapter controller 120 determines the available charging rate offered by the charging station. Electric vehicle charging handles 150A, 150B are determined to be connected to the electric vehicles. A charge sharing control circuit 300 in the adapter controller, determines modified available charging rates to be offered for simultaneously charging the electric vehicles. The modified available charging rates are based on the connection states of the electric vehicles and the available charging rate offered by the charging station. The adapter controller controls two contactors 130A, 130B to switchably connect a charging station power socket to the electric vehicle charging handles, to provide shared power at the determined modified available charging rate to the electric vehicles, for simultaneous charging.

A driving method for a Liquid Crystal Display (LCD) device is used for reducing power consumption of the LCD device. The driving method includes determining a driving approach of the LCD device, and performing corresponding charge sharing on a plurality of data channels according to the driving approach. The driving approach of the LCD device is determined according to a latch data (LD) signal and a polarity signal.