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50 results about "2d array" patented technology

3D dram with bit line select and pre-charge transistors

A DRAM is provided including a block with a 3D array of memory cells. The block includes a set of planes stacked along a first axis, including a subset of stacked planes. Each plane of the subset includes a 2D array of memory cells organized in rows and columns. The block has multiple sub-blocks arranged along the second axis with each sub-block containing one column of memory cells of each plane. The DRAM has a plurality of bit lines extending along the first axis in one of the sub-blocks and connected to one memory cell in each plane and includes a plurality of global bit lines connected to the bit lines in each sub-block. Bit line selector transistors of the DRAM connect bit lines to global bit lines and bit line pre-charge transistors of the DRAM connect bit lines to charging lines to charge the bit line.
Owner:INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW) +1

Multi-target spot beamforming using reconfigurable intelligent surface

A method of controlling a reconfigurable intelligent surface (RIS) is provided for multi-target spot beamforming at a plurality of target beam focus positions. The RIS includes a 2D array of unit cells, each unit cell being controllable to be at any selected one of a plurality of wave propagation path states for providing a corresponding degree of phase shift for an incident electromagnetic wave irradiated thereon. The method includes: for each of the plurality of target beam focus positions: determining, for each unit cell of the plurality of the 2D array of unit cells, an interference pattern at the unit cell between a reference wave from a multi-mode orbital angular momentum (OAM) signal transmitter to the unit cell and an object wave from the target beam focus position to the unit cell, the multi-mode OAM signal transmitter being configured to generate and transmit a multi-mode OAM signal to irradiate the RIS at a surface thereof; and for each unit cell of the plurality of the 2D array of unit cells: determining a holograph pattern based on the interference patterns determined at the unit cell for the plurality of target beam focus positions; determining a degree of phase shift for the unit cell to provide based on the holograph pattern determined for the unit cell; and controlling the unit cell to be at a selected one of the plurality of wave propagation path states corresponding to the degree of phase shift determined for the unit cell to provide. There is also provided a corresponding RIS controller and a corresponding multi-target spot beamforming system.
Owner:NANYANG TECH UNIV

2d array image foveated processing method and electronic device using the same

A two-dimension (2D) array image foveated processing method and an electronic device applying the same are provided. The 2D array image foveated processing method includes: generating a region of interest (ROI); based on a distance relationship between a target pixel or a target block of a 2D array image to the ROI, generating a processing level parameter of the target pixel or the target block; and performing image region inside processing or image region outside processing on the target pixel or the target block inside or outside the ROI based on the processing level parameter; and compressing the image after being processing by image region inside processing or image region outside processing.
Owner:LEE CHI FENG +1

Coherent fiber optic breakout cable assembly and method for fabricating same

A coherent fiber optic bundle breakout cable assembly includes a trunk fiber bundle having a plurality of optical fibers in a close-packed 2D array at a trunk connector end face, and multiple breakout bundles emanating from the trunk fiber bundle and each including a group of optical fibers in a close-packed 2D array at a breakout connector end face, with optical fibers being in lateral contact with one another. Bonding material is arranged in interstitial spaces of optical fibers near ends of each breakout bundle. A method for fabricating such an assembly includes holding the plurality of optical fibers within an elastomeric fixture, dicing the plurality of fibers to provide diced ends thereof, selectively applying and curing bonding material in interstitial spaces between optical fibers proximate to the diced ends according to a bundle-forming pattern, separating groups of optical fibers into breakout bundles, and retaining each breakout bundle in a corresponding breakout bundle ferrule aperture of one or more breakout bundle ferrules.
Owner:CORNING RES & DEV CORP

Data processing array

Apparatuses, computer programs and methods are disclosed, relating 2D arrays of data elements and a 2D array of processing elements. A first 2D array of data elements provides data values for processing by each processing element and a second 2D array of data elements provides control values controlling the processing. The 2D array of processing elements has a data flow direction across the 2D array of processing elements, and the data flow direction proceeds from a starting set of processing elements of the 2D array of processing elements. For each processing element not in the starting set of processing elements, the data processing operation preformed takes as an operand a respective data value provided by a neighbouring data element of the first 2D array of data elements and selection of the neighbouring processing element is controlled by a corresponding source control value in the second 2D array of data elements.
Owner:ARM LTD

Digital 2D Array Ultrasound Transducer

PendingUS20260251788A1Digital data2d array
An ultrasound imaging transducer receives echo data from a matrix of elements distributed in two or more dimensions. Received echo data is delayed using an analog delay circuit consisting of an array of signal storage capacitors addressed by input and output switches addressed by input and output counters. The output of the ARAM is digitized by an analog to digital converter (ADC). Digital data is processed and streamed to a base system for further processing to form and display an image. The input counter address update phase is programable in quanta less than or equal to one half the input counter address update period. The output counter address update phase is held at a fixed phase relationship to the ADC sampling clock. The signal delay through the ARAM is controlled by the summation of two or more controls.
Owner:SAVORD BERNARD JOSEPH

Method and apparatus for 3D ultrafast ultrasound localization microscopy imaging

The present disclosure proposes a method and apparatus for imaging at a microscopic scale a region of an organ of a human or animal, allowing the use of a 2D subsampled ultrasound probe while providing 3D ULM images with high resolution usually obtained only with a full 2D array matrix, by sorting the detected microbubbles and keeping only the microbubbles corresponding to the spots belonging to the main lobe of the Point Spread Function (PSF) of the microbubble and removing the phantom microbubbles corresponding to the spots belonging to the side lobes. It is also possible to provide a 3D non-invasive imaging of the microvascular flow of the region of an organ, such as a brain in-vivo, with high resolution and high sensitivity.
Owner:INST NAT DE LA SANTE & DE LA RECHERCHE MEDICALE (INSERM) +2

A 3D dram with bit line select and pre-charge transistors

The present disclosure relates to a 3D dynamic random access memory (3D DRAM). The DRAM comprises a block with a 3D array of memory cells. The block comprises a set of planes stacked along a first axis, including a subset of consecutively stacked planes. Each plane of the subset comprises a 2D array of memory cells organized in rows and columns. The block is divided into multiple sub-blocks arranged along the second axis, each sub-block containing one column of memory cells of each plane. The DRAM further comprises a plurality of bit lines extending along the first axis in one of the sub-blocks and connected to one memory cell in each plane, and comprises a plurality of global bit lines connected to the bit lines in each sub-block. A plurality of bit line selector (BLS) transistors, of the DRAM are configured to respectively connect one of the bit lines to one of the global bit lines. A plurality of bit line pre-charge (BLP) transistors of the DRAM are respectively configured to connect one of the bit lines to one of a plurality of charging lines to charge the bit line.
Owner:INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW) +1

Stacked laser library with apertures for obtaining high brightness white light sources

The invention provides a light generating system (1000) comprising a first support (2100), a first 2D array (2110) of first light sources (10), a first optical element (410), a second support (2200), a second 2D array (2210) of second light sources (20), and a second optical element (420) wherein: (A) the first support (2100) is configured to support the first light sources (10) and the second support (2200) is configured to support the second light sources (20); the first light source (10) is configured to generate first light source light (11) and the second light source (20) is configured to generate second light source light (21); wherein the first light source (10) comprises a laser diode and the second light source (20) comprises a laser diode; wherein the first support (2100) comprises a first thermally conductive element (2160) and / or wherein the second support (2200) comprises a second thermally conductive element (2260); (B) a first optical element (410) arranged downstream of the first light source (10) and configured to collimate the first light source light (11) into a first light beam (15) of collimated first light source light (11); a second optical element (420) arranged downstream of the second light source (20) and configured to collimate the second light source light (21) into a second light beam (25) of collimated second light source light (21); (C) the first support (2100) and the second support (2200) are configured to be stacked, where the second support (2200) comprises an array (2220) of through holes (2250) configured to align with the first optical element (410) to allow at least a portion of the collimated first source light (11) to propagate through the second support (2200); (D) The light generating system (1000) is configured to generate system light (1001) comprising one or more of the first light source light (11) and the second light source light (21).
Owner:SIGNIFY HOLDING BV

RF-camera with two-dimensional radio frequency pickup sensor

ActiveUS12676425B2Optical reflection2d array
The embodiment relates to the field of capturing a picture of the field of view with the same principles as a visual light camera, but with RF signals. This RF-camera uses an RF signal lens that concentrates the RF signal returned from the field of view on to a 2D array of antennas. The RF lens is achieved by a mirror lens rather than a glass lens used in visual light cameras. Mirroring RF signal is simple and mimic optical mirrors. The 2D array can be achieved by building an array of RF antennas on a silicon (or similar) chip. These antennas become smaller as the frequency increases.
Owner:HOFMAN ARTS (HARTS) LTD

Method and system for adaptive corner detection using dynamic vision sensors

A method for adaptive corner detection is provided. The method includes: obtaining one or more event data from a dynamic vision sensor; capturing and organizing a plurality of recorded events of the event data into a 2D array; transforming the 2D array into one or a plurality of Ordered Surface (OS) matrices by populating one or a plurality of empty Image Matrices with the recorded events based on their coordinates and assigning order values; and applying a corner detector to the OS matrices. A system for adaptive corner detection is also provided.
Owner:CITY UNIVERSITY OF HONG KONG

Solid-state imaging device and imaging device

PCT designated stageWO2025263158A1Capacitance2d array
[Problem] To provide a solid-state imaging device and an imaging device that enable the inhibition of a residual image which occurs in a pixel. [Solution] A solid-state imaging device according to a first aspect of the present disclosure comprises a pixel array unit in which a plurality of pixels are arranged in a 2D array format, wherein each of the pixels includes: a photoelectric conversion unit which accumulates electrical charge resulting from photoelectric conversion; a transfer transistor which transfers electrical charge stored in the photoelectric conversion unit resulting from the photoelectric conversion; a floating diffusion which stores the electrical charge transferred by the transfer transistor; a first capacitor which is connected to a first switching transistor and stores the electrical charge received from the floating diffusion; and a second capacitor which is connected to a second switching transistor and stores the electrical charge received from the floating diffusion.
Owner:SONY SEMICON SOLUTIONS CORP

Dual detail video encoding with region specific quality control

Described herein are, among other things, techniques for implementing a dual detail encoding scheme in a distributed display system. At the host computer, an application may render a frame for a scene at a first resolution. The host computer may generate a two-dimensional (2D) array of pixels for the frame, encode the 2D array of pixels, and transmit the encoded pixel data to the display device. The 2D array of pixels comprises, for each eye, a copy of the frame downscaled to a second resolution less than the first resolution, and a copy of a high-attention subregion of the scene. The 2D array of pixels may be encoded using a technique that controls a quality parameter at compression unit granularity, such as macroblock or coding tree unit granularity. At the display device, the encoded pixel data is decoded to obtain the 2D array of pixels for the frame.
Owner:VALVE CORPORATION

Radar systems with paired one-dimensional and two-dimensional antenna arrays

This document describes the techniques and systems for radar systems with paired one-dimensional (1D) and two-dimensional (2D) antenna arrays. Even with fewer antenna elements compared to conventional radar systems, the paired arrays allow the example radar system to achieve comparable angular resolution at a lower cost. For example, a 1D array includes antenna elements positioned in a first direction (e.g., azimuth direction) and spaced apart by a first and a second distance. A 2D array includes at least four additional antenna elements positioned in a first and a second direction (e.g., elevation direction). The additional antenna elements are spaced apart by a third distance in the second direction and by the sum of the first and second directions in the first direction. A processor can use a shared angle estimate to correlate the angles of corresponding objects in the first and second directions.
Owner:APTIV TECHNOLOGIES AG

3D DRAM with vertical word lines

The invention relates to a 3D DRAM. The DRAM includes a block having a 3D array of memory cells. The block includes a plurality of planes stacked along a first axis, each plane including a 2D array of memory cells organized in rows extending along a second axis perpendicular to the first axis and columns extending along a third axis perpendicular to the first and second axes. The block is divided into a plurality of sub-blocks arranged along a second axis, each sub-block including a column of memory cells per plane. The DRAM also includes a plurality of bit lines, where each bit line extends along a third axis in one of the planes and is connected to a column of memory cells in the plane, or where each bit line extends along a second axis in one of the planes and is connected to a memory cell in each sub-block. The DRAM also includes a plurality of global bit lines, wherein the global bit lines are connected to the bit lines in each sub-block. The DRAM also includes a plurality of sense amplifiers, wherein each sense amplifier is connected to one of the global bit lines.
Owner:INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW) +1

Optical beam scanning based on waveguide switching and position-to-angle conversion of a lens and applications

Techniques and devices for beam scanning using optical waveguides and an optical lens without moving parts for various applications including scanning light from a source to multiple waveguides or fibers with their terminals being in a 1D or 2D array for various applications including, e.g., ranging applications such as light detection and ranging (LiDAR), time of flight (ToF), coherent detection with a frequency modulated continuous wave (FMCW) laser, or microwave photonic FMCW source.
Owner:YAO XIAOTIAN STEVE

A 3D dram with vertical word lines

The present disclosure relates to a 3D DRAM. The DRAM comprises a block with a 3D array of memory cells. The block comprises multiple planes stacked along a first axis, each plane comprising a 2D array of memory cells organized in rows extending along a second axis perpendicular to the first axis and columns extending along a third axis perpendicular to the first and the second axis. The block is divided into multiple sub-blocks arranged along the second axis, each sub-block containing one column of memory cells of each plane. The DRAM further comprising a plurality of bit lines, wherein each bit line extends along the third axis in one of the planes and is connected to one column of memory cells in that plane, or wherein each bit line extends in one of the planes along the second axis and is connected to one memory cell in each sub-block. The DRAM further comprises a plurality of global bit lines, wherein the global bit lines are connected to the bit lines in each sub-block. The DRAM further comprises a plurality of sense amplifiers, wherein each sense amplifier is connected to one of the global bit lines.
Owner:INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW) +1

System and method for active acoustic control

ActiveUS12682878B22d arrayControl signal
According to the present disclosure there is provided an active acoustic control system for controlling an acoustic signal propagating along a propagation path, the system comprising: an active control unit configured to: receive information from a first sensor arrangement, the information related to the acoustic signal propagating along the propagation path; generate a control signal for controlling the acoustic signal based on the information from the first sensor arrangement, by being arranged to control: a first control source arrangement comprising a finite 2D array of first control sources for generating a first control signal for controlling a first component of the acoustic signal.
Owner:BAE SYSTEMS PLC

Backlight unit for backlit displays

The BLU includes a 2D array of LEDs that produce light with a nominal angular distribution of ±90 degrees around the center. A layer of transparent solid material is positioned with its bottom surface spanning the 2D array and is configured to convert the light produced by the 2D array into light with an angular distribution of less than ±90 degrees. A diffuser film is positioned across the upper surface of the layer of transparent solid material and is configured to diffuse light and produce diffused light on the upper surface of the diffuser film. A BEF is positioned across the upper surface of the diffuser film and comprises multiple prism microstructures, at least some of which have an apex angle of about 90 degrees. The BEF is configured to narrow the angular optical distribution of the diffused light produced on the upper surface of the diffuser film.
Owner:BRIGHT VIEW TECHNOLOGIES INC

Processors, methods, systems, and instructions to select and store data elements from two source two-dimensional arrays indicated by permute control elements in a result two-dimensional array

Techniques for permuting two source two dimensional (2D) arrays are described. A processor of an aspect includes a decoder circuitry to decode an instruction having an opcode. The instruction may indicate a first source 2D array, a second source 2D array, and permute control elements. Execution circuitry is coupled with the decoder circuitry. The execution circuitry is to execute the decoded instruction to select data elements, from among any data elements of the first source 2D array, and any data elements of the second source 2D array, that are each indicated by a different corresponding one of the permute control elements. The execution circuitry is also to store the selected data elements in data element positions of a result 2D array that each correspond to a different one of the permute control elements. Other processors, methods, systems, and instructions are disclosed.
Owner:INTEL CORP

Apparatus and method for light sheet imaging with optical coherence gating

Methods and devices are disclosed to perform depth resolved imaging using parallel lateral detection employing a photodetector block in a detection path that is substantially perpendicular to the direction of light excitation, with applications in microscopy of samples. The photodetector block either comprises a single 1D array of photodetectors or a 2D array of photodetectors. Methods and devices are disclosed to perform coherence gating in configurations of light sheet tomography, to enable simultaneous depth resolved measurements of structure and of index of refraction variation.
Owner:UNIVERSITY OF KENT

Dual Detail Coding in Distributed Systems

This specification describes, among other things, techniques for implementing a dual detail encoding scheme in a distributed display system. At a host computer, an application can render a frame of a scene at a first resolution. The host computer can generate a two-dimensional (2D) array of pixels of the frame, encode the 2D array of pixels, and transmit the encoded pixel data to a display device. The 2D array of pixels includes, for each eye, a copy of the frame downscaled to a second resolution lower than the first resolution and a copy of a sub-region of the scene. At the display device, the encoded pixel data is decoded to obtain the 2D array of pixels of the frame, and the 2D array of pixels is modified by upscaling the copy of the frame such that an image can be generated using the upscaled copy of the frame and the copy of the sub-region using blending.
Owner:VALVE CORPORATION

X-ray imaging apparatus and method

An x-ray imaging device for producing an x-ray image of an object comprises a support frame to which an x-ray source and an x-ray detector are connected. The x-ray source and the x-ray detector define an object space for an object to be inspected between them. The x-ray source is configured to emit an x-ray beam having a main direction from a focal spot into the object space. The x-ray detector comprises an array of pixels sensitive to x-ray radiation. The x-ray imaging device further comprises a collimator arranged close to the x-ray source and in the path of the x-ray beam between the x-ray source and the object to be inspected. The collimator comprises one or more collimator bodies defining a plurality of channels of the collimator, the channels having respective central directions defining a common focus of the collimator on the side of the x-ray source, the channels preferably being channels of a 2D array as seen in a plane perpendicular to the main direction of the x-ray beam.
Owner:MILABS BV

Data processing array

Apparatuses, computer programs and methods are disclosed, relating 2D arrays of data elements and a 2D array of processing elements. A first 2D array of data elements provides data values for processing by each processing element and a second 2D array of data elements provides control values controlling the processing. The 2D array of processing elements has a data flow direction across the 2D array of processing elements, and the data flow direction proceeds from a starting set of processing elements of the 2D array of processing elements. For each processing element not in the starting set of processing elements, the data processing operation preformed takes as an operand a respective data value provided by a neighbouring data element of the first 2D array of data elements and selection of the neighbouring processing element is controlled by a corresponding source control value in the second 2D array of data elements.
Owner:ARM LTD

3D DRAM with vertical bit lines

The invention relates to a dynamic random access memory (DRAM). In particular, the present disclosure proposes a 3D DRAM with vertical bit lines. The DRAM includes a block having a 3D array of memory cells. The block includes a plurality of planes stacked along a first axis. Each plane includes a 2D array of memory cells organized in rows extending along a second axis perpendicular to the first axis and columns extending along a third axis perpendicular to the first and second axes. The block is divided into a plurality of sub-blocks arranged along a second axis, each sub-block including a column of memory cells per plane. The DRAM also includes a plurality of bit lines, wherein each bit line extends along the first axis in one of the sub-blocks and is connected to one memory cell in each plane. The DRAM also has a plurality of global bit lines, wherein one or more global bit lines are connected to the bit lines in each sub-block. The DRAM also has a plurality of sense amplifiers, wherein each sense amplifier is connected to one of the global bit lines.
Owner:INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW) +1

Apparatus, system, and method of converting a digital signal into an analog signal

For example, a current-steering Digital to Analog Converter (DAC) may be configured to convert a digital signal into an analog signal. For example, the current- steering DAC may include a thermometer-decoded current-steering DAC including a two-dimensional (2D) array of current-steering cells. For example, the 2D array may include a plurality of first-dimension subarrays and a plurality of second-dimension subarrays. For example, a current-steering cell of the 2D array may be switchable between a first steering state to steer a current of the current-steering cell to a first current path, a second steering state to steer the current of the current-steering cell to a second current path, and a third steering state to steer the current of the current-steering cell to a switch path of a plurality of switch paths corresponding to the plurality of second-dimension subarrays.
Owner:MOBILEYE VISION TECH LTD