Multidimensional array rapid read-write method and apparatus on dynamic random access memory

A technology of dynamic random access, reading and writing methods, applied in static memory, digital memory information, information storage, etc., to achieve the effect of saving storage space

Inactive Publication Date: 2006-09-06
XIAOSHAN IND RES INST
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The problem is even more serious for two-dimensional arrays

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  • Multidimensional array rapid read-write method and apparatus on dynamic random access memory
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  • Multidimensional array rapid read-write method and apparatus on dynamic random access memory

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Embodiment Construction

[0041] First analyze the read and write rules of DRAM. Each DRAM chip generally has 2 or 4 banks, and each bank is an array of memory cells organized in rows and columns. DRAM access includes three parts: row selection, column selection and precharge (precharge). Row selection is to give the DRAM chip an active (activation) command and row address, after t RCD At this time, the row of data represented by the row address will be copied to the row buffer inside the chip. Column selection is to read and write data on the row buffer according to the column address. Because the reading and writing are all on the row buffer when selecting the column, the speed is very fast. No matter whether the given column address is continuous or not, the data pin can transmit one number in one clock cycle (DDR can transmit two numbers in one clock cycle), such as figure 1 and figure 2 shown, but only if the data to be accessed is in the currently open DRAM row. If the data to be accessed i...

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Abstract

The disclosed read-write method comprises: according to the capacity per line of DRAM and the read-write time ratio I/J of per row and column, determining the column value A=(CI/J)1/2 and row value B=(CJ/I)1/2 of sub-matrix divided by the 2D array; when writing 2D array on DRAM by row or column, writing the data labeled the AXB sub-matrix on one row of DRAM in turn; when reading the 2D array, selecting one by one the relative row by address conversion to read out all data in one row and turn to the next. Besides, there is an address generator in the control logic unit of DRAM. This invention saves time and space.

Description

technical field [0001] The invention relates to a method for reading and writing a dynamic random access memory (Dynamic Random Access Memory, abbreviated as DRAM), in particular to a method for reading and writing two-dimensional or more than two-dimensional arrays on the dynamic random access memory. Background technique [0002] In current computer applications, two-dimensional arrays are often processed, such as image processing, radar and sonar digital signal processing, machine vision and image tracking, synthetic aperture radar imaging, coordinate conversion, etc. Two-dimensional arrays are currently stored in one-dimensional form on the storage system of the computer, that is, from the physical address of the storage system, if the data in the row direction of the two-dimensional array is stored continuously, the data in the column direction is stored non-contiguously. of. This discontinuous storage makes it impossible to use certain fast read and write methods for ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/409G11C7/00
Inventor 莫志锋韩承德王贞松
Owner XIAOSHAN IND RES INST
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