242 results about "Mean frequency" patented technology

Circuits of a TAF-DPS clock generator implemented on programmable logic chip comprise: 1) a base time unit generator created from configurable blocks, or on-chip PLL, or on-chip DLL, said base time unit generator produces a plurality of phase-evenly-spaced-signals; 2) a TAF-DPS frequency synthesizer created by configuring configurable blocks of said programmable logic chip, said TAF-DPS frequency synthesizer takes said plurality of phase-evenly-spaced-signals as its input. Methods of creating flexible clock signal to drive application comprise: 1) selecting one or more strategic areas in said programmable logic chip; 2) creating one or more TAF-DPS clock generator for each said area by using the configurable resource in said area; 3) creating control function to control the frequency and duty-cycle of the TAF-DPS clock generator output, said control function can be circuit created from configuring configurable blocks, said control function can also be achieved by software; 4) driving the circuits in application by the flexible clock generated from said TAF-DPS clock generator.

An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing techniques to allow contemporaneous, parallel communications across a plurality of frequency channels. Moreover, an automatic frequency control resolves some issues of a free-running clock in an upstream tuner of the central concentrator by performing adjustments based on the average frequency error of a number of active upstream tones. In the preferred embodiments of the present invention, the automatic frequency control (AFC) utilizes a feedback loop for at least each active upstream tone. Also, the average of the active upstream tones is determined and is utilized in providing feedback to adjust the automatic frequency control (AFC).

A clock system includes a digital phase/frequency detector (DPFD), a buffer, a digitally-controlled oscillator (DCO) including a sigma-delta modulator (SDM), an adder, a first frequency divider. The DPFD may have a first input for a reference input clock and a second input for a feedback signal, and outputting a difference signal representing a phase and/or frequency difference between the reference input clock and the feedback signal. The buffer may be coupled to the DPFD for accumulating the difference signal over time. The sigma-delta modulator (SDM) may have a control input coupled to the buffer. The adder may have inputs coupled to the (SDM) and a source of an integer control word. The first frequency divider may have an input for a clock signal and a control input coupled to the adder, the DCO generating an output clock signal having an average frequency representing a frequency of the input clock signal divided by (N+F/M), wherein N is determined by the integer control word and F/M is determined by an output of the SDM. The system clock also may include a phase-locked loop (PLL) including a phase/frequency detector that has a first input coupled to the output of the DCO and a second input that is phase-locked to the first input, and a second frequency divider coupled from the second input of the PLL to the second input of the DPFD.

A system and method for power conversion synchronizes multiple phases at a desired phase angle difference. The power conversion involves variable frequency switching, fixed on-time and provides power factor correction. A relative measure of a phase angle difference between two phases permits each phase to be controlled to obtain the desired phase angle difference. The power conversion involves transition mode switching to help reduce switching losses. A phase angle difference detector may be provided for each phase. The various phases may have different inherent frequencies that vary with switching frequency, and are synchronized to an average frequency. Current measures can be taken with a single component, such as a resistor. A maximum frequency control limits period width to avoid high frequency switching. An added switch on time improves input voltage crossover distortion. One or more phases can be deactivated in light load conditions.

Demodulation apparatus includes a transversal filter characterized by coefficients adjusted by a coefficient determiner responsive to a constant modulus error signal and variable mode error signal related to the output of a spectral mean frequency detector having its input coupled to the output of the transversal filter.

The invention provides an isolated island operation detection method of photovoltaic grid-connected generation system which includes: a control device detects voltage frequency of grid-connected point, judges voltage frequency of grid-connected point whether reaching frequency protection threshold, if yes, a start anti-isolated island protection signal is outputted; if not, frequency signal of grid-connected current instruction is calculated by using double positive feedback active frequency deflection method, and the frequency signal is outputted; the double positive feedback active frequency deflection method is that obtained grid-connected point voltage frequency deflection relative to average frequency is used as first positive feedback, and change trend of frequency deflection is used as second positive feedback, feedback magnification factor of first positive feedback is adjusted. The method realizes isolated island detection rapidly, simulation and experimental result, isolated island detection time is shorten in 0.10s, 0.13s, grid-connected current harmonic distortion THD are 2.06%, 2.97% respectively, and has advantage over traditional method in isolated island detection speed and reducing interference to power network.

An optical sensing system uses light scattered from a sensing fibre to sense conditions along the fibre, and has a receiver with a frequency to amplitude converter to obtain a frequency of a Brillouin component of the received scattered light, to deduce the conditions. This converter can avoid time consuming scanning of frequencies to obtain the Brillouin frequency spectrum, and avoids the heavy processing load of deducing a peak or average frequency from the spectrum. The converter can be implemented in the optical domain using a grating or interferometer, or in the electrical domain using a diplexer or electrical interferometer. It can generate complementary signals, having opposite signs, a ratio of these signals representing the frequency. This can avoid sensitivity to amplitude changes in the received scattered signals and provide common mode rejection of noise.

A signal processor comprises wheel speed-detecting means for detecting a wheel speed signal including vibrational components of a tire, extraction means for extracting a resonant frequency of the vibrational components of the tire or a tire spring constant based on the wheel speed signals, air pressure-estimating means for estimating a tire air pressure based on the resonant frequency or the tire spring constant, and determining means for determining whether the estimated tire air pressure is abnormal or not by comparing with a determination value. Further, correcting means corrects at least one of the determination value, the estimated tire air pressure, the resonant frequency and the tire spring constant in response to a tire temperature. A temperature-sensing device is mounted inside the signal processor to detect a temperature associated with the tire temperature.

Bioelectric impedances are measured by use of a plurality of electrodes which are brought into contact with body parts of a living body, muscle volumes and maximum voluntary contractions in body parts such as both hands and feet of the subject are calculated from the measured bioelectric impedances, a mechanomyogram when several degrees of loads are imposed on a muscle is also measured, the mechanomyogram data is frequency analyzed so as to determine average frequency and amplitude data, the amounts of actions (frequency of emission) of muscle fibers are calculated from inflection points thereof, and the type of the muscle (muscle fibers) and muscle fatigue of the subject are determined, so as to easily measure a maximum voluntary contraction which has heretofore been difficult to measure and make evaluations associated with muscles more accurately.

The field of the invention is that of the reception of a radionavigation signal originating from a satellite positioning system such as the GPS system. The present invention concerns a method for calculating correlations between a first sequence and a second sequence, said first sequence and said second sequence having a duration D_Code, the first sequence being extracted from a digital signal comprising a code, said code comprising elementary time divisions, called chips, of mean duration D_chip, said chips being synchronized with pulses delivered by an NCO oscillator at the mean frequency 2/D_chip, the second sequence resulting from a sampling at a frequency F_e of an analog signal, the frequency F_e being greater than 2/D_chip. According to the invention, the method comprises a step of aggregating samples of the second sequence, over consecutive integration intervals of duration equal on average to D_chip/2, starting at each pulse of the NCO oscillator, so as to determine results of elementary aggregates.

A clock system includes a digital phase/frequency detector (DPFD), a buffer, a digitally-controlled oscillator (DCO) including a sigma-delta modulator (SDM), an adder, a first frequency divider. The DPFD may have a first input for a reference input clock, a second input for a feedback signal, the DPFD generating an output representing a difference between the reference input clock and the feedback signal. The buffer may be coupled to the DPFD for accumulating the difference signal over time. The sigma-delta modulator (SDM) may have a control input coupled to the buffer. The adder may have inputs coupled to the (SDM) and a source of an integer control word. The first frequency divider may have an input for a clock signal and a control input coupled to the adder, the DCO generating an output clock signal having an average frequency representing a frequency of the input clock signal divided by (N+F/M), wherein N is determined by the integer control word and F/M is determined by an output of the SDM. The system clock also may include a second frequency divider coupled to the DCO output clock signal outputting the feedback signal to the DPFD.

A high-speed laser perfusion imaging instrument including a laser source, a detector, a signal-processing unit, data memory, and a screen to display results. A section of a sample surface is illuminated with laser light; reemitted light from the irradiated surface is collected by focusing optics on a 2D array of integrating photodetectors having elements that can be accessed individually or in a pre-defined selection of pixels at high speed. This 2D array measures intensity variations at each individual pixel. Average amplitude and mean frequency of the measured signal contain information about concentration and speed of moving blood cells. For real-time imaging, exposure time is used as a parameter to measure relative perfusion changes. These data are stored and processed with the signal-processing unit to deliver 2D flow maps of the illuminated sample section, and allow a simple overlay between a conventional image and processed flow maps.

The frequency of a skew clock signal is dithered around a base frequency, thereby enabling this clock signal to comply with FCC requirements for electromagnetic emissions within a specified window. Delay is introduced such that the clock signals exhibits slightly different frequencies in successive periods. For example, the frequency of a 100 MHz clock signal can be adjusted to have frequencies of approximately 98, 98.5, 99, 99.5, 100, 100.5, 101, 101.5, and 102 MHz during different periods. Because the frequencies are spread in 0.5 MHz increments, only three frequencies are included in any 1 MHz window. As a result, ⅔ of the energy of the clock signal is not included when determining whether the clock signal meets the FCC electromagnetic emission requirements. By spreading the frequencies above and below the base frequency in a regular manner, the average frequency of the clock signal becomes equal to the base frequency.

A method for sensing touch inputs to a digital equipment is provided, comprising the steps of sensing a sound/vibration signal generated by a touch, digitally processing the sensed sound/vibration signal, and determining the type of touch means that has generated the touch and the intensity of the touch based on the properties of the processed sound/vibration signal, wherein the properties include at least one of the following properties of the sound/vibration signal in time domain: maximum amplitude, average amplitude, average frequency, mean, standard deviation, standard deviation normalized by overall amplitude, variance, skewness, kurtosis, sum, absolute sum, root mean square (RMS), crest factor, dispersion, entropy, power sum, center of mass, coefficients of variation, cross correlation, zero-crossings, seasonality, DC bias, or the above properties computed for the first, second, third or higher order of derivatives of the sound/vibration signal; and the following properties of the sound/vibration signal in frequency domain: spectral centroid, spectral density, spherical harmonics, total average spectral energy, band energy ratios for every octave, log spectral band ratios, linear prediction-based cepstral coefficients (LPCCs), perceptual linear prediction (PLP) cepstral coefficients, mel-frequency cepstral coefficients, frequency topology, or the above properties computed for the first, second, third or higher order of derivatives of a frequency domain representation of the sound/vibration signal. There is also provided a device for sensing touch inputs.

A system, method and system are disclosed for using a variable frequency clock generator to synchronize an average data rate over intervals of time in a variable clock domain to make it equal to a fixed data rate in a fixed clock domain while reducing electromagnetic interference, among other things. In various embodiments, setting the data rates equal to each other minimizes storage used to transition data signals between clock domains. In one embodiment, a variable frequency clock generator includes a phase modulator configured to form a variable frequency clock. Also, the variable clock generator is configured to maintain an average frequency over specific periods of time for the range of discrete frequencies. The phase-offset controller sets an average clock having substantially no offset between a fixed data rate in the fixed clock domain and an average data rate in the variable clock domain.

A mobile device includes an antenna, a signal processing unit and a main processor. The mobile device increases or re-initializes the variable power measurement period based on the occurrence or frequency of cell reselections, rather than relying upon GPS information. The signal processing unit processes RF cell signals received via the antenna. The main processor enables (wakes up) the signal processing unit to measure each power level of the received cell signals and adjusts the power measurement period based on the current actual cell reselection frequency (e.g., comparing the current actual cell reselection frequency with a predetermined cell reselection mean frequency, e.g., in a standby mode). The signals include cell signals received from each base station of a corresponding serving cell and of neighboring cells.

A spread-spectrum clock signal generator comprises a circuit loop receiving a reference signal at a reference frequency and adapted to generate an output signal at an output frequency dependent on and locked to the reference frequency, and a modulator circuit generating a modulation signal at a modulation frequency; the modulation signal is injected into the circuit loop to induce a modulation of the frequency of the output signal with respect to the frequency dependent on the reference frequency. The circuit loop is a frequency-locked loop and has a bandwidth sufficiently higher than the modulation frequency, so that the output frequency tracks the modulation signal. Frequency-offset correction means are further provided, for evaluating a frequency offset between an average frequency of the output signal and the frequency dependent on the reference frequency, and for generating a frequency-offset correction signal which is injected into the circuit loop for correcting the evaluated frequency offset.

A novel and useful apparatus for and method of local oscillator (LO) generation with non-integer multiplication ratio between the local oscillator and RF frequencies. The LO generation schemes presented are operative to generate I and Q square waves at a designated frequency while avoiding the well known issue of harmonic pulling. The use of analog mixers of the prior art is avoided and replaced with an XOR gate configured to generate the correct average frequency. The edges are dynamically adjusted by ±T/12 or zero based on the state of the controlled oscillator down-divided clock.