85results about "Pulse conversion" patented technology

Proposed is a device for receiving a four-level pulse amplitude modulation (PAM-4) signal, which includes a first comparator for comparing a received PAM-4 signal with a predetermined threshold voltage to output a most significant bit (MSB) signal; and a second comparator for comparing the differential signal difference between the positive signal and negative signal of the received PAM-4 signal with a reference voltage to output a least significant bit (LSB) signal.

A digital microphone includes at least one integrator; a state detection and parameter control component directly coupled to an output of the integrator; and a signal processing component coupled to an output of the state detection and parameter control component, wherein a parameter of the signal processing component includes a first value in a first operational mode and a second value in a second operational mode different from the first operational mode.

The invention relates to the technical field of digital information transmission, and discloses a Morse code encoding and decoding method and system based on artificial intelligence, and the method comprises the steps: converting text information into an initial dot symbol sequence according to a standard Morse code mapping table, collecting channel characteristic parameters and inputting the channel characteristic parameters into the lightweight decision tree model to determine a time sequence characteristic weight vector; optimizing the initial dot-drawn symbol sequence to generate an optimized dot-drawn symbol sequence; calculating an absolute transmission time length, dynamically adjusting a transmission power and a waveform envelope parameter in combination with a multipath fading coefficient of a channel, and generating a coded signal; and demodulating the received signal to obtain a time sequence feature weight vector used by a sending end, performing envelope detection on the baseband signal, segmenting according to the time sequence feature weight vector to obtain a dot symbol sequence, and converting according to a standard Morse code mapping table to obtain decoded text information. According to the method, the encoding and decoding problems of the Morse code in a dynamic environment are solved, and the method can be operated on edge equipment.

The application discloses a kind of self-adapting downsampling time series encoding method and system.The method includes providing step prediction module based on learnable network, dynamically generating prediction window parameters based on the global feature of multidimensional time series signal, generating smoothing window function according to the prediction window parameters, weighting multidimensional time series signal and smoothing window function to obtain multiple groups of soft block signals, performing two-dimensional self-attention calculation on each group of signals and extracting feature vectors, and outputting sequence representation after reorganization through global self-attention calculation.The system corresponds to each corresponding functional module, including step learner based on learnable network, and introducing regularization term to optimize training loss.The application gets rid of artificial experience dependence, realizes the adaptive downsampling of time series signal, avoids boundary information loss and extreme downsampling strategy, improves encoding efficiency, accuracy and universality, and can be widely applied to astronomical gravitational wave monitoring, medical treatment, industrial and other cross-domain time series signal processing scenarios.

The subject-matter of the present disclosure provides a transmitter for a master clock of an audio system. The transmitter comprises an input configured to receive a message to be sent to a receiver of an audio device of the audio system and clock frequency information of a clock signal for synchronising the audio device; a data stream generator configured to determine a data stream based on the message; a pulse shaper configured to generate an encoded clock signal in the form of a rectangular wave having an initiating edge timing based on the clock frequency and a terminating edge timing being earlier than or later than a half cycle of the encoded clock signal depending on a bit value of the data stream; and an output configured to transmit the encoded clock signal to the receiver.

The subject-matter of the present disclosure provides a transmitter for a master clock of an audio system. The transmitter comprises an input configured to receive a message to be sent to a receiver of an audio device of the audio system and clock frequency information of a clock signal for synchronising the audio device; a data stream generator configured to determine a data stream based on the message; a pulse shaper configured to generate an encoded clock signal in the form of a rectangular wave having an initiating edge timing based on the clock frequency and a terminating edge timing being earlier than or later than a half cycle of the encoded clock signal depending on a bit value of the data stream; and an output configured to transmit the encoded clock signal to the receiver.

Communications method and apparatus include encoding information into a high-peakedness designed pulse train, converting the designed pulse train into a low-peakedness signal suitable for modulating a narrowband carrier to generate a physical communication signal with desired spectral and temporal properties, and generating and transmitting the physical communication signal. The communications method and apparatus also include receiving and demodulating the physical communication signal, and further converting the demodulated signal into a high-peakedness received pulse train corresponding to the designed pulse train, so that the encoded information may be extracted from the received pulse train.

The embodiment of the application discloses a kind of digital isolator and digital signal transmission method, the technical scheme of the embodiment of the application is by encoding circuit the rising edge and the falling edge of input digital signal are encoded into first pulse sequence and second pulse sequence respectively, by including multiple first pulse groups with time interval being first length characterizing first pulse sequence, multiple second pulse groups with time interval being second length characterizing second pulse sequence, so that more information is added in encoding signal, and the corresponding encoding information of rising edge and falling edge is transmitted through isolating element, while realizing the encoding and transmission of input digital signal, the anti-interference ability of encoding information and the anti-interference performance of digital isolator are improved.

The present disclosure relates to a data driving device, a data processing device, and a system for driving a display device and, more particularly, it relates to a data driving device, a data processing device, and a system for smoothly performing a low-speed communication through a communication line including an alternating current coupling capacitor.

Examples are disclosed that relate to reading stored data. The method comprises obtaining a representation of a measurement performed on a data-storage medium, the representation being based on a previously recorded pattern of data encoded in the data-storage medium in a layout that defines a plurality of data locations. The method further comprises inputting the representation into a data decoder comprising a trained machine-learning function, and obtaining from the data decoder, for each data location of the layout, a plurality of probability values, wherein each probability value is associated with a corresponding data value and represents the probability that the corresponding data value matches the actual data value in the previously recorded pattern of data at a same location in the layout.

The present disclosure proposes a method for getting a binary sequence representing the sampling of an underlying binary code sequence. The proposed approach builds the target sequence by concatenating sets of samples taken from another reference sequence representing the sampling of the same underlying code but at different sampling rate and / or initial phase than the target sequence. The main idea is that both the target and the reference sequences share sets of samples that are common, sample by sample, in both sequences, so that such sets of samples can be reused to build the target sequence, and, at each transition between sets, one or several reference samples must be either duplicated or discarded. The present disclosure explains how to compute the indexes of those common sets and shows how the samples at the transitions need to be managed. The main advantage of this approach is to allow computational savings.

The embodiment of the utility model provides a decoding circuit, a digital signal edge monitoring device using the decoding circuit, a frequency conversion equipment controller and frequency conversion equipment, and belongs to the technical field of electronic circuits. The decoding circuit comprises a hysteresis circuit and a monostable filtering time circuit and is used for detecting the edge of a digital signal and stably outputting a digital output pulse with a fixed width, and the pulse width of the digital output pulse depends on the filtering time of the monostable filtering time circuit.

A battery management system includes a first battery cell controller, a second battery cell controller each monitoring a plurality of battery cells, and an electrically isolated transmission line providing a point-to-point signal transmission path between the first battery cell controller and the second battery cell controller. At least one of the first battery cell controller or the second battery cell controller includes at least one encoding / decoding circuit that encodes data in accordance with a multi-level encoding technique for transmission along the signal transmission path as a serial data stream, including modulating the serial data stream on at least three discrete signal levels at a predetermined and fixed data pulse frequency, encoding a plurality of data nibbles of the serial data stream into a data packet, the data packet including a plurality of symbols structured and arranged to have at least four consecutive chips per symbol, wherein the at least four consecutive chips per symbol of the data packet include a DC balance line code in each of the symbols.

A calculation network system (1) comprises: a data conversion unit (120) that converts data in a first data format received from a server (110) into data in a second data format that reduces the influence of a bit error occurring in a transmission path (300); an optical transmission device (130) that stores the data in the second data format in a frame and transmits the data to a transmission path; an optical transmission device (230) that extracts data in the second data format from a frame received via the transmission path and having been corrected for header errors; and a data conversion unit (220) that converts the data in the second data format into data in a third data format that can be calculated by a server (210).

This invention relates to the field of analog integrated circuit technology, and particularly to a magnetically isolated encoding / decoding circuit, including a transmitter circuit, an isolation transformer, and a receiver circuit. The transmitter circuit includes a logic control circuit, an oscillator, a pulse generation circuit, and a drive circuit. The receiver circuit includes a pulse filtering circuit, a bandgap reference circuit, a comparator circuit, an inverter, and a D flip-flop. This invention, by adding amplitude variation, further pulls up high pulse signals and pulls low pulse signals to ground, filters out common-mode signals, and adds an additional refresh pulse to help monitor signals in real time, greatly improving the anti-interference and reliability of signal transmission, and effectively protecting power switching devices.

An apparatus to monitor and optimise power output by one or more solar panels to which the apparatus is coupled comprises a processor configured to generate a periodic wave and apply the periodic wave to an output of the one or more solar panels. Analogue-to-digital voltage and current converters receive voltage and current signals respectively from the one or more solar panels and provide digital voltage and current signals to the processor. The processor is configured to: calculate a voltage amplitude and a direct current offset of the periodic wave applied to the output of the one or more solar panels; calculate a differential of a power and a voltage of the one or more solar panels based on the voltage amplitude and the direct current offset; and modify the voltage of the one or more solar panels such that the differential of the power and the voltage of the one or more solar panels is zero, or substantially zero.

The present invention relates to a method for generating coding tables for sensor signals of a vehicle, comprising: detecting the occurrence frequencies of the sensor signals; dividing the sensor signals into different levels according to the occurrence frequencies, wherein the numbers of the levels correlate with the number of coding bits, whereby with increasing occurrence frequency the numbers of the levels become smaller and the corresponding number of coding bits decreases;Assigning binary codes to the sensor signals, wherein the binary codes have a single middle bit position, as well as front bit positions and back bit positions, wherein a first bit value is written into the middle bit position, the number of front bit positions representing the level, and a second bit value is written, wherein the number of back bit positions depends on the number of front bit positions, and the value of the sensor signal is represented by means of the bit value of the back bit positions; generating a coding table to establish a correspondence between the sensor signals and the binary codes. The present invention further relates to a corresponding coding method, a corresponding decoding method, a corresponding computer program product, and a corresponding processing device. This makes it possible to reduce the internal memory required for recording the sensor signals.

An encoding apparatus and a method for providing maximum transition avoidance (MTA), direct current (DC) balance, and run-length limited codes are provided. An apparatus including a transmitter connected to a signal line, wherein the transmitter includes an encoder configured to encode data bits to be transmitted through the signal line, according to pulse amplitude modulation (PAM), to convert the data bits into data symbols having multiple voltage levels. The encoder includes a logic circuit configured to provide look-up tables indicating a correlation between the data bits and the data symbols and a control circuit configured to selectively control logic operations of the logic circuit that generates the look-up tables. The look-up tables include mappings related to operation requirements of the encoder, and the operation requirements of the encoder includes a DC balance requirement and a run-length limit requirement of data symbols.

The invention relates to the technical field of analog integrated circuits, in particular to a magnetic isolation coding and decoding circuit, which comprises a transmitting end circuit, an isolation transformer and a receiving end circuit, and is characterized in that the transmitting end circuit comprises a logic control circuit, an oscillator, a pulse generation circuit and a driving circuit; the receiving end circuit comprises a pulse filtering circuit, a band-gap reference circuit, a comparator circuit, a phase inverter and a D trigger; according to the invention, by adding amplitude variation, a high pulse signal is further pulled up, a low pulse signal is grounded and pulled down, then a common-mode signal is filtered out, and a refresh pulse is additionally added to help real-time monitoring of the signal, so that the interference resistance and reliability of signal transmission are greatly improved, and a power switch device is effectively protected.

To reduce circuit complexity and reduce chip packaging and wiring.SOLUTION: A method of decoding a single-channel communication includes the steps of: generating a low level of a clock signal based on a high level of a long- and short-code signal; generating a delay pulse signal based on the long- and short-code signal, a delay time length of the delay pulse signal being a half of a clock period; generating a high level of the clock signal based on the delay pulse signal; and generating a digital signal based on the clock signal and the long- and short-code signal. The decoding method simultaneously decodes a clock signal and a data signal.SELECTED DRAWING: Figure 13

Method and system for weighting the amplitude of an event in a time -based code. The time-based code is divided into time intervals. Each of the time intervals of the time-based code corresponds to a digit in the received signal. Each digit of a first state of the received signal is expressed as a event occurring at a first time within the corresponding time interval of the time - based code. Each digit of a second state of the received signal is expressed as a event occurring at a second time within the corresponding time intervals of the time -based code, the first time is distinguishable from the second time. All of the states of the digits in the received signal are represented by events in the time-based code. The weighting is performed as a function of the timing of other events in the time-based code signal.

Embodiments herein provide a method and a system for data transmission using a variable time period The method includes storing a base time period (BTP) and a set of embedded time periods (ETPs) in a memory (106) associated with a 5 transmitter electronic device (102) and a memory (206) associated with a receiver electronic device (202). Further, generating an input signal to be transmitted to the receiver electronic device (202) in a first format. Further, determining the variable time period for each symbol within a set of symbols within the input signal based on the BTP and the set of ETPs. Further, converting the input signal from the first 10 format into a second format based on the variable time period for each symbol within the set of symbols. In addition, transmitting the input signal in the second format to the receiver electronic device (202).

An encoding / decoding method and apparatus, and a data transmission method are provided, and relate to the field of communication technologies, to reduce a bit error rate during encoding / decoding using PAM3. The method includes: encoding to-be-encoded 3-bit data [A, B, C], to obtain a 4-bit encoded parity signal [S1, S2, S3, S4] that satisfies S1 = A • (B + C); generating a PAM3 signal in two UIs based on the 4-bit encoded parity signal, and sending the PAM3 signal; obtaining the PAM3 signal in the two UIs, and determining a 4-bit decoding parity signal based on the PAM3 signal in the two UIs; and decoding the 4-bit decoding parity signal based on preset decoding logic, to obtain the 3-bit data. The preset decoding logic can ensure that when a bit error in one UI occurs, a bit error occurs in a maximum of 2-bit data in 3-bit data obtained through decoding. In this case, in comparison with a bit error in a maximum of 3-bit data in a related technology, a bit error rate is low.

The application discloses a kind of control signal transmission method, system, computer equipment and storage medium.The method comprises: obtaining first control signal;According to the first control signal, the encoding control signal of lightweight data format is generated;The encoding control signal is outputted.The control signal transmission method, system, computer equipment and storage medium of implementation of the present application, since it can be converted into the encoding control signal of lightweight data format after obtaining control signal and then output, to reduce the storage size required in control signal transmission.

Communications method and apparatus include encoding information into a high-peakedness designed pulse train, converting the designed pulse train into a low-peakedness signal suitable for modulating a narrowband carrier to generate a physical communication signal with desired spectral and temporal properties, and generating and transmitting the physical communication signal. The communications method and apparatus also include receiving and demodulating the physical communication signal, and further converting the demodulated signal into a high-peakedness received pulse train corresponding to the designed pulse train, so that the encoded information may be extracted from the received pulse train.

The invention provides a novel intelligent millimeter wave decoder based on a single-layer metasurface, which comprises a compact single-layer metasurface array and an input control panel, the single-layer metasurface array is formed by arranging a plurality of square metasurface units, and the metasurface units have high transmission performance and 360-degree transmission phase regulation and control. The structure sequentially comprises a first metal layer, a dielectric substrate layer and a second metal layer from top to bottom, the first metal layer is located on the upper surface of the dielectric substrate, and the second metal layer is located on the lower surface of the dielectric substrate. The input control layer comprises six divided areas, input operation is carried out through selection of input signals, and decoding results of corresponding binary codes 000-111 can be obtained on an output observation face. The invention solves the defect that the traditional decoder cannot meet the requirements of low delay and low power consumption during high-frequency communication, overcomes the limitation of the traditional electronic device on speed, and has the characteristics of compactness, high speed, low delay and low power consumption.

The application discloses a kind of based on deep neural network's Morse code signal decoding method, comprising the following steps: S1, model training stage: the training data set comprising Morse code signal sample and corresponding label is constructed;Design deep neural network architecture, utilize training data set to optimize network weight, generate Morse code signal decoding model: comprising the following steps: S1.1, signal sample is generated;S1.2, model training;S2, real-time decoding stage: S2.1, STFT conversion;S2.2, signal segmentation;S2.3, data normalization;S2.4 is obtained by model inference Multi-channel sentence-level decoding result;S2.5 is obtained by code stream processing Multi-channel continuous decoding result.By the above mode, the present application can realize the end-to-end decoding of multiple Morse code signals simultaneously by combining time-frequency conversion with deep neural network, effectively solving the problem of continuous decoding of Morse code signals with different code rates in complex electromagnetic background environment.

The present disclosure describes aspects of pulse-based writing for magnetic storage media. In some aspects, a pulse-based writer of magnetic storage media determines that a string of data bits having a same polarity corresponds to a magnet longer than a threshold associated with a magnetic media writer. The pulse-based writer inserts, into the string of data bits, a transition to a polarity opposite to the same polarity of the string of data bits. The string of data bits including the inserted transition is then transmitted to the magnetic media writer to cause a write head of the writer to pulse while writing the magnet to magnetic storage media. Various aspects may also implement a control signal to mask a transition or control polarity of the magnetic media writer. By so doing, magnets may be written to the magnetic storage media more efficiently or with less distortion to neighboring tracks.

The utility model provides an orthogonal decoding circuit, a micro-processing chip and an encoder control system, and relates to the technical field of circuit control. An input end of an orthogonal decoding module in the orthogonal decoding circuit is connected to a first output end of an encoder, an output end of the orthogonal decoding module is connected to an input end of a recording module, and the orthogonal decoding module is used for receiving a first signal and a second signal output by the encoder and generating a counting signal; the recording module is used for storing counting information corresponding to the encoder based on the counting signal; the input end of the trigger module is connected to the second output end of the encoder, the output end of the trigger module is connected to the input end of the configuration module, and the trigger module is used for receiving a third signal output by the encoder and generating a trigger signal; and the configuration module is connected to the recording module and is used for acquiring counting information based on the trigger signal, writing level width information carried by the trigger signal into the recording module when the counting information meets a preset requirement, and otherwise, resetting the counting information. The quadrature decoding circuit can eliminate errors generated by the encoder.

The invention discloses a 1T-2B code conversion circuit based on a memristor, and belongs to the technical field of memristors. Comprising memristors, excitation voltage sources V, a transistor and a direct-current voltage source, the memristors are a three-value input memristor Min and a two-value output memristor Mout, and the number of the excitation voltage sources is six, namely V0, V1, V2, V3, V4 and V5; the memristors are respectively M0, M1, M2, M3, M4 and M5; the transistors are respectively T0, T1, T2, T3, T4 and T5; the direct current voltage sources are Vdd0, Vdd1, Vdd2, Vdd3, Vdd4 and Vdd5 respectively; the invention designs a 1T-2B code conversion circuit based on a memristor. The design shows remarkable advantages in a memristor storage and communication system: multiplication of storage density, improvement of data transmission rate and enhancement of anti-interference capability are realized, and key technical support is provided for a next-generation high-efficiency computing and communication system.