Described apparatuses and methods are directed to
equalization with pulse-
amplitude modulation (PAM) signaling. As
bus frequencies have increased, the time for correctly transitioning between
voltage levels has decreased, which can lead to errors.
Symbol decoding reliability can be improved with
equalization, like with decision-feedback
equalization (DFE). DFE, however, can be expensive for
chip area and
power usage. Therefore, instead of applying DFE to all
voltage level determination paths in a
receiver, DFE can be applied to a subset of such determination paths. With PAM4 signaling, for example, a DFE circuit can be coupled between an output and an input of a middle slicer. In some cases, symbol detection reliability can be maintained even with fewer DFE circuits by compressing a middle eye of the PAM4
signal. The other two eyes thus have additional headroom for expansion. Encoding schemes, impedance terminations, or reference
voltage levels can be tailored accordingly.