Technology for reading memory cells in a cross-bar
memory array. Each
cell has a threshold switching selector in series with a programmable resistance memory element. A current diverting
resistor is connected to a selected word line while a read current is driven to the selected word line. Driving the read current to the selected word line causes a
voltage across the
memory cell to increase until the threshold switching selector switches on. After the threshold switching selector switches on the
voltage across the
memory cell drops rapidly thereby resulting in a
snapback current. Some of the read current is diverted to the current diverting
resistor as the
voltage across the
memory cell increases. When the threshold switching selector switches on the
resistor continues to divert current from flowing through the memory
cell to prevent excessive current from inadvertently changing the state of the programmable resistance memory element.