3results about How to "Avoid latch-up" patented technology

The application provides a silicon controlled rectifier (SCR) device, which comprises a high-voltage P well region and a high-voltage N well region. The high-voltage P well region is sequentially provided with a first P+ doped region and a first N+ doped region. The high-voltage N well region is sequentially provided with a second P+ doped region and a second N+ doped region, and a preset normal-pressure P well region is arranged below the first N+ doped region and / or a preset normal-pressure N well region is arranged below the second P+ doped region. In the SCR device and chip, the preset normal-pressure P well region is formed below the first N+ doped region in the high-voltage P well region and / or the preset normal-pressure N well region is formed below the second P+ doped region in the high-voltage N well region, the recombination efficiency of the emitter injection carriers of the SCR device is improved, the regenerative feedback effect of the SCR device in the conduction process is inhibited, the holding current is improved, and the latch-up phenomenon of the SCR device under the electrostatic protection impact is avoided.

This invention provides a bidirectional SCR electrostatic discharge (ESD) protection device, comprising a P-type substrate, an N-type buried layer, a P-type epitaxial layer, a deep N-type well, a first P-type well, a second P-type well, an N-type well, a high-voltage N-type well, heavily doped P-type material, a first shallow trench isolation layer, heavily doped N-type material, a first field oxygen isolation layer, and a floating field plate. The P-type substrate is located at the bottom layer, and the N-type buried layer is located above the P-type substrate, with their surfaces flush. The P-type epitaxial layer is located above the P-type substrate. The deep N-type well, the first P-type well, the second P-type well, the N-type well, the high-voltage N-type well, the heavily doped P-type material, and the heavily doped N-type material are all formed within the P-type epitaxial layer via ion implantation. This invention reduces the device's turn-on voltage through the floating field plate, and achieves sequential or simultaneous turn-on of different current discharge paths through two current discharge paths and the length of the field oxygen isolation layer, controlling the device's double hysteresis characteristics to avoid latch-up effects. The centrosymmetric structure increases the longitudinal current, improving the overall current capability of the device.

The utility model relates to chip on -line control technical field, concretely for adjustable chip power -on time sequence control circuit. Including at least two stages of DC -DC power module of concatenation, every stage DC -DC power module includes input power end, output voltage end, enable control end (EN) and power good signal end (PG). The utility model discloses through the DC -DC power module of cascaded setting, utilizes the RC delay circuit between power good signal end (PG) of preceding stage module and enable control end (EN) of rear stage module, has realized the flexible adjustment of rear stage module power -on delay time, need not to rely on complex control chip or software program, can accurate matching chip required power -on time sequence only through the adjustment of resistance capacitor parameter, has reduced circuit complexity and cost.