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305 results about "Safe operating area" patented technology

For power semiconductor devices (such as BJT, MOSFET, thyristor or IGBT), the safe operating area (SOA) is defined as the voltage and current conditions over which the device can be expected to operate without self-damage.

IGBT intermittent life test method based on simulation modeling and short-time test

The invention relates to an IGBT intermittent life test method based on simulation modeling and a short-time test. The method comprises the following steps of step1, determining a heat dissipation condition; step2, determining a parameter control method; step3, determining a failure criterion; step4, determining a device power size and a junction temperature control range; step5, carrying out safeoperation area and maximum allowable junction temperature analysis; step6, implementing the short-time test; step7, carrying out simulation modeling analysis; and step8, optimizing an intermittent life test scheme. In the method, the heat dissipation condition, the parameter control method, the power size, a temperature range, the safe operation area, a failure mechanism and other factors are comprehensively considered; several sets of intermittent life test schemes are preselected; through carrying out a short-time power circulation test, temperature increasing and decreasing time of a device in single circulation is acquired; a simulation method is used to acquire a power circulation frequency before device failure; and actual power circulation test time of each preselection scheme is pre-estimated so that an optimal intermittent life test scheme is acquired through optimization. The method belongs to the power device reliability evaluation technology field.
Owner:BEIHANG UNIV

Electric vehicle low-voltage high-current battery pack combination device and control method

The invention particularly discloses an electric vehicle low-voltage high-current battery pack combination device and a control method. A plurality of single-cell lithium batteries are parallelly connected and serially connected to form a certain-voltage certain-capacity battery pack, the plurality of battery packs integrating with a battery monitor are serially connected to form a low-voltage certain-capacity battery pack branch, and the battery pack branches are parallelly connected to form a low-voltage high-current lithium battery assembly. The combination means is flexible, and the requirements of lithium batteries with various voltages and capacities can be met. A control device for the lithium battery pack combination device is capable of controlling an IGBT (insulated gate bipolar transistor) switch to charge and discharge in different ways according to the current states of the bather pack branches, the battery pack branches can operate in an optimal operation area to the maximum extent, the service life of each battery is prolonged as far as possible, the battery assembly is guaranteed to operate in the safe operation area, and the requirements of electric vehicles for power supply are also met.
Owner:QINGDAO VECCON ELECTRIC

Accumulation layer controlled insulation gate type bipolar transistor

InactiveCN101393927AIncreased saturation current densityElimination of parasitic thyristor effectsSemiconductor devicesElectron flowParasitic bipolar transistor
Insulated gate bipolar transistors controlled by an accumulation layer belong to the technical field of semiconductor power devices. The transistors include a channel insulated gate bipolar transistor, a plane insulated gate bipolar transistor and a transverse insulated gate bipolar transistor. According to the invention, when a device is in the blocking state, a built-in electric field formed by a P body region (10) and an N base region (4) forms part of an electron barrier which stops electrons flowing from an N source region (9) into the N base region(4) with the voltage-resistance of the device improved; when the device is in the conductive state, the accumulation layer is formed between the N source region (4) and a gate oxide layer (5), and the electrons can flow from the N source region (9) to the N base region (4) through the accumulation layer so as to control the normal operation of the device. With the accumulation layer rather than a P-type base region and an MOS inversion channel of a traditional insulated gate bipolar transistor, the invention can achieve lower conductive voltage drop and greater saturation current density, thereby avoiding parasitic thyristor effect, and ensuring that the safe operating area, the reliability and the high-temperature working characteristics of the device can be greatly promoted.
Owner:UNIV OF ELECTRONICS SCI & TECH OF CHINA

Trench gate IGBT chip

The invention provides a trench gate IGBT chip. The trench gate IGBT chip comprises a plurality of cells connected in parallel, each cell comprises a first trench gate and a second trench gate, each first trench gate and the corresponding second trench gate are isolated through a first conduction type region, each second trench gate is located on one side of the corresponding first trench gate, and an emitter and a second conduction type source electrode region are arranged on the other side of the corresponding first trench gate. The trench gate IGBT chip further comprises third trench gates formed in the first conduction type region, and the straight line where the gate lengths of the third trench gates are located is intersected with the straight line where the gate lengths of the second trench gates are located. Compared with the prior art, the trench gate IGBT chip has the advantages that technology difficulty and technology cost for manufacturing cannot be increased. In addition, as the third trench gates are additionally arranged, the trench density of the trench gate IGBT chip is improved, voltage withstanding of the trench gate IGBT chip is easily improved, power dissipation of the trench gate IGBT chip is easily reduced, and the safety working area performance of the trench gate IGBT chip is easily improved.
Owner:ZHUZHOU CRRC TIMES SEMICON CO LTD

Electromagnetic transient analysis method for large-capacity power-electron conversion system

The invention discloses an electromagnetic transient analysis method for a large-capacity power-electron conversion system and belongs to the technical field of power-electron conversion and control. The method comprises the following steps: the large-capacity power-electron conversion system carries out one protection action; system parameters before and after protection action of the conversion system are collected to determine a safe working area of the conversion system; stray parameters of the conversion system are extracted to further determine a transient bus structure of the conversion system; a feedback control set value of a gate drive signal of a semiconductor switching device is determined according to the bus structure and the stray parameters; delay time of the conversion system is determined according to the feedback control set value of the gate drive signal of the semiconductor switching device; and at last the delay time of the safe working area of the system is determined. By the method, the existing device safe working area is extended to the system safe working area, the existing lumped parameter topological structure is expanded to a main circuit structure which considers stray parameters, and the existing signal pulse modulation algorithm is extended to main circuit pulse control strategies.
Owner:TSINGHUA UNIV

Electronic control systems and methods

An apparatus in an electronic control system allows two or three wire operation. A power supply can supply power to the enclosed circuitry in both two and three wire installations. Two separate zero cross detectors are used such that timing information can be collected in both two and three wire installations. Both zero cross detectors are monitored and are used to automatically configure the electronic control. Over voltage circuitry senses an over voltage condition across a MOSFET which is in the off state and turns the MOSFET on so that it desirably will not reach the avalanche region. Over current circuitry senses when the current through the MOSFETs has exceeded a predetermined current threshold and then turns the MOSFETs off so they do not exceed the MOSFETs' safe operating area (SOA) curve. Latching circuitry is employed to keep the protection circuitry in effect even after a fault condition has cleared. Lockout circuitry is used to prevent one protection circuit from tripping after the other circuit has already tripped from a fault condition. The protection circuitry output is desirably configured such that it can bypass and override the normal turn on and turn off impedance and act virtually directly on the gates of the MOSFETs. Preferably, the system has a high efficiency switching type power supply in parallel with a low frequency controllably conductive device.
Owner:LUTRON TECH CO LLC

Preparation method of LDMOS (Laterally Diffused Metal Oxide Semiconductor) for efficiently collecting substrate current

The invention discloses an LDMOS (Laterally Diffused Metal Oxide Semiconductor) preparation method for efficiently collecting substrate current, wherein the method comprises the following steps: adopting standard preparation technology of LDMOS, and realizing the LSMOS capable of efficiently collecting the substrate current just through the following layout design, namely, using an active region, an N-type drift region and a P-type body region to form the drain region, the source region and the body leading-out region of an LDMOS device; defining a channel region by using polycrystalline; and realizing the drain electrode, the source electrode and the body leading-out electrode by using N+ injection and P+ injection. The regions used for source electrode leading-out N+ injection and the regions used for body leading-out P+ injection are arranged alternatively in the source region. In the invention, the body leading-out position is closer to the channel region formed by a hot carrier and the corresponding substrate current; therefore, the substrate current can be more efficiently collected, parasitical NPN (Negative-Positive-Negative) bipolar transistor is prevented from being turned on due to overlarge substrate current, the device is prevented from entering Snapback state for burning, and the purpose of enlarging safe work area of the LDMOS is achieved.
Owner:SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT

Electronic control systems and methods

An apparatus in an electronic control system allows two or three wire operation. A power supply can supply power to the enclosed circuitry in both two and three wire installations. Two separate zero cross detectors are used such that timing information can be collected in both two and three wire installations. Both zero cross detectors are monitored and are used to automatically configure the electronic control. Over voltage circuitry senses an over voltage condition across a MOSFET which is in the off state and turns the MOSFET on so that it desirably will not reach the avalanche region. Over current circuitry senses when the current through the MOSFETs has exceeded a predetermined current threshold and then turns the MOSFETs off so they do not exceed the MOSFETs' safe operating area (SOA) curve. Latching circuitry is employed to keep the protection circuitry in effect even after a fault condition has cleared. Lockout circuitry is used to prevent one protection circuit from tripping after the other circuit has already tripped from a fault condition. The protection circuitry output is desirably configured such that it can bypass and override the normal turn on and turn off impedance and act virtually directly on the gates of the MOSFETs. Preferably, the system has a high efficiency switching type power supply in parallel with a low frequency controllably conductive device.
Owner:LUTRON TECH CO LLC
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