Electrostatic releasing device of low-voltage triggering and high-maintenance voltage silicon-controlled rectifier

Abstract

The invention discloses an electrostatic releasing device of a low-voltage triggering and high-maintenance voltage silicon-controlled rectifier. The electrostatic releasing device comprises a P-type substrate, wherein a first N well and a P well are arranged in the P-type substrate, a first N+ injection region and a first P+ injection region are arranged in the first N well, a second N well, a third N+ injection region, a third N well and a second P+ injection region are arranged in the P well, a second N+ injection region bridges between the first N well and the P well, a poly-silicon gate isarranged between the second N+ injection region and the third N+ injection region, and the second N+ injection region, the poly-silicon gate and the third N+ injection region form a parasitic MOSFETfield-effect transistor structure. By adding the two N wells into the P well, the area of a parasitic NPN emitter is expanded to increase a failure current; and moreover, the current relief path can be extended after breakdown conduction of the device, the passing well resistance is increased, the device is more rapidly started, so that the maintenance voltage and the failure current of the deviceare increased, and the latch-up effect can be effectively prevented.

Description

technical field [0001] The invention relates to the field of electrostatic protection, in particular to an electrostatic discharge device for a low-voltage trigger high-maintaining voltage silicon-controlled rectifier. Background technique [0002] Electro-Static Discharge (ESD) is an inevitable phenomenon in the process of manufacturing, packaging, testing, transportation, assembly and use of integrated circuits. There are internal and external reasons for the generation of static discharge points. Static electricity accounts for 58% of the various reasons for the failure of integrated circuits, which poses a serious threat to the reliability of integrated circuits. There are two ways to protect integrated circuits from static electricity: one is to control and reduce the occurrence of static electricity and discharge, such as using electrostatic protective clothing, anti-static wrist straps, etc.; the other is to design static discharge devices around the chip to provide s...

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Problems solved by technology

Therefore, a low-voltage trigger SCR is generated. The turn-on voltage of the device is the same as the breakdown voltage of the parasitic MOS, so the turn-on voltage can be well reduced, but the maintenance voltage is very low due to the characteristics of the latch-like feature during operation. This defect will make the internal The circuit is not effectively protected, and it is easy to cause device latch-up problems

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