MOS (metal oxide semiconductor) power device and manufacturing method thereof

A technology of power devices and manufacturing methods, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc.
CN102544083AActive Publication Date: 2012-07-04BYD SEMICON CO LTD

Patent Information

Authority / Receiving Office
CN · China
Current Assignee / Owner
BYD SEMICON CO LTD
Publication Date
2012-07-04

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Abstract

The invention provides a manufacturing method of an MOS (metal oxide semiconductor) power device, which includes the following steps of (1) forming a first oxidation layer on a semiconductor substrate; (2) forming a polycrystalline layer on the first oxidation layer; (3) forming stopping layers on two sides of the polycrystalline layer; (4) forming a first conductive trap area; (5) removing the stopping layers and forming a second conductive source area in the first conductive trap area; (6) forming a second oxidation layer on the polycrystalline; (7) forming a first metal layer on the source area and the surface of the trap area; and (8) forming a back electrode on the back of the semiconductor substrate. By the method, the stopping layers are formed on two sides of the polycrystalline layer firstly, so that the MOS power device with larger trap depth can be obtained on the premise of keeping the identical channel length by the aid of transverse stopping of the stopping layers during injection of ions in the process of forming the first conductive trap area, and latch-up effect can be prevented effectively.
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Description

technical field

[0001] The invention relates to a MOS type power device and a manufacturing method thereof. Background technique

[0002] The semiconductor manufacturing method is a planar manufacturing method that forms a large number of various types of complex devices on one substrate and interconnects them to have complete electronic functions. With the rapid development of VLSI, the integration of chips is getting higher and higher, and the size of components is getting smaller and smaller, which puts forward higher requirements for circuit design and manufacturing. In order to further improve the overall performance of integrated circuits, it is necessary to overcome the latch-up effect caused by parasitic thyristors in the manufacturing process of power devices. The latch-up effect will form a large current and cannot be turned off, which will eventually burn out the device. Therefore, the method of preventing the latch-up effect is also more and more widely used. ...

Claims

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