6results about How to "Fast conduction speed" patented technology

The invention discloses a self-aligned embedded gate metal IGBT (Insulated Gate Bipolar Translator) and a manufacturing method. The self-aligned embedded gate metal IGBT comprises a semiconductor layer arranged on the front surface of a substrate, a body region and a drift region which are arranged in the semiconductor layer, and a source region arranged in the body region, the pair of first side walls are arranged on the surface of the semiconductor layer above the source region; the trench gate is arranged in the semiconductor layer between the pair of first side walls and penetrates through the source region; the gate metal is embedded between the pair of first side walls and is connected with the trench gate; the source region contact groove is formed in the semiconductor layer on one side of the trench gate; the source region contact metal is filled in the source region contact groove and is connected with the source region; the gate metal and the source region contact metal are respectively connected with the metal interconnection layer through conductive contact holes; the collector region layer and the buffer region layer are arranged below the back surface of the substrate, and the collector layer is arranged on the back surface of the substrate. The invention can accelerate the conduction speed, increase the switching frequency, reduce the number of photomasks, eliminate the overlay error, reduce the device area, reduce the short-circuit resistance and improve the device performance.

The utility model relates to the technical field of absorption circuits, and discloses a protection circuit which comprises a power switch tube Q1, a first absorption unit and a second absorption unit are connected between a drain electrode and a source electrode of the power switch tube Q1, the source electrode of the power switch tube Q1 is connected with the ground, and the first absorption unit and the second absorption unit are connected in parallel; according to the utility model, a more efficient peak voltage absorption effect can be achieved, the power loss of the circuit can be effectively reduced, and the reliability of the circuit can be improved at the same time.

The invention discloses a self-aligned embedded gate metal MOSFET and a manufacturing method, the self-aligned embedded gate metal MOSFET comprises a semiconductor layer arranged on a substrate, a body region and a drift region are sequentially arranged in the semiconductor layer from the surface to the substrate, and a source region located below the surface of the semiconductor layer is arranged in the body region; the pair of first side walls are arranged on the surface of the semiconductor layer above the source region; the trench gate is arranged in the semiconductor layer between the pair of first side walls and penetrates through the source region; the gate metal is embedded between the pair of first side walls and is connected with the trench gate; the source region contact groove is formed in the semiconductor layer on one side of the trench gate; the source region contact metal is filled in the source region contact groove and is connected with the source region; and the gate metal and the source region contact metal are respectively connected with the metal interconnection layer through the conductive contact holes. According to the invention, the conduction speed can be accelerated, the switching frequency can be increased, the area of the device can be reduced, the short-circuit resistance can be reduced and the performance of the device can be improved while the photomasks are reduced and the overlay error is eliminated.

The invention relates to a level-assisted conversion control circuit and a level conversion circuit. The level-assisted conversion control circuit is applied to a negative voltage level conversion circuit. The level-assisted conversion control circuit is used to accelerate the level conversion time of the negative voltage level conversion circuit. The level-assisted conversion control circuit comprises a signal generating unit and a control unit. The signal generating unit generates a narrow pulse signal when the input signal level changes. Then, the control unit accelerates the disconnection of a slave control tube of a target conversion unit that is turned on at the last conversion moment according to the narrow pulse signal, thereby improving the driving capability of a master control tube in a switch to be turned on to a slave control tube, accelerating the turn-on speed of the switch to be turned on, and finally improving the conversion speed of the negative voltage level conversion circuit.

The invention provides a double-injection avalanche transistor and a preparation method thereof, which can solve the problems that the conduction voltage drop and loss of the existing avalanche transistor are relatively high because the existing avalanche transistor needs to maintain a high field intensity collision ionization region, and the performance of the existing avalanche transistor is influenced by temperature rise caused by conduction loss under repetition frequency operation. The transistor comprises a collector region n + substrate layer, a collector region n0 epitaxial layer, a p-type base region layer, an n + emitter region layer, a plurality of p + field rings and a collector region p + injection layer arranged between the collector region n + substrate layer and the collector region n0 epitaxial layer, a plurality of first ring grooves are formed in the top of the collector region n0 epitaxial layer, the p + field rings are arranged in the first ring grooves, and the tops of the p + field rings are flush with the top of the collector region n0 epitaxial layer. The p + doping concentration of the collector region p + injection layer is greater than the n + doping concentration of the collector region n + substrate layer, the n + doping concentration of the n + emitter region layer is greater than the p-type doping concentration of the p-type base region layer, and the n + doping concentration of the n + emitter region layer and the p + doping concentration of the p + field ring are the same order of magnitude as the n + doping concentration of the collector region n + substrate layer.

The utility model belongs to compressor technical field, specifically discloses a kind of frequency converter drive circuit, frequency converter and compressor.The high voltage side / low voltage side drive and discharge circuit in frequency converter drive circuit, it is improved as follows on the basis of original circuit structure: first, a capacitor and resistance are newly added in the gate end of MOS tube, and newly added capacitor and resistance are arranged in parallel;Second, the resistance value of voltage division resistor in original high voltage side / low voltage side drive and discharge circuit is reduced, to obtain new voltage division resistor, the resistance value of new voltage division resistor is significantly reduced compared with the resistance value of original voltage division resistor, and the sum of the resistance value of new voltage division resistor and newly added resistance is equal to the resistance value of original voltage division resistor.When MOS tube is turned on, capacitor is equivalent to short circuit, voltage is charged to MOS tube through new voltage division resistor and capacitor first, to accelerate the turn-on speed of MOS tube, reduce the risk of damaging MOS, to ensure the stable and reliable conduction of MOS tube.