The invention discloses a design method of an advanced
branch target address buffer area, which comprises the following steps of: S1, judging whether a first group of jumped
branch instructions are unconditional direct branches or not, if so, entering S5; if not, entering S2; s2, judging whether the
branch is a conditional direct branch, if so, entering S5; if not, entering S3; s3, when the first group of jump branch instructions are unconditional indirect branches, entering S4; s4, judging whether the actual jump address is the same as the address provided by the leading
branch target address buffer area or not, and if not, resetting a saturation counter; if yes, the saturation counter counts, the first instruction block is expanded, and S5 is executed; and S5, linking the two instruction blocks. The invention further discloses a
prediction system, and the flow predictor is introduced into the decoupling predictor. According to the method, the operation logic of the advanced
branch target address buffer area is optimized, instruction parallel and instruction block extension connection are allowed, and the prediction efficiency is improved; the flow predictor is additionally arranged, the bubble waiting problem is solved, and the prediction speed is increased.