308 results about "Guard ring" patented technology

The invention discloses a high-precision integrated temperature and humidity sensor and a construction method. The sensor comprises an MEMS humidity capacitance sensor, a CMOS integrated temperature sensor, an analog-to-digital converter, a calibration configuration information storage array and a digital interface. Wherein the MEMS humidity capacitance sensor and the CMOS integrated temperature sensor are respectively connected with the analog-to-digital converter, and voltage signals of the MEMS humidity capacitance sensor and the CMOS integrated temperature sensor are converted into digital signals; the analog-to-digital converter transmits the digital signal to the calibration configuration information storage array for data processing and linearization processing, and transmits the data to the SDAamp through a digital interface; in SCL; wherein the MEMS humidity capacitance sensor comprises a capacitance pole plate, a protection ring and a heating resistor; the capacitor plates adopt an interdigital capacitor structure and have a regular octagonal part in overlook observation, and meanwhile, the upper and lower electrode plates and the polyimide PI material layer between the two electrode plates form the interdigital capacitor structure.

The invention relates to the technical field of wind driven generators, and discloses a wind generating set yaw system twisted cable protection device and method.The device comprises a tower barrel and a twisted cable and further comprises supporting frames fixed to the two sides of the tower barrel, and limiting frames are fixedly connected between the opposite sides of the two supporting frames correspondingly; connecting plates are arranged between the opposite sides of the two limiting frames correspondingly, fixing plates are fixedly connected to the front side and the rear side of one side of each connecting plate correspondingly, and dampers are fixedly connected between the opposite sides of the two fixing plates correspondingly. Limiting holes in positioning rings penetrate into an annular protection shell, when a twisted cable shakes slightly, the twisted cable can abut against two protection rings in the annular protection shell, the protection rings are stressed to drive limiting rods and enable the limiting rings to stretch second springs to protect the twisted cable, a certain amount of space is stored in a limiting space, and therefore the twisted cable can be protected. Therefore, the cable is ensured not to be fixed at a certain position by strong force, and damage caused by friction and torsion concentration is reduced.

The invention relates to a retaining ring deformation identification method for a rotor end portion and a related device, a retaining ring is installed at the rotor end portion of a generator, and the retaining ring is provided with a mark; the method comprises the following steps: acquiring initial position information corresponding to an identifier of the retaining ring in a static state; acquiring a detection image of the retaining ring at the first rotating speed, and determining detection position information corresponding to the identifier in the detection image; and determining deformation information of the retaining ring at the first rotating speed according to the initial position information and the detection position information. According to the method, by comparing the initial position information with the detection position information, the displacement amount of the identifier can be accurately measured, so that the deformation condition of the retaining ring is evaluated.

A semiconductor device is disclosed. The semiconductor device includes a first substrate. The first substrate includes a first dielectric layer, and a vertical conductive area, where the vertical conductive area includes at least two vertical conductive structures extending through the first dielectric layer, where each line segment of a non-square quadrilateral contacts at least one of the at least two vertical conductive structures. The vertical conductive area also includes a continuous conductive guard ring structure in the first dielectric layer, where the continuous conductive guard ring structure surrounds the at least two vertical conductive structures. The semiconductor device also includes a second substrate, including a first conductor, and a second conductor, where the first conductor of the second substrate is electrically connected to at least one of the at least two vertical conductive structures of the first substrate.

A semiconductor device has a superjunction layer and guard ring regions in a termination portion of a semiconductor substrate. The guard ring regions have a first guard ring region including at least an outermost guard ring region, and a second guard ring region located on an inner side of the first guard ring region. The first guard ring region is spaced apart from second conductivity type columns of the superjunction layer. The second guard ring region is in contact with the second conductivity type columns of the superjunction layer.

In some embodiments, the present disclosure relates to an image sensor. The image sensor comprises a substrate. A photodetector is in the substrate and includes a semiconductor guard ring extending into a first side of the substrate. A shallow trench isolation (STI) structure extends into the first side of the substrate. An outer isolation structure extends into a second side of the substrate, opposite the first side of the substrate, to the STI structure. The STI structure and the outer isolation structure laterally surround the photodetector. An inner isolation structure extends into the second side of the substrate and overlies the photodetector. The inner isolation structure is vertically separated from the photodetector by the substrate. Further, the outer isolation structure laterally surrounds the inner isolation structure.

The invention relates to the technical field of unmanned aerial vehicles, and particularly discloses an unmanned aerial vehicle capable of landing and buffering, which comprises a fuselage shell, connecting arms are fixedly connected to the opposite angles of the side surfaces of the fuselage shell, and fan blade protection rings are fixedly connected to the ends, away from the fuselage shell, of the connecting arms. A driving motor is fixedly connected to the inner wall of the fan blade protection ring through a support, a driving shaft of the driving motor is fixedly connected with flying fan blades, a mounting frame is fixedly connected to the bottom of the fuselage shell, a damping device is fixedly connected to the bottom of the inner wall of the mounting frame, and a buffering mechanism is fixedly connected to the end, away from the supporting frame, of a fixing rod. According to the unmanned aerial vehicle capable of landing and buffering, the buffering mechanism is arranged, so that the impact force generated when the unmanned aerial vehicle descends can be buffered, and the damping device is arranged, so that the buffered vehicle body can be further damped; damage of parts in the unmanned aerial vehicle caused by violent vibration during descending is avoided.

In an embodiment, a device may include a first structure comprising a first surface and a second surface opposite the first surface. The first structure may include a first substrate and a first through substrate via (TSV) exposed from the second surface of the first substrate. The first TSV may have a first width. The device may also include a second TSV exposed from the second surface of the first structure, where the second TSV has a second width smaller than the first width. The device may further include a guard ring surrounding each of the first and second TSVs. Additionally, the device may include a second structure bonded to the first surface of the first structure, where the first surface has first bond pads.

The invention discloses a method for testing compression creep performance of a metal material under a constant-temperature condition, relates to the technical field of high-temperature performance testing of metal materials, and aims to solve the problem of inaccurate creep measurement at a constant temperature. According to the invention, a full-process compression creep performance test method of constant temperature control, loading compensation and strain correction is constructed, the test accuracy and the result consistency of the metal material in a constant temperature environment are improved, closed-loop control is realized through actual measurement temperature, time delay prediction and retaining ring heating are introduced, the constant temperature stability is ensured, and the test accuracy is improved. A micro-stepping compensation mechanism is adopted to maintain constant pressure stress, a loading state is automatically recovered after interruption, then system deformation is deducted through main and auxiliary link cooperation and a compliance template, strain measurement precision is ensured, distortion caused by boundary friction is overcome in combination with end face stick-slip detection and equivalent strain correction, and the accuracy of strain measurement is improved. Finally, automatic output of performance parameters is achieved through steady-state segment extraction and anomaly recognition, and the effectiveness, reproducibility and engineering applicability of test data are guaranteed.

The invention discloses a numerical control gear shaper for machining a high-precision hardened-tooth-face gear, and belongs to the technical field of numerical control machine tools. Through the combination of the ball screw, the linear guide rail and the penetrating transverse shaft, micron-order positioning and stable linear motion of the tool sliding table in the horizontal direction are achieved, the machine is compatible with gears of various sizes, the idle stroke is reduced, and the machining efficiency and the machine tool universality are improved; a quick-change clamping jaw, a transverse pull rod, a triangular cutting edge impact seat and a movable chip retaining ring are of an integrated structure, the cutting edge of the impact seat is always aligned with the edge of a gear, the movable chip retaining ring synchronously forms a closed protective cover, scrap iron is prevented from splashing, edge machining is faster, more stable and cleaner, and after a large gear bracket-annular tooth groove die hole is replaced, a large-size tooth groove can be formed at a time; and the thin-wall disc gear can be accurately positioned by the central positioning column, so that deformation is prevented. The whole machine has multiple purposes, and the universality and the flexibility are greatly improved.

The invention provides a picoampere-level current measuring device and method with leakage estimation and digital compensation, and the device comprises an electrometer-level operational amplifier and a transimpedance feedback network which are used for converting a measured current into a voltage signal; in combination with a retaining ring conductor driven by a retaining ring buffer and an inner and outer double-layer metal shielding structure, high-resistance node leakage and external interference are remarkably reduced. The digital controller injects 5mV-50mV micro excitation into the retaining ring in a non-sampling window and detects output response so as to estimate input equivalent leakage conductance and perform online compensation; and meanwhile, environment self-adaptive correction is carried out according to a temperature and humidity-leakage admittance model. The system adopts a 24-bit analog-to-digital converter, two-stage zero-drift amplification and multi-point linearity calibration can be switched, picoampere-level current measurement with high precision, low noise and wide dynamic range is realized, and the system is suitable for the fields of high-insulation detection, light current measurement, electrochemical micro-current analysis and the like.

Embodiments of the present application provide a detector device including a photon detector and a multilayer reflector. The photon detector includes a substrate, an isolation structure in a first side of the substrate, a guard ring adjacent to the isolation structure and in the first side of the substrate, a sensor node in the first side of the substrate, the guard ring between the sensor node and the isolation structure, a shared node in the first side of the substrate, the shared node between the guard ring and the isolation structure, an isolation extension structure in a second side of the substrate opposite the first side, the isolation extension structure extending from the second side to the isolation structure. The multilayer reflector is on the first side of the substrate. Using the multilayer reflector can improve collection of photons in an avalanche region.

The invention provides a protection ring resistor detection circuit, a protection ring resistor detection method and a memory. The protection ring resistor detection circuit comprises a plurality of reference resistors, and the resistance values of the reference resistors are different; the first power supply is connected with the first end of the protection ring and the first ends of the plurality of reference resistors and is used for inputting first input voltage to the protection ring and the plurality of reference resistors; the current adjusting module is connected with the second end of the protection ring and the second ends of the plurality of reference resistors, and is configured to enable the current flowing through the protection ring and the plurality of reference resistors to have the same current value; and the resistance detection module is configured to obtain a first voltage value of the second end of the protection ring and a second voltage value of the second end of each reference resistor, and compare the first voltage value with each second voltage value to obtain a resistance value of the protection ring. The protection ring resistance detection circuit can accurately detect the resistance of the protection ring so as to accurately judge whether the protection ring fails or not.

A memory chip and a method of manufacturing the same are provided. The memory chip includes: a memory region including a cell plug in which data is stored; and a guard ring surrounding the memory region. The guard ring includes sub-layers of the same material arranged in the same order as the layer forming the cell plug.

The application relates to a dual-wavelength silicon-based PIN photoelectric sensor with ultralow dark current and high responsivity, which comprises a silicon substrate, a central P + anode region, high resistance / intrinsic silicon absorption region, bottom N + cathode region, junction termination extension region JTE, guard ring GRL, surface passivation layer and electrode structure. Through accurate regulation of the junction edge electric field, the application effectively suppresses the leakage current and early breakdown phenomenon caused by the high edge electric field in the plane PIN structure, realizes sub-nanoampere dark current output, and simultaneously, through synergistic optimization of the intrinsic region thickness and the doping distribution, the sensor obtains higher light responsivity at two typical wavelengths of 660 nm and 940 nm, and meets the requirements of short-wave shallow absorption and long-wave deep absorption.

This invention provides a semiconductor device, its fabrication method, and its application. By setting a multi-layered ring structure outside the X-ray sensitive region, including a P-type charge collection ring, multiple P-type guard rings, and multiple N-type guard rings, the influence of leakage current and external electric fields outside the X-ray sensitive region is effectively shielded, thereby significantly improving signal quality and the stability of the semiconductor device. Furthermore, this structural design effectively suppresses plasma effects, further enhancing the sensitivity and signal-to-noise ratio of the semiconductor device. These performance improvements are crucial for the stable operation of the semiconductor device under high operating voltage environments. The semiconductor device of this invention can achieve a breakdown voltage of at least 600V and an operating voltage of at least 300V under irradiation, fully meeting the requirements of specific applications such as XFELs.

The present invention provides a semiconductor device comprising: at least one transistor, a shallow well region, a guard ring, and a plurality of first doped regions and a plurality of second doped regions. The at least one transistor is located on a substrate, and the at least one transistor comprises a source structure, a gate structure, and a drain structure. The shallow well region surrounds the at least one transistor. The shallow well region has a first conductivity type. The guard ring surrounds the shallow well region. The guard ring has a first conductivity type. The first doped region and the second doped region are arranged within the guard ring and surround the shallow well region. The first doped region and the second doped region are alternately arranged to form a ring. Each of the first doped regions and each of the second doped regions have opposite conductivity types.

The Schottky barrier diode of the present invention comprises: an n-type semiconductor substrate; at least one p-type guard ring, which is arranged on the upper surface side of the semiconductor substrate; an anode electrode, which is arranged on the upper surface of the semiconductor substrate; a cathode electrode, which is arranged on the back surface of the semiconductor substrate; and an insulating film, which is arranged on the innermost inner guard ring of the at least one guard ring, the anode electrode being overlapped on the insulating film, the end of the anode electrode being arranged directly above the inner guard ring, the anode electrode being arranged separately from the inner guard ring, and the thickness of the insulating film being greater than or equal to 1.0 μm.

The invention discloses a ring core die forging die and a million-grade nuclear power half-speed rotor retaining ring manufacturing method. The method comprises the following steps that S1, smelting is conducted, specifically, raw materials are smelted into a proper steel ladle through an electric furnace, then an LF furnace is adopted for conducting external refining on the steel ladle, then a VD furnace is adopted for conducting vacuum degassing refining on the steel ladle, and finally, the steel ladle is poured into a steel ingot; s2, forging: performing rounding and drawing-out on a forge piece, namely the steel ingot, cutting the head and the tail, upsetting the forge piece, drawing-out again, performing ring core die forging on the forge piece, upsetting the forge piece, punching, drawing-out a core rod, and chambering by adopting a saddle to obtain a steel ring; s3, rough machining; s4, solid solution heat treatment; s5, cold deformation strengthening; and S6, finish machining. Ring core die forging is added in free forging, the device can conveniently forge the annular position of the forge piece through ring core die forging, the forge piece is forged thoroughly, defects of the forge piece are forged, the structure is uniform, grains are refined, and therefore the problem that the forge piece is fractured due to the too large diameter during cold deformation is avoided.

A contact structure according to the present disclosure includes a device layer over a substrate, a dielectric structure over the device layer, a first etch stop layer (ESL) over the dielectric structure, a through-via extending through the dielectric structure and the device layer and including a top of a through-via over the first ESL, a semiconductor device includes a first ESL disposed over a through hole, a guard ring structure disposed over the first ESL and around a top of the through hole, a protective layer disposed over the guard ring structure, a second ESL disposed conformally over a top surface of the first ESL, sidewalls of the guard ring structure, sidewalls of the protective layer, and a top surface of the protective layer, and a dielectric layer of the second ESL. The embodiment of the invention further discloses a method for manufacturing the contact structure.

The present invention relates to a semiconductor device with an edge termination region and a passivation layer and a preparation method thereof; the device comprises a substrate, a drift region is provided on the upper end surface of the substrate; a first insulating film is provided on the upper end surface of the substrate; a plurality of guard rings are also provided on the upper end surface of the substrate, each guard ring extends into the drift region, and two adjacent guard rings are separated by the first insulating film; a second insulating film is provided on the first insulating film and the guard rings, a second insulating film through-hole is provided on the second insulating film, and an angle between the inner wall of each second insulating film through-hole and the upper end surface of the substrate is an acute angle; a metal layer is provided in each second insulating film through-hole; a first passivation layer is provided on the second insulating film and the metal layer; a second passivation layer is provided on the first passivation layer; a semiconductor device structure with an edge termination region and a passivation layer is proposed to solve the technical problems that the passivation layer above the metal layer of the existing structure is prone to cracks, humidity and other pollution can penetrate and corrode the metal layer, and there is a high electric field to catalyze the destruction of the terminal.

An ESD guard ring structure includes numerous first fin structures, numerous second fin structures, numerous first polysilicon conductive lines, numerous second polysilicon conductive lines, numerous third polysilicon conductive lines and numerous single diffusion breaks. Each of the first fin structures includes at least one single diffusion break therein. Each of the single diffusion breaks overlaps one of the third polysilicon conductive lines.

The invention discloses a preparation method of a silicon micro-strip detector and the silicon micro-strip detector, relates to the technical field of semiconductor devices, and aims to solve the problem of poor micro-strip energy resolution of the silicon micro-strip detector in the prior art. The method comprises the following steps: providing a silicon substrate; sequentially depositing a first doping layer, a passivation layer and an electrode layer on the first surface of the silicon substrate; preprocessing the first doping layer, the passivation layer and the electrode layer to form a plurality of micro-strip units and a plurality of protection ring units on the silicon substrate; wherein the plurality of protection ring units are positioned on the outer sides of the plurality of micro-strip units; preprocessing the silicon substrate between the plurality of adjacent micro-strip units to form a plurality of trench isolation units in the silicon substrate and obtain a silicon micro-strip detector; on the basis, crosstalk between the micro-strip units is reduced by utilizing the groove isolation units, and the micro-strip energy resolution of the silicon micro-strip detector is improved.

Provided is a nitride semiconductor device including a nitride substrate of a first conductive type including an device region and a peripheral region, a first nitride layer of the first conductive type disposed on the nitride substrate, a second nitride layer of a second conductive type disposed on the first nitride layer in the device region, guard rings disposed on the first nitride layer in the peripheral region, and an impurity region of the second conductive type adjacent to each of the guard rings in the second nitride layer, wherein an upper surface of the first nitride layer is located at a higher level in the device region than in the peripheral region.

The embodiment of the utility model relates to an image sensing integrated circuit device. A process for forming a first deep trench isolation (DTI) structure in the pixel region of the semiconductor substrate is also used to form a second DTI structure in the guard ring region that isolates the pixel region from the surrounding region. The guard ring region may have a PNP guard ring structure. The second DTI structure may include a trench in each of an inner ring, a middle ring, and an outer ring of the PNP guard ring structure. The first and second DTI structures may have conductive cores. The conductive cores of the inner and outer rings may be biased to a first voltage, while the conductive core of the middle ring may be biased to a second voltage of opposite polarity. When the second DTI structure has a conductive core with these biases, the second DTI structure can be used as a guard ring without a PNP structure.

A near infrared sensitivity enhanced non-isolated substrate silicon-based single photon avalanche diode is disclosed, comprising a p-well layer (101), a high voltage n-well (102), the p-well layer and the high voltage n-well layer positioned against each other and configured to form a main junction (100) defining an active region (104), the p-well layer comprising a doping according to a doping concentration profile, the p-well layer is configured to have a first double peak in a doping concentration profile of the p-well layer throughout the active region, the first double peak corresponding to a respective p-type doped region, and the high voltage n-well is configured to have a second double peak corresponding to a respective n-type doped region, the second double peak corresponding to a respective p-type doped region, and the second double peak corresponding to a respective n-type doped region. The n-doped region is configured to achieve an n-p-n-p type device junction distribution, whereby further, the p-well layer is lightly doped and configured to obtain a wide depletion region, i.e., at least 1 [mu] m wide, and the high voltage n-well layer is further configured to extend beyond the p-well layer to form a guard ring (103) around the active region.

The invention provides a gas turbine retaining ring surface NiCoCrAlY coating stripping method, and relates to the field of aero-engine and ship gas turbine component manufacturing, the gas turbine retaining ring surface NiCoCrAlY coating stripping method comprises the following steps: 1, alumina sand is adopted, and a NiCoCrAlY coating area on the surface of a to-be-repaired part matrix is subjected to sand blowing; secondly, the part obtained after sand blasting is put into a hydrochloric acid solution at the room temperature to be subjected to acid pickling, the surface of the part is observed every 20-30 min, and when no gas is generated, the part is immediately taken out and cleaned with cold running water; thirdly, the cleaned part is neutralized in a sodium carbonate solution for at least 0.5 min, and the neutralized part is cleaned with cold running water; and fourthly, clean compressed air is used for blow-drying the surfaces of the parts. According to the method, the NiCoCrAlY coating can be thoroughly removed, no damage is caused to a base body, operation is easy, cost is low, and the method is suitable for fault inspection repair and overhaul engineering of aero-engines and turbine parts of gas turbines.

The utility model relates to the technical field of guard ring assembly, and discloses a guard ring assembly tool which comprises a shell, the inner wall of the shell is connected with an expanding assembly through bolts, the bottom of the shell is provided with a bottom plate through screws, the top of the shell is connected with a top plate through screws, the top face of the top plate is provided with a chute in a penetrating mode, and the top plate is provided with a clamping groove. A first air cylinder is installed on the lower surface of the top plate, and the output end of the first air cylinder is connected with a push plate. According to the utility model, the protective ring can be conveniently sleeved, the four opening rods draw close in a normal state, the protective ring can be easily sleeved on the outer surface of the protective ring, and after the second air cylinder is started, the rack drives the gear, the rotating rod, the four-corner plate and the like to be linked, so that the sliding block slides along the guide rail and the opening rods synchronously move outwards along the direction of the chute, and the protective ring is opened; the whole opening process is easy to operate, and opening preparation work of the protective ring can be rapidly completed.

The utility model belongs to the technical field of total stations, and particularly relates to a demisting device for an objective lens of a total station. Comprising a total station body, a demisting assembly is detachably connected to a sighting part of the total station body, the demisting assembly comprises a shell, an annular sleeve located on the front side of an objective lens of the total station body is arranged below the shell, the side wall of the annular sleeve is attached to a protective ring of the objective lens, and the interior of the annular sleeve is of a hollow structure; the annular sleeve is connected and communicated with the shell through a connecting channel, a heating net is installed in the shell, a blowing fan for blowing heat generated by the heating net to the annular sleeve is installed above the heating net, a plurality of inclined air guide holes are formed in the inner wall of the annular sleeve, and the air outlet ends of the air guide holes face the objective lens. According to the utility model, the objective lens can be continuously demisted, meanwhile, the total station body can be conveniently measured, the measurement interruption is avoided, and the measurement precision and continuity are ensured.

The present disclosure provides a method of manufacturing a semiconductor device. The method includes forming first fins in a first region of the semiconductor device, second fins in a second region of the semiconductor device, third fins in a third region of the semiconductor device, the second region encircling the first region, the third region encircling the second region. The method further includes forming first gate stacks over the first fins, second gate stacks over the second fins, and third gate stacks over the third fins, forming a mask layer covering the first region and the second region, performing an etching process to remove at least a portion of the third gate stacks, depositing a metal-containing material to replace the removed portion of the third gate stacks, and performing a planarization process to expose the first and second gate stacks.