125 results about "Transient voltage suppressor" patented technology

According to embodiments of the present disclosure, there is provided an apparatus and method for protecting a solid-state circuit breaker. The apparatus comprises: a temperature detection unit configured to detect a case temperature of each transient voltage suppressor in one or more transient voltage suppressors; and a control unit configured to: receive the case temperature of one or more transient voltage suppressors from the temperature detection unit; for each of the one or more transient voltage suppressors, predict a junction temperature of each of the one or more transient voltage suppressors after the first switching device and the second switching device are switched from an on state to an off state, based on the case temperature before the first switching device and the second switching device are switched from the on state to the off state; and in response to the junction temperature of at least one transient voltage suppressor of the one or more transient voltage suppressors exceeding a predetermined temperature threshold, generate a first alarm signal.

The utility model discloses a TVS (Transient Voltage Suppressor) overvoltage protection device, which belongs to the technical field of diodes and comprises a packaging upper cover and a packaging bottom cover which are arranged outside a TVS tube, the packaging upper cover and the packaging bottom cover are mutually plugged and then sealed by glue, a through mounting groove is arranged at the bottom of the packaging bottom cover, and the TVS tube is arranged in the through mounting groove. A second heat conduction copper plate is installed in the penetrating installation groove, the upper end of the second heat conduction copper plate is attached to the bottom of the TVS tube, the bottom of the second heat conduction copper plate is fixedly connected with second heat dissipation fins penetrating through the penetrating installation groove, a heat dissipation assembly is installed in the packaging upper cover, and an adjusting assembly is installed on the heat dissipation assembly. The adjusting assembly adjusts the height of the heat dissipation assembly, heat is transmitted to the first heat conduction copper plate through heat conduction silicone grease arranged in the heat dissipation assembly, the heat is transmitted to the first heat dissipation fins through the multiple heat conduction copper pipes, the heat is diffused outwards through the first heat dissipation fins, and therefore sufficient heat dissipation can be conducted on the TVS tube.

The utility model discloses a power supply input surge protection and isolation device, which comprises a piezoresistor, a surge decoupling power resistor and a TVS (Transient Voltage Suppressor) tube which are sequentially connected in series, and a self-adaptive surge control circuit which is connected with the surge decoupling power resistor in parallel, when surge overvoltage occurs, the TVS tube is firstly broken down, and transient large current flows through the adaptive surge control circuit; the surge decoupling power resistor is used for enabling the passing surge current to generate relatively large voltage drop after the TVS tube is broken down; the self-adaptive surge control circuit comprises a first MOS tube which is used for conducting transient large current passing through a TVS (Transient Voltage Suppressor) tube; when the voltage drop on the MOS tube is greater than the breakdown voltage of the voltage-regulator tube, the voltage-regulator tube is broken down to trigger the conduction of the triode; when the voltage-regulator tube is broken down, the triode is conducted, so that the GS voltage drop of the first MOS tube is reduced, and the first MOS tube is turned off; when the sum of the clamping voltage of the TVS tube end and the voltage drop of the surge decoupling power resistor exceeds the minimum action voltage of the piezoresistor, the piezoresistor acts, so that high-energy transient interference flows through the piezoresistor, and surge protection is realized. According to the utility model, the surge protection and isolation protection functions of the input end of the power supply can be effectively realized, and the safety and stability of the use of the power supply are ensured.

The utility model provides a toxic gas detector control circuit capable of resisting electromagnetic interference, which comprises a power supply voltage regulation circuit, a temperature signal acquisition circuit, a sensor voltage regulation circuit, a sensor acquisition control circuit and a gas detector main control circuit which are in power supply connection. The gas detector main control circuit is in control connection with the 485 communication circuit, the acousto-optic prompt circuit, the LED state display circuit and the digital display screen, the gas detector main control circuit is in communication connection with the sensor acquisition control circuit, and the sensor acquisition control circuit is in control connection with the gas signal acquisition circuit and the temperature signal acquisition circuit. A TVS (Transient Voltage Suppressor) tube, a common mode inductor and a diode are arranged in the power supply voltage adjusting circuit; and a TVS tube and a diode are also arranged in the gas detector main control circuit. The poisonous gas detector has the beneficial effects that the anti-electromagnetic interference capability, the reliability and the stability of the poisonous gas detector when the poisonous gas detector is independently used are greatly improved.

The invention discloses a component bidirectional aging tool based on aging equipment and a testing method. The component bidirectional aging tool comprises an aging plate; station needles are arranged on the aging plate and used for aging different types of devices and installing aging sockets, golden fingers are arranged at the two ends of the aging plate, polarity conversion slots are formed in the positions close to the golden fingers, and the polarity conversion slots are connected with the golden fingers; an electrode connecting line is arranged on the aging plate, one end of the electrode connecting line is connected with an aging test device electrode, and the other end of the electrode connecting line is correspondingly connected with the polarity conversion slot; and a polarity conversion plate is arranged on the polarity conversion slot. By applying the technical scheme of the invention, the problems of device appearance damage and low production efficiency caused by manual reversing operation in the aging process of a non-polar capacitor and a bidirectional TVS (Transient Voltage Suppressor) in the prior art can be effectively solved, and the problem of high cost during aging of devices such as transistors with different polarities, JFETs (Junction Field Effect Transistor) and the like can be effectively solved, and an aging tool does not need to be manufactured again.

The invention provides a low-capacity TVS (Transient Voltage Suppressor) tube and a preparation method thereof. The low-capacity TVS tube is provided with a P-type substrate provided with a groove, and a first N + layer and a first N-layer which are sequentially arranged on the groove; wherein two sides of the first N + layer perpendicular to the epitaxial growth direction are provided with first isolation dielectric layers, two sides of the first N-layer perpendicular to the epitaxial growth direction are provided with second isolation dielectric layers, one side, far away from the first N + layer, of the first N-layer is doped with P-type ions, and a first region, doped with the P-type ions, in the first N-layer is connected with an electrode. The grooves are etched by using a relatively large depth-to-width ratio, so that the risks of difficulty in digging deep grooves and insufficient filling of isolation dielectric layers are avoided, the process difficulty is greatly reduced, meanwhile, isolation is performed in advance by using the isolation dielectric layers, isolation failure caused by the problems of diffusion, alignment and the like is avoided, in addition, the width of the PN junction can be flexibly adjusted according to design requirements, and the manufacturing cost is reduced. And therefore, the surge capacity can be improved, and the capacitance can also be reduced.

The invention provides an LDMOS process TVS (Transient Voltage Suppressor) device and a manufacturing method thereof, and belongs to the technical field of TVS semiconductor preparation. Comprising a P-type silicon substrate, the surface of the P-type silicon substrate is provided with a deep N well, the deep N well is used for providing isolation for a source / drain high-voltage N + region and preventing punch-through or premature breakdown between the deep N well and the P-type substrate, the deep N well is used as a collector region of a parasitic NPN BJT, and a P-type body region is arranged in the deep N well. According to the invention, the inherent high-voltage capability of an LDMOS and a parasitic BJT structure are utilized to realize rapid triggering and low clamping, the manufacturing process is highly compatible with a standard CMOS / BCD process, key parameters such as breakdown voltage, clamping voltage, capacitance, surge capability and the like can be optimized by accurately designing a drift region, a P body region, a deep N well and layout, various harsh circuit protection requirements are met, and the reliability of the device is improved. The method is particularly applied to applications requiring low capacitance, high integration level and high reliability.

The utility model discloses a surge protection circuit, a controller, a battery management system, power distribution equipment and a vehicle. The surge protection circuit comprises a first transient voltage suppressor diode and a second transient voltage suppressor diode, the anode of the first transient voltage suppressor diode is connected with the anode of the second transient voltage suppressor diode, and the cathode of the first transient voltage suppressor diode is suitable for being connected with the anode end of a power supply. The cathode of the second transient voltage suppression diode is suitable for being connected with the negative terminal of the power supply and the first grounding terminal. According to the surge protection circuit, when a positive surge occurs and the first transient voltage suppressor diode is broken down, the second transient voltage suppressor diode can serve as a common diode to be conducted, surge voltage is discharged from the first grounding end, and when a negative surge occurs and the second transient voltage suppressor diode is broken down, the surge voltage is discharged from the second grounding end. And the first transient voltage suppression diode can be conducted as a common diode, so that the surge resistance of a subsequent circuit can be improved.

A thermal-protective transient voltage suppressor (TVS) includes a TVS assembly, a housing, a frame, a cover plate, and a pin, where the TVS assembly is provided in the frame; the TVS assembly is electrically connected to the pin; the housing and the cover plate form an accommodation chamber for accommodating the frame; the pin extends out of the accommodation chamber, and an extended part of the pin is provided with a mounting portion for surface mount soldering; a spacing limit post is provided on the cover plate; and the frame abuts against the spacing limit post, such that the mounting portion of the pin and the TVS assembly are spaced apart by a preset distance. The spacing limit post on the cover plate of the thermal-protective TVS limits the frame provided with the TVS assembly, thereby increasing a distance between the mounting portion of the pin and the TVS assembly.

The utility model relates to the technical field of communication testing, in particular to a protection circuit of an RS232 interface chip. The protection circuit comprises a small PCB (printed circuit board); the two standard RS232 interfaces are respectively a J1 interface for a female head and a J2 interface for a male head; a current-limiting resistor R1 and a current-limiting resistor R2; a filtering magnetic bead FB1 and a filtering magnetic bead FB2; a bidirectional transient suppression diode TVS1 and a bidirectional transient suppression diode TVS2; and a filter capacitor C1 and a filter capacitor C2. According to the protection circuit of the RS232 interface chip, when two devices need to be connected with interface debugging signals, glitch voltage and impact current can be effectively absorbed and filtered out through combination of electronic components of the protection circuit, impact of overcurrent and overvoltage problems on the chip can be reduced to a certain extent when the interface is plugged and unplugged, and the reliability of the chip is improved. The purpose of protecting the interface chip is achieved.

This invention provides a bidirectional transient voltage suppressor with low dynamic resistance and high surge capability, comprising: a heavily doped semiconductor substrate of a first conductivity type; a first epitaxial layer disposed on the substrate; a conduction modulation buried layer disposed on the first epitaxial layer; a second epitaxial layer disposed on the conduction modulation buried layer; a heavily doped first conductivity type region disposed on the second epitaxial layer; a first electrode disposed on the front side of the heavily doped first conductivity type region and a second electrode disposed on the back side of the substrate; the conduction modulation buried layer is disposed inside the double epitaxial body region and is configured to form a high-concentration conductivity modulation region of charge carriers under transient high current impact conditions, forming a body region-dominated conduction path between the first epitaxial layer and the second epitaxial layer, so that the conduction current changes from concentrated conduction in the PN junction region to a laterally extended and planar distributed overall conduction mode within the body region, thereby reducing the dynamic resistance of the device and improving the surge carrying capacity of the device.

The invention relates to a three-wire system thermal resistance measurement system and method. The system comprises four groups of transient voltage suppressors, three cables, two constant current sources, a bias resistor, two switches, an output circuit, an output end of a first constant current source and a negative electrode of a first transient voltage suppressor, wherein one end of a first switch is connected with one end of a thermal resistor through a first cable; the other end of the first switch is connected with the negative electrode of the second transient voltage suppressor; the other end of the thermal resistor is grounded through a third cable; the output end of the second constant current source, the negative electrode of the third transient voltage suppressor and one end of the second switch are connected with the other end of the thermal resistor through the biasing resistor and the second cable in sequence; the other end of the second switch is connected with the negative electrode of the fourth transient voltage suppressor; and the output circuit is used for outputting the amplified voltage difference between the output ends of the first constant current source and the second constant current source. The resistance value of the thermal resistor is calculated, high EMC performance is achieved, and measurement errors caused by non-linear reverse leakage current are eliminated.

A motor control circuit is provided for connecting or disconnecting an AC voltage to an AC motor, having a switch having two switch contacts, configured to respond to a process variable and move between open and closed switch contact positions to connect or disconnect the AC voltage to the AC motor; and a snubber circuit arranged across the switch contacts in parallel with the AC motor, and configured to respond to motor inductance when the switch is moved between the open and closed switch contact positions, and provide arc suppression in the switch by dissipating energy stored in the motor inductance. The snubber circuit may include a network having a resistor connected in series with a capacitor, or a metal oxide varistor, or a transient voltage suppressor.

The utility model relates to the technical field of avionic equipment protection, in particular to a lightning protection filtering assembly. Comprising a shell, and a lightning protection module, an anti-reverse module and an EMI filtering module are packaged in the shell. The lightning protection module adopts a transient voltage suppressor (TVS) diode, the clamping voltages are 121V, 19.9 V and 72.7 V respectively, and the response time is less than or equal to 5 microseconds; the anti-reverse module is integrated at a power supply input end, a diode with reverse withstand voltage greater than or equal to 1200V is adopted, and the transient current bearing capacity is greater than or equal to 50A / mu s; the EMI filtering module comprises a pi-type filtering circuit topology; the input interface comprises two circular electric connectors (X1 and X2); and the output interface is a rectangular connector (J3) and is used for integrally outputting all signals and a power supply which are subjected to protection processing. According to the utility model, through module integration, interface centralization and passive high-reliability design, the space and resource waste is reduced, and the module has obvious volume, weight and performance advantages.

A low dropout linear regulator circuit, a power supply chip and an electronic device wherein the low dropout linear regulator circuit comprises: a voltage input terminal for receiving an input voltage; the anti-surge module comprises a bidirectional TVS (Transient Voltage Suppressor) tube, and the anti-surge module is connected with the voltage input end and is used for carrying out voltage stabilization processing on the input voltage and reducing peak burrs of the input voltage; a first electrostatic protector, wherein the first electrostatic protector is connected with the anti-surge module; the linear voltage regulator module comprises an input end and an output end, and the input end of the linear voltage regulator module is connected with the first electrostatic protector; and the voltage output end is connected with the output end of the linear voltage regulator module and is used for providing output voltage, and the anti-surge capability of the power supply chip is remarkably improved on the basis of not increasing the process complexity of the module.

Disclosed herein is a voltage converter including input nodes configured to receive an input voltage, output nodes configured to deliver an output voltage, a rectifying bridge coupled between the input nodes and the output nodes, a capacitor and a resistor series-coupled between the output nodes, and a thyristor coupled between one terminal of the resistor and a given one of the output nodes, wherein the thyristor is configured to allow flow of a positive current from the resistor to the given one of the output nodes. A control input is configured to receive a control signal, wherein the control signal biases a gate of the thyristor to control the flow of current through the thyristor. transient voltage suppressor circuit is coupled to the gate of the thyristor, configured to activate the thyristor upon exceeding a threshold voltage.

The invention discloses a low-capacitance TVS (Transient Voltage Suppressor) structure with low clamping voltage and a preparation method thereof, and relates to the technical field of semiconductor protection devices. The TVS structure comprises a substrate layer of a first conductive type, a first buried layer, a well region, a first injection region, a second injection region, a second buried layer of a second conductive type, an epitaxial layer, a third injection region, a fourth injection region, a fifth injection region, a first deep groove and a second deep groove, wherein the epitaxial layer is arranged above the substrate layer and is in contact with the substrate layer, and a first buried layer and a second buried layer are clamped between the bottom surface of the epitaxial layer and the top surface of the substrate layer; a well region is formed at the top of one side of the epitaxial layer and is located in the same longitudinal extension direction with the first buried layer; a first injection region and fourth injection regions are formed on the inner top surface of the well region, the fourth injection regions are distributed on the two sides of the first injection region, and third injection regions are formed on the two sides of the outer part of the well region; a second injection region and a fifth injection region are formed at the top of the other side of the epitaxial layer and are located in the same longitudinal extension direction with the second buried layer; a plurality of first deep grooves penetrate through the epitaxial layer and extend into the substrate layer, and second deep grooves penetrate through the epitaxial layer and the second buried layer and extend into the substrate layer; the first injection region, the fourth injection region and the second injection region are connected through metal wires and jointly form a first electrode, and the fifth injection region and the second deep groove are connected through metal wires and jointly form a second electrode with the substrate layer. Compared with the prior art, the problem that the area of a transverse structure is limited is solved, and combination of high surge current and low parasitic capacitance on a small-area chip is achieved.

The utility model discloses a packaging structure for a transient voltage suppressor (TVS) device. The package structure includes a housing, a lead frame at least partially encapsulated by the housing, wherein the lead frame includes a chip mounting surface having a chip mounting pad and a chip mounting platform disposed on the chip mounting pad. The package structure includes another lead frame at least partially encapsulated by the housing. The other lead frame is coupled to the clip and to the semiconductor chip. The semiconductor chip is coupled to the chip mounting platform.

According to the battery management chip protection circuit, a battery management chip comprises a first number of sampling pins, the protection circuit comprises a plurality of transient voltage suppressor diodes TVSs, the negative electrode of each TVS is connected with a battery cell corresponding to the last sampling pin in each group of sampling pins, and the negative electrode of each TVS is connected with a battery cell corresponding to the last sampling pin in each group of sampling pins; the positive electrode is connected with the battery cell corresponding to the first sampling pin in the battery management chip; wherein the number of TVSs contained in each group of sampling pins is the same, and in each group of sampling pins, the withstand voltage values of all the sampling pins are the same. In this way, stepped protection of the first number of sampling pins in the battery management chip is achieved, surge voltage exceeding the withstand voltage value of the middle pin is prevented from being generated in the surge limiting process of the last pin, the reliability of the battery management chip is improved, and the service life of the battery management chip is prolonged.

The present invention relates to the field of anti-electromagnetic interference technology, and provides a method for designing surge protection for a Type-C interface power supply. The method comprises a Type-C interface power supply, which comprises a Type-C interface, a transient voltage suppressor diode D4, and a chip end; the method comprises: obtaining an initial circuit schematic diagram and surge protection requirements of the Type-C interface, and determining the rated voltage, rated power, and response time of the Type-C interface; determining a first electrical characteristic of the Type-C interface generating low-voltage surge interference based on the rated voltage and rated power, and configuring multiple TVS transient voltage suppressor diodes at the output end of the Type-C interface to generate a first circuit schematic diagram; obtaining a second electrical characteristic after configuring the multiple TVS transient voltage suppressor diodes, and configuring multiple common-mode inductor filters at the output end of the multiple TVS transient voltage suppressor diodes to generate a second circuit schematic diagram; generating a Type-C interface to be verified based on the second circuit schematic diagram, and performing a low-voltage surge test.

The embodiment of the utility model provides a measurement system of a transient voltage suppressor (TVS), belongs to the technical field of electronics, and aims to solve the problem of large measurement error of the breakdown voltage VBR of the TVS so as to improve the accuracy of measuring the breakdown voltage VBR of the TVS. The system comprises a control unit; the current measuring unit, the first resistor and the transient voltage suppression diode are connected in series to form a series structure; the current excitation measurement unit is connected in series with the series structure; the first voltage measuring unit is connected with the series structure in parallel; wherein the control unit is used for controlling the current excitation measurement unit, the first voltage measurement unit and the current measurement unit to measure the transient voltage suppression diode.

The invention discloses a bidirectional TVS diode and a preparation method thereof, the bidirectional TVS diode comprises a first N-type layer, a second N-type layer and a P-type layer located between the first N-type layer and the second N-type layer, a first depletion region is formed at the interface position of the P-type layer and the first N-type layer, a second depletion region is formed at the interface position of the P-type layer and the second N-type layer, and the first depletion region and the second depletion region are located at the interface position of the P-type layer and the second N-type layer. A neutral region is formed between the first depletion region and the second depletion region, and when the voltage difference between the two ends of the bidirectional TVS diode is smaller than the breakdown voltage of the bidirectional TVS diode, the distance between the interface of the first depletion region and the neutral region and the surface of the side, away from the P-type layer, of the first N-type layer is 18-22 microns. And the distance between the interface of the second depletion region and the neutral region and the surface of one side, far away from the P-type layer, of the second N-type region is 18-22 microns. The invention provides a bidirectional TVS (Transient Voltage Suppressor) diode with a deep junction structure, which can realize more excellent transient surge protection capability.

An electrical isolation module for Power over Ethernet includes a network terminal connection section, a network chip connection section, and an isolation circuit. The network terminal connection section includes a plurality of first pins. The network chip connection section includes a plurality of second pins. The isolation circuit includes a transformer, a common mode choke, and a transient voltage suppressor. The common mode choke is connected between the transformer and the network terminal connection section. The transient voltage suppressor is connected between the transformer and the network chip connection section.

The invention relates to the technical field of semiconductors, in particular to a high-power TVS (Transient Voltage Suppressor) applied to a vehicle gauge system and a preparation method. Comprising a first frame which comprises a pin area, a bending area and a first connecting area which are connected in sequence; the first connecting area is provided with a first chip connecting area which protrudes upwards; the first chip is electrically connected to the first chip bearing area; the second chip is positioned on the top surface of the first chip and is electrically connected with the first chip; one end of the copper clamping piece is provided with a second chip connecting area which protrudes downwards and is electrically connected with the top surface of the second chip; the second frame is fixedly connected with the other end of the copper clamping piece; and the plastic package body wraps the copper clamping piece, the second chip, the first chip, the bending area and the first connecting area. The connection failure risk under vehicle-mounted working conditions such as vibration and impact is reduced, and the mechanical stability of the device is improved.

The invention discloses a high-voltage TVS (Transient Voltage Suppressor) and diode stacked packaging structure and packaging technology, and the structure comprises the following steps: enabling a first chip to face a substrate, packaging and exposing the first chip, and forming a first packaging layer; drilling a hole on one surface of the encapsulation layer to the substrate, filling an electroplating bottom layer upright column, and continuously electroplating a bonding pad on one surface of the encapsulation layer; a second chip and a third chip are mounted towards the bonding pad, the second chip is vertically stacked on the first chip through the bonding pad, the second chip and the third chip are mounted in a tiled mode, the second chip and the third chip are packaged and exposed at the same time, and a second packaging layer is formed; drilling a hole on the surface of the encapsulation layer II to a bottom-layer upright post, electroplating a top-layer upright post, filling, continuously electroplating primary wiring on the surface of the encapsulation layer II, rearranging the top-layer upright post, the chip II and the chip III through the primary wiring, and encapsulating the primary wiring to form an encapsulation layer III; the chips I encapsulated on the same layer are connected in parallel, so that the through-current capability of a specific path is enhanced through the parallel connection, and the encapsulation space is reasonably arranged.

The invention relates to the technical field of battery management systems, in particular to a monomer acquisition optimization method, which comprises the following steps of: acquiring a copper bar as a virtual battery cell, acquiring a voltage signal of the copper bar through an unused channel, establishing a surge voltage calculation model at the moment when a relay is closed, and evaluating whether a TVS (Transient Voltage Suppressor) tube is added to protect a front-end AFE acquisition chip or not. The problem of voltage acquisition errors caused by inaccurate cross-acquisition copper bar compensation can be effectively solved, meanwhile, the risk of damage of surge voltage to an acquisition chip is avoided, the acquisition precision and the system stability are remarkably improved, and support is provided for standardization and platformization of a BMS scheme in the new energy field.

The utility model discloses a bidirectional asymmetric transient voltage suppressor. A transient voltage suppression system, device, apparatus, structure, and related methods. The system includes a first voltage suppression device having a first voltage suppression device substrate, a first voltage suppression device first layer, and a first voltage suppression device second layer. The first voltage suppression device substrate is coupled to the first voltage suppression device first layer and to the first voltage suppression device second layer. The system includes a second voltage suppression device having a second voltage suppression device substrate, a second voltage suppression device first layer, and a second voltage suppression device second layer. The second voltage suppression device substrate is coupled to the second voltage suppression device first layer and is coupled to the second voltage suppression device second layer. The first voltage suppression device is coupled to the second voltage suppression device.

The utility model discloses an electric energy meter communication module, comprising a control side circuit having a power supply end and a reference ground end; the isolation side circuit is provided with a power supply end and a reference ground end and is used for connecting a bus; a first optocoupler; a second optocoupler; a third optocoupler; a transceiver; a first transistor; the second transistor is arranged on the isolation side circuit, the base electrode of the second transistor is connected with the output end of the second optocoupler, and the collector electrode of the second transistor is connected with the sending input end of the transceiver; the bidirectional transient voltage suppressor is connected to the differential signal input / output end of the transceiver; and the self-recovery fuse is connected in series between the differential signal input / output end of the transceiver and the bus. The electric energy meter communication module has the following beneficial effects that the electric energy meter communication module has the characteristics of high anti-interference capability, high reliability, high safety and convenience in maintenance.

The utility model discloses a wireless transceiver supporting a star flash SLE, which relates to the technical field of telecommunication, and comprises a power supply part, a clock part and a radio frequency link part, the power supply part, the clock part and the radio frequency link part are all in circuit connection with a main chip part, and the main chip part is in circuit connection with the main chip part. The VBAT of the power supply part is connected with one end of the D3 and the VDDnRF, the other end of the D3 is grounded, and the D3 is a transient voltage suppressor. According to the utility model, the high and low frequency clock circuits are arranged, so that the requirements of basic operation and signal transmission of the transceiver are met, and meanwhile, the PI filter circuit is arranged for impedance matching. Star flash is applied, power consumption is low, the working requirement of a radio frequency circuit can be met, clutters can be eliminated, and the advantages of being low in time delay, resistant to interference, high in speed and the like are achieved. The transmission distance is long, the anti-interference capability is strong, and the signal is good.

A single-drive gate cascaded high-voltage MOSFET module circuit includes: a MOSFET, a static voltage equalization resistor, a high-voltage capacitor, a high-voltage avalanche diode, a transient voltage suppressor (TVS) diode, a drive resistor, and a varistor (MOV). The present invention has a simple drive structure and also has excellent switching characteristics, superior dynamic and static voltage equalization effects, and low module loss.