A latency
control circuit and method thereof and auto-precharge
control circuit and method thereof are provided. The example latency
control circuit may include a master unit activating at least one master
signal based on a reference
signal and an internal
clock signal and a plurality of slave units receiving the at least one master signal, each of the plurality of slave units receiving a plurality of signals and outputting an output signal based at least in part upon one of the received plurality of signals. The example method of latency control may include receiving at least one master signal, the received at least one master signal activated based on a reference signal and an internal
clock signal and receiving a plurality of signals and outputting an output signal based at least in part upon one of the received plurality of signals and latency information. The example auto-precharge control circuit may include a precharge command
delay unit generating a plurality of first precharge command
delay signals in response to an internal
clock signal and a write auto-precharge command signal, at least one
bank address
delay unit outputting a delayed
bank address signal and a precharge main
signal generator outputting a precharge main signal to banks based on the delayed
bank address signal. The method of performing a precharging operation with the auto-precharge control circuit may include delaying a bank address signal based on a
minimum time interval between executed memory commands and outputting a precharge main signal to one or more memory banks based on the delayed bank address signal.