61results about "Data rate detection arrangements" patented technology

The invention relates to the technical field of communication, and provides a downlink control information detection method and device, electronic equipment, a storage medium and a computer program product, and the method comprises the steps: carrying out the rate de-matching based on to-be-processed data, and obtaining the rate de-matching data; the to-be-processed data is obtained by performing resource element channel estimation and equalization in a control channel unit in a downlink control information blind detection process; performing polarization decoding on the rate de-matching data based on the aggregation level corresponding to the to-be-processed data to obtain decoded data; determining a target load length range from two load length ranges preset for the downlink control information based on the bit length information of the decoded data; wherein the two load length ranges are divided according to aggregation grades; and performing data verification on the decoded data based on the target load length range to obtain a detection result of the downlink control information. According to the invention, the detection efficiency of the downlink control information can be improved by reducing the calculation amount and time during detection of the downlink control information.

The invention discloses an unmanned aerial vehicle-to-vehicle multipath channel modeling method considering unmanned aerial vehicle body shielding and six-dimensional motion characteristics, and the method comprises the steps: carrying out the modeling of a channel between a transmitting antenna and a receiving antenna, and obtaining a channel model; calculating position vectors and velocity vectors of the unmanned aerial vehicle, the vehicle, the transmitting-receiving end antenna and the scatterer in the channel model; calculating macro Doppler frequency shift of each signal transmission path in a three-dimensional translation scene of the unmanned aerial vehicle in the channel model; calculating the micro-Doppler frequency shift of each signal transmission path in the unmanned aerial vehicle three-dimensional rotation scene in the channel model; calculating a space-time correlation function of a transmission signal in a six-dimensional motion scene of the unmanned aerial vehicle in the channel model; and calculating the time-varying Doppler power spectrum density of the transmission signal in the six-dimensional motion scene of the unmanned aerial vehicle in the channel model. According to the method, the influence of the six-dimensional motion of the unmanned aerial vehicle on the multipath channel Doppler effect and the channel statistical characteristics is comprehensively analyzed, and comprehensive analysis of the unmanned aerial vehicle on the multipath channel characteristics of the vehicle can be provided.

The invention provides a Baud rate adaptive adjustment method and device. The Baud rate adaptive adjustment method comprises the following steps: acquiring target signal information of a target chip in a preset time interval; the initial baud rate of the target chip in the preset time interval is calculated according to the target signal information, a reference baud rate is determined based on the initial baud rate, and the reference baud rate is larger than the initial baud rate; performing data transmission based on the reference baud rate, and detecting a data transmission result; under the condition that the data transmission result is normal, setting the reference baud rate as an initial baud rate, and continuing to execute the step of determining the reference baud rate based on the initial baud rate; under the condition that the data transmission result is abnormal, the initial baud rate is determined as the target baud rate, by means of the method, the appropriate baud rate can be adjusted in a self-adaptive mode for data transmission, and the data communication efficiency is improved.

A serial data receiver subsystem included in a computer system may include a data detection circuit, a speed detection circuit, and a receiver circuit that includes multiple subcircuits. The data detection circuit performs a comparison a reference voltage to the magnitude of signals received via a communication link that encode a serial data stream consisting of multiple data symbols. Using a result of the comparison, the data detection circuit may activate a indicating the presence of data on the communication link. Once the is active, the speed detection circuit checks the number of transitions to determine a rate at which data is being transmitted. In response to a determination that the rate of the data being transmitted exceeds a threshold value, the receiver circuit activates one or more of the multiple subcircuits.

A device includes a transmitter coupled to a node, where the node is to couple to a wired link. The transmitter has a plurality of modes of operation including a calibration mode in which a range of communication data rates over the wired link is determined in accordance with a voltage margin corresponding to the wired link at a predetermined error rate. The range of communication data rates includes a maximum data rate, which can be a non-integer multiple of an initial data rate.

Provided is a wireless network system. The wireless network system includes a base station device, and the base station device includes a processing circuit configured to detect a transmission rate from a part of a preamble of an incoming packet transmission signal and adapt a radio configuration to receive a remaining part of the incoming packet transmission signal at the transmission rate.

This application provides a method and an apparatus for adjusting a transmission rate, a processor, a network device, and a system. The method includes: obtaining first data at a first rate; adding additional data to the first data in a specific proportion to obtain second data; and sending the second data at a second rate, where the second rate is greater than the first rate. A transmission rate is increased by adding the additional data to the first data in the specific proportion, to break a limitation of a backplane on device capacity expansion and upgrade during device capacity expansion and upgrade. This can not only avoid a frequency hole, but also can meet a future performance requirement.

The present invention discloses a QPSK baseband signal symbol rate estimation method based on constellation diagram variance, the steps of which are as follows: obtaining baseband signal sequences of different lengths; obtaining constellation diagrams corresponding to baseband signal sequences of different lengths; calculating the mean of constellation points in each quadrant of the constellation diagram; obtaining a mean residual diagram of each constellation diagram; calculating the total variance of each mean residual diagram; determining a sampling invariant point; and estimating the symbol rate of the QPSK baseband signal. The present invention uses the total variance of the mean residual diagram to determine the sampling invariant point, and the number of total variances of the calculated mean residual diagram is the number of sampling points in one symbol period. The sampling invariant point is used to estimate the symbol rate of the QPSK baseband signal, thereby avoiding the influence of the band-limited filter and being applicable to the symbol rate estimation of the baseband signal using a band-limited shaping filter. The present invention has the advantages of high flexibility, low computational complexity, and high engineering application value.

The invention discloses a signal processing method and electronic equipment, and the method comprises the steps: obtaining first processing information from a second controller through being applied to a first controller; the first processing information comprises at least one equalization parameter, and the at least one equalization parameter is used for training a communication link between the first component and the second component; determining a first equalization parameter from the first processing information; processing the target signal based on the first equalization parameter, and sending the target signal to a second component to train a communication link; the target signal is transmitted by the first component.

A serial data receiver subsystem of a computer system includes a data rate detection circuit and a receiver circuit. The data rate detection circuit is configured to detect that a communication link operates in a high-speed mode rather than in a low-speed mode by detecting that a number of transitions in a serial data stream over a reference period of time exceeds a threshold value. The date rate detection circuit is further configured to activate a data rate detection signal indicating that the communication link operates in the high-speed mode, the data rate detection signal activated in response to detection that the number of transitions in the serial data stream over the reference period of time exceeds the threshold value. The receiver circuit is configured to activate one or more of a plurality of subcircuits included in the receiver circuit in response to activation of the data rate detection signal.

The disclosed apparatus, structures, and methods are directed to a wireless receiver. The configurations presented herein employ a structure operative to receive a plurality of analog signals, a signal encoder configured to encode the plurality of received analog signals into a single encoded analog composite signal based on a coding scheme operating under a first code rate, a signal reconstruction module configured to segregate and reconstruct the single encoded digital composite signal into a re-encoded digital composite signal in accordance with the coding scheme operating under a second code rate. In addition, a signal decoder configured to decode the digital composite signals based on the coding scheme operating under the second code rate, and to output digital signals, in which each digital signal in the plurality of digital signals corresponds to a respective analog signal of the plurality of received analog signals.

To provide adaptive radio configuration in wireless networks.SOLUTION: A wireless networking system is provided. The wireless networking system includes a base station device including processing circuitry configured to detect a transmission rate from a portion of a preamble of an incoming packet transmission signal and adapt a radio configuration to receive a remainder of the incoming packet transmission signal at the transmission rate.SELECTED DRAWING: Figure 1

The invention provides an MLSE balanced receiving method and device, and the method comprises the steps: receiving a to-be-recovered signal formed by a signal transmitted at each moment, and enabling the to-be-recovered signal to be obtained through the channel transmission and noise addition of a transmitted signal; for each moment, comparing the state metrics for transferring each possible signal state at the previous moment to the signal state at the current moment, and determining a target state transfer path for transferring the signal state at the previous moment to the signal state at the current moment when the state metric is maximum, determining the signal state at the previous moment when the state measurement is maximum as the maximum possible signal state at the previous moment; and determining an equalization signal corresponding to the to-be-recovered signal based on the target state transition path at each moment and a signal state corresponding to a maximum state metric in the state metrics of each possible signal state at the last moment and each possible signal state at the last moment of each moment. According to the invention, the equalization complexity can be reduced.

A serial data receiver subsystem of a computer system includes a data rate detection circuit and a receiver circuit. The data rate detection circuit is configured to detect that a communication link operates in a high-speed mode rather than in a low-speed mode by detecting that a number of transitions in a serial data stream over a reference period of time exceeds a threshold value. The date rate detection circuit is further configured to activate a data rate detection signal indicating that the communication link operates in the high-speed mode, the data rate detection signal activated in response to detection that the number of transitions in the serial data stream over the reference period of time exceeds the threshold value. The receiver circuit is configured to activate one or more of a plurality of subcircuits included in the receiver circuit in response to activation of the data rate detection signal.

An integrated circuit with an interface circuit is described. During operation, the interface circuit may receive signals corresponding to a header of a frame that is compatible with a serial communication protocol, where the received signals include a temporal pattern of binary bits with instances of a dominant signal level and a recessive signal level. Then, the interface circuit may compute a set of conditions based at least in part on the receive signals, where, when valid, the set of conditions identify a first dominant bit in the binary bits having the dominant signal level. Moreover, when the set of conditions are valid, the interface circuit may: determine a location of synchronization field in the header relative to the identified first dominant bit; and calculate a baud rate of the receive signals based at least in part on a subset of the binary bits in the synchronization field.

An integrated circuit with an interface circuit is described. During operation, the interface circuit may receive signals corresponding to a header of a frame that is compatible with a serial communication protocol, where the received signals include a temporal pattern of binary bits with instances of a dominant signal level and a recessive signal level. Then, the interface circuit may compute a set of conditions based at least in part on the receive signals, where, when valid, the set of conditions identify a first dominant bit in the binary bits having the dominant signal level. Moreover, when the set of conditions are valid, the interface circuit may: determine a location of synchronization field in the header relative to the identified first dominant bit; and calculate a baud rate of the receive signals based at least in part on a subset of the binary bits in the synchronization field.

A wireless networking system is provided. The wireless networking system includes a base station device including processing circuitry configured to detect a transmission rate from a portion of a preamble of an incoming packet transmission signal and adapt a radio configuration to receive a remainder of the incoming packet transmission signal at the transmission rate.

A receiver circuit that limits the frequency of a clock signal used in a computer system is disclosed. An embodiment of the receiver circuit includes a front-end circuit configured to generate an equalized signal, a clock generator circuit configured to generate a clock signal using a plurality of samples of the equalized signal, and a measurement circuit. The measurement circuit is configured to monitor a frequency of the clock signal and activate an indication signal in response to determining that the frequency of the clock signal exceeds a threshold frequency. In response to activation of the indication signal, the clock generator circuit is configured to set the frequency of the clock signal to a particular frequency.

Techniques that provide link auto-negotiation between a radio equipment controller (REC) and a radio equipment (RE) are described herein. In one embodiment, a method includes performing, by a proxy master, a Common Public Radio Interface (CPRI) Layer 1 (L1) link auto-negotiation with a RE to achieve a L1 synchronization between the proxy master and the RE at a link bit rate; communicating the link bit rate from the proxy master to a proxy slave; performing, by the proxy slave, a CPRI L1 link auto-negotiation with a REC to determine whether a L1 synchronization between the proxy slave and the REC is achieved, wherein if the L1 synchronization is achieved, the link bit rate is a common matching link bit rate achieved; and upon the common matching link bit rate being achieved, establishing a CPRI link between the REC and the RE using the common matching link bit rate.

Techniques that provide link establishment between a radio equipment controller (REC) and a radio equipment (RE) in a fronthaul network are described herein. In one embodiment, a method includes performing, Common Public Radio Interface (CPRI) Layer 1 (Ll) link auto-negotiation operations to establish a CPRI link between the REC and RE. A proxy slave may achieve a hyper frame number (HFN) synchronization with the REC at a link bit rate for a first CPRI bit stream and communicate the first CPRI bit stream and the link bit rate to a proxy master. The proxy master may communicate a second CPRI bit stream to the proxy slave to transmit to the REC. The Ll link auto-negotiation operations are completed and CPRI link is established between the REC and the RE when the REC achieves a HFN synchronization for the second CPRI bit stream.

The application relates to the technical field of communication, in particular to a data receiving method, a data sending method and a computer readable storage medium. The method comprises the following steps: when a fault signal is detected, a fault starting signal is sent, and a first time when the fault starting signal is sent is recorded, the fault starting signal is used for acquiring a plurality of groups of fault data packets, and the sampling frequency of the plurality of groups of fault data packets is a preset sampling frequency; a first fault data packet is received, and a second time when the first fault data packet is received is recorded, the first fault data packet is a first group of fault data packets in the plurality of groups of fault data packets; a plurality of sampling time marks of the plurality of groups of fault data packets are calculated according to the preset sampling frequency, the first time and the second time, the preset sampling frequency and the frequency required by a fault detection waveform of a data receiving end are matched, high-frequency sampling data transmission can be realized, the required data transmission flow is saved, the accuracy of fault analysis is improved, and digital sampling is realized.

The invention relates to a method for flexibly adapting the bit rate within a computer network comprising at least one first node, wherein the node exchanges information over a data bus and / or over a point-to-point connection, wherein the following steps are performed: acquiring information about a first reception time of a first message, receiving information about a first transmission time of the first message, acquiring information about a second reception time of a second message, receiving information about a second transmission time of the second message, ascertaining a first value depending on the received and acquired information, and comparing the first value with a predefined second value, and identifying the state of the first node depending on the comparison result, wherein the comparison result is used to determine the clock used to generate the clock signals of at least the first node and what bit rate is present over a data bus and / or over a point-to-point connection from and to the first node and to further nodes in the computer network and, if the bit rate is known, the bit rate in the computer network is changed flexibly by modifying the clock used to generate the clock signals.

The invention relates to a symbol rate calculation method for frequency modulation mode. According to the self-characteristics of signals in radio phase amplitude modulation mode, the density clustering and statistical methods are used to calculate the symbol rate. Specifically, it includes obtaining the range of the overall data distribution, dividing intervals and performing extreme value analysis, sequence segmentation processing, continuity processing, construction of segmentation point sequences, construction of interval sequences, clustering analysis, and point calculation for individual symbols. It also discloses a symbol rate calculation device for frequency modulation mode and a storage medium. The beneficial effects achieved by the present invention are: under the condition of containing noise, the symbol rate can still be correctly calculated, and the longer the duration of the signal, the higher the accuracy of symbol rate calculation, which has strong robustness.

A method in a fronthaul network (200) comprising a radio equipment controller (210) connected to a proxy slave (230), a proxy master (240) connected to a radio equipment (220), and an Ethernet network (250) connecting the proxy master and the proxy slave for establishing a Common Public Radio Interface, CPRI, link between the radio equipment controller and the radio equipment over the Ethernet network is provided. The method comprises: receiving (301), at the proxy slave from the radio equipment controller, a first CPRI bit stream transmitted at one or more first link bit rates at one or more respective transmit times, and attempting to decode, at the proxy slave, the first CPRI bit stream at one or more second link bit rates at one or more respective reception times; on achieving hyper frame number synchronization, HFN Sync, at a sync link bit rate, mapping (302) the first CPRI bit stream to one or more Radio over Ethernet, RoE, frames, at least one of the one or more RoE frames comprising a header indicating the sync link bit rate; transmitting the one or more RoE frames to the proxy master; on receiving one or more RoE frames from the proxy master, the one or more RoE frames received from the proxy master comprising a second CPRI bit stream transmitted by the radio equipment, de-mapping (305) the one or more RoE frames received from the proxy master; transmitting the second CPRI bit stream to the radio equipment controller at the first sync bit rate; and upon HFN Sync being achieved between the proxy slave and the radio equipment controller using the sync link bit rate, communicating between the radio equipment controller and the radio equipment via the established CPRI link using the sync link bit rate.

The invention provides a vehicle-mounted Ethernet converter system and a data traffic acquisition method, the vehicle-mounted Ethernet converter system comprises a vehicle-mounted Ethernet, a common Ethernet and a single-chip microcomputer, and the vehicle-mounted Ethernet and the common Ethernet are in communication connection and form a communication line for transmitting data. The single-chip microcomputer is used for collecting a voltage signal of the communication line and determining the signal transmission rate of the communication line based on the voltage signal. Wherein a buffer and a filter are sequentially connected between the communication line and the single-chip microcomputer, the buffer is used for amplifying and isolating a voltage signal, the filter is used for filtering noise in the amplified voltage signal, and the ADC input end of the single-chip microcomputer is connected with the filter. The anti-interference capability and the transmission stability of the voltage signal can be improved, so that the accuracy of the signal transmission rate obtained according to the voltage signal is higher, and the real-time monitoring of the signal transmission rate in the data transmission process of the vehicle-mounted Ethernet is realized.

Techniques associated with link establishment in a fronthaul network are described herein. In one embodiment, a method includes receiving, by a proxy node, a Common Public Radio Interface (CPRI) bit stream transmitted by a radio equipment controller, wherein the CPRI bit stream is transmitted within a transmit time interval of the radio equipment controller; and fast-sampling, by the proxy node, the CPRI bit stream to determine whether a hyper frame number synchronization with the radio equipment controller at a common matching link bit rate is achievable, wherein the fast-sampling comprises attempting to decode the received CPRI bit stream and achieve the hyper frame number synchronization for each of a plurality of link bit rates configured for a fast-sampling time period during at least one fast-sampling time interval configured for the proxy node.

A circuit can enable communication between a primary device and one or more secondary devices. This communication can use a Universal Asynchronous Receiver Transmitter (UART) protocol. During operation, the primary device may require information about the baud rate of the secondary device. The UART can operate in reverse polarity mode, and this reverse polarity can be interpreted by the secondary device as a request to enter an auto-baud detection mode. Using reverse polarity mode to enter auto-baud detection mode can prevent excessive delays in UART communication and avoid the need for additional pins to implement the auto-baud detection mode.

This application provides a method, apparatus, processor, network device, and system for improving transmission rate. The method includes: obtaining first data at a first rate; adding additional data to the first data at a certain proportion to obtain second data; and transmitting the second data at a second rate greater than the first rate. By adding additional data to the first data at a certain proportion, the transmission rate is increased, thereby breaking the limitations imposed by the backplane on device expansion and upgrades. This not only avoids frequency gaps but also adapts to future performance requirements.

A serial data receiver subsystem included in a computer system may include a data detection circuit, a speed detection circuit, and a receiver circuit that includes multiple subcircuits. The data detection circuit performs a comparison a reference voltage to the magnitude of signals received via a communication link that encode a serial data stream consisting of multiple data symbols. Using a result of the comparison, the data detection circuit may activate a indicating the presence of data on the communication link. Once the is active, the speed detection circuit checks the number of transitions to determine a rate at which data is being transmitted. In response to a determination that the rate of the data being transmitted exceeds a threshold value, the receiver circuit activates one or more of the multiple subcircuits.

A method for flexibly adjusting the bit rate within a computer network with at least one first node, wherein the node exchanges information via a data bus and / or a point-to-point connection, wherein the steps of - acquiring information about the first reception time of a first message, - receiving information about the first transmission time of the first message, - acquiring information about the second reception time of a second message, - receiving information about the second transmission time of the second message, - determining a first value depending on the received and acquired information, and - comparing the first value with a predetermined second value, - recognizing a state of the first node depending on the comparison result, are performed, characterized in thatthat the comparison result determines a clock generator for generating clock signals of at least the first node and the bit rate present via the data bus and / or via the point-to-point connection to and from the first node and to other nodes in the computer network, and that, if the bit rate is known, the bit rate in the computer network can be flexibly changed by modifying the clock generator for generating the clock signals.