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Low capacitance super-deep groove transient voltage restraining diode structure

A transient voltage suppression, deep trench technology, applied in circuits, electrical components, semiconductor devices, etc., to achieve the effect of increasing junction area, high resistance to high surge current, and reducing size

Active Publication Date: 2013-07-17
江苏应能微电子有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This makes the application of traditional planar TVS and trench TVS devices problematic in the interface of modern high-end electronic equipment

Method used

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  • Low capacitance super-deep groove transient voltage restraining diode structure
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  • Low capacitance super-deep groove transient voltage restraining diode structure

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Embodiment Construction

[0019] The preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, so as to define the protection scope of the present invention more clearly.

[0020] The present invention uses an innovative ultra-deep trench (greater than 10 μm), N-type doped polysilicon (poly-Si) filling and near intrinsic lightly doped N-type epitaxial (near intrinsic N-Epi) structure to manufacture small-scale , Low capacitance TVS diode devices.

[0021] see Figure 4 , Figure 4 It is a structural schematic diagram of a low-capacitance ultra-deep trench TVS diode structure. The low-capacitance ultra-deep trench TVS diode structure includes a heavily doped P-type substrate 41, a heavily doped N-type epitaxial layer 42, a lightly doped N-type epitaxial layer 43, silicon dioxide (SiO 2 ) layer 44 , an interlayer i...

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PUM

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Abstract

The invention discloses a low capacitance super-deep groove transient voltage restraining diode structure which comprises a television service provider network (TVSPN) junction and a low capacitance PN junction. A series of close arranged super-deep grooves with depth deeper than 10 mum are etched on a multilayer structure formed by stacking of a heavily doped P-type substrate (41), a heavily doped N-type extending layer (42), a lightly doped N-type extending layer (43) and a silicon dioxide layer (44), the super-deep grooves penetrate through the lightly doped N-type extending layer (43) and the heavily doped N-type extending layer (42) to enter in the heavily doped P-type substrate (41), doped N-type polycrystalline silicon (47) is filled in the super-deep grooves, the N-type polycrystalline silicon is pushed at the high temperature further, and the TVSPN junction of a three-dimensional structure is formed by the side wall and the bottom of the doped N-type polycrystalline silicon (47) for filling the close arranged super-deep grooves and the heavily doped P-type substrate (41). P-type regional injection (49) is arranged on the lightly doped N-type extending layer (43). The low capacitance PN junction is formed by the P-type regional injection (49) and the lightly doped N-type extending layer (43).

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a low capacitance ultra-deep trench transient voltage suppression (Transient Voltage Suppressors, TVS) diode structure. Background technique [0002] The continuous shrinking of the line width of integrated circuits requires the continuous reduction of the operating voltage of electronic devices, and also makes it easier for electronic devices to be damaged by transient voltages in the form of electrostatic discharge (Electro-Static discharge, ESD) or other forms in the circuit. TVS is a diode-based protection device used to protect the system from various forms of transient high voltage impact. Its working principle is as follows: figure 1 As shown, the TVS 10 is connected in parallel with the protected circuit 11 on the circuit board. Under normal operating conditions, the TVS 10 presents a high impedance state on the protected circuit 11 . When under the impact of ESD...

Claims

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Application Information

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IPC IPC(8): H01L29/861H01L29/06
Inventor 朱伟东吴昊赵泊然
Owner 江苏应能微电子有限公司
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