84 results about "Amorphous oxide" patented technology

The invention belongs to the technical field of semiconductor devices, and discloses a novel semiconductor nonvolatile memory and a preparation method and application thereof. The memory comprises a substrate, a bottom electrode, an amorphous oxide interface layer, a ferroelectric dielectric layer and a top electrode which are sequentially arranged from bottom to top, the preparation method comprises the steps of (1) cleaning the substrate, (2) depositing the bottom electrode, (3) forming the amorphous oxide interface layer, (4) depositing the ferroelectric medium layer, and forming the ultrathin ferroelectric medium layer with uniform composition and good ferroelectricity on the amorphous MoO3 interface layer, (5) patterning and depositing the top electrode, and (6) performing rapid thermal annealing treatment. The memory is applied to a three-dimensional stacked nonvolatile memory array or construction of a back gate type ferroelectric transistor structure. According to the invention, the formation of a non-ferroelectric phase is effectively inhibited, the preferred orientation arrangement of the ferroelectric phase is promoted, the polarization intensity is enhanced, and the ferroelectric performance of the device is improved. The material has the advantages of low thermal budget, high process compatibility and excellent ferroelectric performance.

To suppress spurious responses and also suppress degradation of main responses.SOLUTION: An elastic wave device 100 includes: a supporting substrate 10; a piezoelectric layer 14 formed on the supporting substrate 10; a pair of comb-shaped electrodes 20 provided on the piezoelectric layer 14; a first insulation layer 11 formed between the supporting substrate 10 and the piezoelectric layer 14, the first insulation layer being made of one of polycrystal or amorphous oxide aluminum and polycrystal or amorphous polysilicon; and a second insulation layer 12 formed between the first insulating layer 11 and the piezoelectric layer 14, the second insulation layer being made of aluminum nitride, silicon nitride, silicon carbide, or diamond-like carbon and having a first surface 60 adjacent to the first insulation layer 11 and a second surface 61 adjacent to the piezoelectric layer 14, and the first surface being rougher than the second surface.SELECTED DRAWING: Figure 1

The invention relates to a desolventizing layer modified silicon-carbon negative electrode and a preparation method, the desolventizing layer modified silicon-carbon negative electrode comprises a silicon-carbon negative electrode, the silicon-carbon negative electrode comprises porous carbon mainly comprising mesopores and a silicon substrate attached in the pores of the porous carbon, and the desolventizing layer is covered on the surface of the silicon-carbon negative electrode. The desolventizing layer is an oxide of an amorphous active metal and a composite oxide of the amorphous active metal and lithium, the desolventizing layer at least covers the surface of the silicon substrate in the pores of the porous carbon, the desolventizing layer is made of amorphous titanium oxide, lithium titanate, niobium oxide, lithium niobate and titanium niobate, and after the electrolyte permeates into the pores of the porous carbon, the surface of the silicon substrate is coated with the desolventizing layer. And the lithium ions subjected to desolvation through the desolvation layer are alloyed with a silicon substrate. And the structural stability, the charge-discharge efficiency and the rate capability of the silicon-carbon negative electrode material are improved.

The present disclosure generally relates to spintronic devices comprising a YPtBi layer having a (111) orientation. The spintronic stack further comprises a ferromagnetic layer and a buffer layer. The buffer layer has a (002) or (111) orientation, which promotes the (111) orientation of the YPtBi layer. The buffer layer comprises an amorphous oxide or nitride layer, an amorphous metal layer disposed on the amorphous oxide or nitride layer, a textured pre-seed layer disposed on the amorphous metal layer, and one of: a (002) hexagon or (111) fcc layer, a B2 alloy layer, or first and second bcc or B2 alloy layers.

A glass is an amorphous oxide glass. An SiO2 content ranges from 56 mol % to 80 mol %, an Li2O content is 2.00 mol % or less, a B2O3 content ranges from 0 mol % to 4 mol %, a total content of MgO and CaO (MgO+CaO) ranges from 9 mol % to 40 mol %, and the oxide glass has a specific gravity of 2.75 g / cm3 or less, and a glass transition temperature of 650° C. or higher.

The present invention relates to a display panel and a method for manufacturing the same. The present invention prepares a first polycrystalline oxide active portion on a first channel portion of a first amorphous oxide active portion, and utilizes a stacked structure formed by the first channel portion and the first polycrystalline oxide active portion to achieve a high-mobility carrier channel effect; and utilizes a single-layer structure of a first contact portion and a second contact portion to achieve a low cutoff current effect. The present invention prepares a second polycrystalline oxide active portion and a third polycrystalline oxide active portion on a third contact portion and a fourth contact portion of a second amorphous oxide active portion, respectively, and utilizes a single-layer structure of the second channel portion to achieve high stability and low cutoff current effects; utilizes a stacked structure of the third contact portion and the second polycrystalline oxide active portion to optimize the ohmic contact characteristics with the second source electrode; and utilizes a stacked structure of the fourth contact portion and the third polycrystalline oxide active portion to optimize the ohmic contact characteristics with the second drain electrode.

Disclosed in the present application are a solar cell and a preparation method, a photovoltaic device, an electric device and a power generation device. The solar cell comprises: a first electrode, a first light-absorbing layer, a composite layer, a second light-absorbing layer and a second electrode, which are sequentially stacked, wherein the first light-absorbing layer is arranged between the first electrode and the composite layer, the second light-absorbing layer is arranged on the side, away from the first light-absorbing layer, of the composite layer, and the second electrode is arranged on the side, away from the composite layer, of the second light-absorbing layer. The composite layer comprises an amorphous oxide, and the amorphous oxide comprises an indium gallium zinc oxide. By designing that the composite layer comprises an amorphous oxide, the indium gallium zinc oxide is in an amorphous state, and the amorphous state is a crystal structure lacking of long-range order, such that the migration path of carriers in the material becomes complex and discontinuous, and the lateral migration of carriers in the composite layer is reduced, which is beneficial for improving the performance of the solar cell.

A thin-film transistor and an array substrate are provided. The thin-film transistor includes a substrate and an active layer on the substrate. The active layer includes multiple layers of oxides arranged in a stacked manner; the multiple layers of oxides include a channel layer, a transition layer, and a first barrier layer; the channel layer is a layer having the maximum carrier mobility in the multiple layers of oxides; the channel layer is a crystalline oxide layer or an amorphous oxide layer; the transition layer is in direct contact with the channel layer; the first barrier layer is the outermost oxide layer among the multiple layers of oxide; the first barrier layer and the transition layer are both crystalline oxide layers; the band gap of the first barrier layer and the band gap of the transition layer are both greater than the band gap of the channel layer.

The invention relates to the technical field of batteries, in particular to a high-entropy amorphous oxide material and a preparation method thereof, an electrolyte material and a battery. The preparation method provided by the invention comprises the following steps: providing lithium oxide, rare earth oxide and zirconium oxide, and mixing the lithium oxide, the rare earth oxide and the zirconium oxide according to a preset first molar ratio to obtain an oxide matrix; providing a transition metal oxide and a glass network forming body, and mixing the matrix, the transition metal oxide and the glass network forming body according to a preset second molar ratio to obtain a precursor; treating the precursor by adopting a sol-gel method or a ball milling method, and then heating and cooling to obtain an amorphous compact structure; and providing a substrate, taking the amorphous compact structure as a target material, depositing the target material on the substrate by adopting a magnetron sputtering method, and stripping the substrate to obtain the high-entropy amorphous oxide material. The invention seeks an amorphous oxide material which is stable in structure and has higher ionic conductivity compared with an inorganic solid electrolyte.

Provided is a glass plate having a high average strength and a small degree of dispersion of the strength. A glass plate which contains a base glass phase and an intermediate phase, the base glass phase being an amorphous oxide that contains 50%-80% of SiO2, 0%-30% of Al2O3, and 0.1%-35% of Li2O in terms of oxide-based mol%, and the intermediate phase being an amorphous oxide that contains 50%-80% of SiO2, 5%-20% of Al2O3, and 5%-20% of Li2O in terms of oxide-based mol% and has a composition different from that of the base glass phase.

Disclosed herein is a FeFET transistor and related integrated circuits. The channel layer of the transistor (1612a) may be formed from an Amorphous Oxide Semiconductor. Examples of amorphous oxide semiconductors that could be utilized include Indium Oxide, Indium Gallium Zinc Oxide (IGZO), Zinc Tin Oxide (ZTO), Indium Zinc Oxide (IZO), Gallium Zinc Oxide (GZO), Aluminum Zinc Oxide (AZO), Cadmium Oxide, Hafnium Indium Zinc Oxide (HIZO), Tin Oxide, and Indium-Tin-Zinc Oxide (ITZO), among others. The amorphous oxide semiconductor channel layer may also be doped with elements such as Gallium, Indium, Zinc, Tin, Hafnium, Silicon, Aluminum, and others to optimize carrier concentration and mobility.

A vertical NAND flash memory device, a method of manufacturing the vertical NAND flash memory device, and an electronic device including the vertical NAND flash memory device are provided. The vertical NAND flash memory device includes a plurality of cell strings, each cell string extending in a direction perpendicular to a substrate. Each of the plurality of cell strings includes a channel layer, a charge trapping layer provided on the channel layer and including an amorphous oxide, at least one insertion layer provided inside the charge trapping layer, and a plurality of gate electrodes provided on the charge trapping layer.

The invention discloses a detector based on an amorphous oxide thin film transistor doped with N and nano-particles. The detector comprises a doped polycrystalline silicon substrate, an active layer and a metal electrode layer which are sequentially stacked, the doped polycrystalline silicon substrate comprises a silicon dioxide layer and heavily doped n-type polycrystalline silicon which are stacked; the silicon dioxide layer clings to the active layer; the active layer comprises at least two layers of N-doped amorphous indium gallium zinc oxide thin films; a metal nano-film is arranged on the side surface, facing the silicon dioxide layer, of the amorphous indium gallium zinc oxide film; the metal nano-film is formed by paving metal nano-particles; the metal electrode layer comprises a first metal electrode and a second metal electrode which are patterned and provided with a gap. According to the photoelectric detector, the double-layer metal nano thin film is constructed on the interface of the insulating layer and in the active layer body, and the two layers of amorphous indium gallium zinc oxide thin films are arranged and N doping is introduced, so that the detection rate is improved, the detection range is expanded, and meanwhile, the working stability of the device is improved.

A piezoelectric device that exhibits good piezoelectric characteristics, while reducing generation of leakage current paths, and a method of manufacturing the same, are provided. The piezoelectric device has a multilayer stack in which a first electrode, a piezoelectric layer, and a second electrode are stacked in this order on a substrate, wherein at least the first electrode is formed of an amorphous oxide conductor.

The application provides a metal oxide thin film transistor and a preparation method thereof. The metal oxide thin film transistor is provided with a channel protection layer and a sacrifice layer in sequence on an active layer. The sacrifice layer is any one or a combination of at least two of amorphous oxide thin film, nitride thin film, oxynitride thin film, fluoride thin film or sulfide thin film. In the preparation method, the active layer, the channel protection layer and the sacrifice layer can be continuously deposited, and one etching patterning can be realized. The method is simple in operation, low in preparation cost, realizes preparation of a short channel device, and has large-scale industrialized application prospect.

The application discloses a preparation method and application of high-performance nickel-platinum catalytic material and a use method, wherein the nickel foam is immersed into a solution containing a certain amount of chloroplatinic acid, and a Ni-Pt composite electrode containing rich NiO on the surface is prepared through a simple one-step chemical corrosion method. The embedded NiO on the surface can effectively reduce a water decomposition energy barrier, the introduction of Pt forms a PtNi alloy with high HER activity with the nickel foam substrate, thereby greatly reducing the amount of Pt and ensuring the adsorption / desorption efficiency of H intermediates, the stable NiO nanoparticles on the surface can effectively avoid the formation of unstable amorphous oxide on the surface of the PtNi alloy, thereby greatly improving the catalytic stability, and finally, the NiO and the PtNi alloy synergistically improve the electrocatalytic efficiency.

A metallic component for high-temperature non-aqueous environments has a body of metallic material and a protective coating applied to an outer surface of the body of metallic material, intended in use to contact a non-aqueous working fluid. The protective coating includes at least one layer of amorphous aluminum oxide, the at least one layer of amorphous aluminum oxide having at least one doping element uniformly dispersed in the layer of amorphous aluminum oxide, the at least one doping element being selected from the group consisting of C, Na, K, Cs, Mg, Ca, Sr, P, Si, Fe, Y, Zr, Mo, W, La, Ce, Er, and Yb.

A metallic component for high temperature non-aqueous environments, comprising a metallic material body and a protective coating applied to an outer surface of the metallic material body, the protective coating being intended for contacting a non-aqueous working fluid wherein the protective coating comprises at least one layer of amorphous alumina, the at least one layer of amorphous alumina comprises at least one doping element uniformly distributed in the amorphous alumina layer, and the at least one doping element is selected from the group consisting of C, Na, K, Cs, Mg, Ca, Sr, P, Si, Fe, Y, Zr, Mo, W, La, Ce, Er and Yb.

The application relates to the technical field of ceramic material preparation, in particular to a high-strength and high-toughness nano-zirconia ceramic material and a preparation method and application thereof. The preparation method of the nano-zirconia ceramic material provided by the application comprises the following steps: taking zirconia powder particles with an amorphous oxide film on the surface as raw materials, and performing forming and sintering treatment. The application firstly proposes to construct a functional gradient film layer on the surface of the zirconia powder particles by using an ALD technology, the obtained film is recrystallized in the subsequent forming and sintering process, oxide grains with nanometer and submicron sizes are formed and distributed in the zirconia grains and the grain boundaries, so that the purposes of strengthening and toughening are achieved; meanwhile, the obtained material has a nano-phase structure, and the biological activity is significantly improved.

This invention provides a low-conductivity amorphous alloy material and its preparation method, belonging to the field of additive manufacturing. The preparation method includes the following steps: pre-oxidizing amorphous alloy powder under an oxidizing atmosphere to form an amorphous oxide layer on the surface of the amorphous alloy powder, thereby obtaining pre-treated amorphous alloy powder; and shaping the pre-treated amorphous alloy powder to obtain a low-conductivity amorphous alloy material. This invention, by pre-oxidizing the amorphous alloy powder and combining it with subsequent shaping processes to introduce an oxide interface layer into the amorphous alloy material, forms a network-like amorphous oxide interface. This not only effectively reduces the conductivity of the amorphous alloy material but also promotes the nucleation of the shear transition zone, avoiding the localization of shear deformation. Furthermore, the strong bonding between metal atoms and oxygen atoms on the amorphous oxide interface makes it difficult for the shear transition zone to expand through the oxide interface, thus promoting the improvement of material strength.

A thin film transistor, a manufacturing method thereof, an array substrate and an electronic device arc provided. The thin film transistor includes an active layer including multiple oxide layers which includes a channel layer, a transition layer and a first barrier layer, the channel layer is an layer with a highest carrier mobility, the channel layer is a crystalline or amorphous oxide layer, the transition layer is in direct contact with the channel layer, the first barrier layer is an outermost oxide layer, the first barrier layer and the transition layer are both crystalline oxide layers; a crystallization degree of the first barrier layer and a crystallization degree of the transition layer are greater than a crystallization degree of the channel layer, and a band gap of the first barrier layer and a band gap of the transition layer are larger than a band gap of the channel layer.

The invention provides a CMOS (Complementary Metal Oxide Semiconductor) circuit based on a fully amorphous oxide transistor and a preparation method, and belongs to the technical field of radio electronics. A bottom gate electrode and an interconnection layer; a gate dielectric layer; an N-type channel layer, wherein the N-type channel layer is an amorphous oxide semiconductor layer; a P-type channel layer, wherein the P-type channel layer is an amorphous doped tellurium oxide; source and drain electrodes and an interconnection layer; wherein the bottom gate electrode, the interconnection layer, the source drain electrode and the interconnection layer are made of metal. According to the invention, the N-type transistor and the P-type transistor both adopt the amorphous oxide, and the advantages of large-area uniformity, low cost and flexibility can be realized by adopting the fully amorphous oxide material.

The present invention belongs to the technical field of semiconductor devices, and discloses a novel semiconductor non-volatile memory, its preparation method and application. The memory includes a substrate, a bottom electrode, an amorphous oxide interface layer, a ferroelectric dielectric layer, and a top electrode which are sequentially arranged from bottom to top. The preparation method includes: (1) substrate cleaning; (2) bottom electrode deposition; (3) forming an amorphous oxide interface layer; (4) ferroelectric dielectric layer deposition, forming a ultrathin ferroelectric dielectric layer with uniform composition and good ferroelectricity on the amorphous MoO3 interface layer; (5) top electrode patterning and deposition; (6) rapid thermal annealing treatment. The above-mentioned memory is applied to a three-dimensional stacked non-volatile memory array or to construct a back-gate ferroelectric transistor structure. The present invention effectively inhibits the formation of non-ferroelectric phases, promotes the preferred orientation arrangement of ferroelectric phases, enhances the polarization intensity, and improves the ferroelectric performance of the device. It has both a low thermal budget, high process compatibility and excellent ferroelectric performance.

The present disclosure generally relates to spin-orbit torque (SOT) device comprising a first bismuth antimony (BiSb) layer having a (001) orientation. The SOT device comprises a first BiSb layer having a (001) orientation and a second BiSb layer having a (012) orientation. The first BiSb layer having a (001) orientation is formed by depositing an amorphous material selected from the group consisting of: B, Al, Si, SiN, Mg, Ti, Sc, V, Cr, Mn, Y, Zr, Nb, AlN, C, Ge, and combinations thereof, on a substrate, exposing the amorphous material to form an amorphous oxide surface on the amorphous material, and depositing the first BiSb layer on the amorphous oxide surface. By utilizing a first BiSb layer having a (001) orientation and a second BiSb having a (012) orientation, the signal through the SOT device is balanced and optimized to match through both the first and second BiSb layers.

The present invention discloses a fast ion conductor active electrode memristor functional layer material and its preparation and application. The fast ion conductor active electrode memristor functional layer material comprises a stacked fast ion conductor layer and an amorphous oxide layer; the ionic conductivity of the fast ion conductor layer is greater than the ionic conductivity of the amorphous oxide layer, the resistivity of the amorphous oxide layer is greater than the resistivity of the fast ion conductor layer, and the amorphous oxide layer contains an ion migration channel; the present application utilizes the higher ionic conductivity of the fast ion conductor to greatly reduce the resistance switching voltage of the active metal electrode memristor, the resistance state can be stably and slowly changed, thereby achieving a modulation effect on the on-off of the metal conductive filament and improving the stability and consistency of the memristor.

A metal composite oxide of the present invention is a metal composite oxide containing iridium, ruthenium, and a third metal (M), in which the third metal (M) is one or more elements selected from the group consisting of Group 2 elements, Group 13 elements, Group 14 elements, and transition metals, and the metal composite oxide is a low crystalline oxide or an amorphous oxide.

The present invention discloses a multi-bit memory based on a homojunction and a method for preparing the same. The multi-bit memory based on a homojunction comprises: a substrate; a bottom electrode formed on the substrate; a functional layer, which is a multilayer amorphous oxide thin film with different oxygen contents, formed on the bottom electrode; and a top electrode formed on the functional layer. When a voltage is applied to the top electrode, each layer of the amorphous oxide thin film sequentially forms an oxygen vacancy conductive channel from top to bottom, achieving step-by-step modulation of the resistance state, allowing a single device to have the function of multi-state storage.

The present invention relates to a transparent heating element and a manufacturing method therefor, the element comprising: a substrate; a first amorphous oxide layer deposited on the substrate; a metal layer deposited on the first amorphous oxide layer; a second amorphous oxide layer deposited on the metal layer; and an electrode layer that encompasses two ends of each of the first amorphous oxide layer, the metal layer and the second amorphous oxide layer from two ends of the substrate. Provided is the transparent heating element in which layers made of amorphous oxides are disposed on the upper and lower surfaces of a metal layer, and the transparent heating element has low power, high performance and moisture resistance characteristics due to the uniform surfaces of the amorphous oxide layers.

A grain-oriented electrical steel sheet of the present invention has a base steel sheet, an amorphous oxide layer formed on the base steel sheet, and a tension-insulation coating formed on the amorphous oxide layer, in which the base steel sheet contains, as a chemical composition, by mass %, C: 0.085% or less, Si: 0.80 to 7.00%, Mn: 1.50% or less, acid-soluble Al: 0.065% or less, S: 0.013% or less, Cu: 0 to 0.80%, N: 0 to 0.012%, P: 0 to 0.50%, Ni: 0 to 1.00%, Sn: 0 to 0.30%, and Sb: 0 to 0.30%, a remainder is Fe and an impurity, a surface glossiness Gs20(A) in a direction parallel to a rolling direction is 2.0 to 70, and a surface glossiness Gs20(B) in a direction perpendicular to the rolling direction is 2.0 to 70.