A method for forming a
semiconductor structure includes: removing an initial
dielectric layer in a second region, forming a first opening in the initial
dielectric layer; filling a limiting
dielectric layer in the first opening, the limiting
dielectric layer having an
etching selectivity ratio between a material of the limiting
dielectric layer and a material of the initial
dielectric layer; removing a remaining initial dielectric layer in a first region by using an
isotropic etching process, forming a second opening, the second opening including an
interconnection groove in the limiting dielectric layer and exposing a source / drain doped region, and a conductive via in an
isolation layer and exposing a power supply rail, the conductive via being located at a bottom of the
interconnection groove and communicating with the
interconnection groove; and filling the conductive via and the interconnection groove, forming a conductive
plug in the conductive via and a source / drain interconnection layer in the interconnection groove, the conductive plug being in contact with the power supply rail and the source / drain interconnection layer, respectively. The embodiment of the present application reduces a
contact resistance between the conductive plug and the power supply rail and a resistance of the conductive plug.