30results about How to "Improve transistor characteristics" patented technology

A thin film transistor is manufactured by forming a gate electrode on a substrate, forming a first insulating film on the gate electrode, forming an oxide semiconductor layer on the first insulating film with an amorphous oxide, patterning the first insulating film, patterning the oxide semiconductor layer, forming a second insulating film on the oxide semiconductor layer in an oxidative-gas-containing atmosphere, patterning the second insulating film to expose a pair of contact regions, forming an electrode layer on the pair of contact regions, and patterning the electrode layer to for a source electrode and a drain electrode.

Aspects of the invention can provide a thin-film transistor having good transistor characteristics and operable with a low driving voltage, a method of producing such a thin-film transistor, a high-reliability electronic circuit, a display, and an electronic device. In an exemplary thin-film transistor according to the invention, a gate electrode can be formed on a substrate via an underlying layer, and a gate insulating layer can be formed on the substrate such that the gate electrode is covered with the gate insulating layer. A source electrode and a drain electrode are formed on the gate insulating layer such that they are separated from each other by a gap formed just above the gate electrode. An organic semiconductor layer can be formed thereon such that the electrodes are covered with the organic semiconductor layer. A region between the electrodes of the organic semiconductor layer functions as a channel region. A protective layer can be arranged on the organic semiconductor layer. This thin-film transistor is characterized in that the organic semiconductor layer is formed after the gate insulating layer is formed, and the gate insulating layer has the capability of causing the organic semiconductor layer to be aligned.

A manufacturing method of a thin film transistor having at least a gate electrode, a gate insulation film, an oxide semiconductor layer, a first insulation film, a source electrode, a drain electrode, and a second insulation film on a substrate, including: forming the gate electrode on the substrate; forming the gate insulation film on the gate electrode; forming a semiconductor layer including amorphous oxide on the gate insulation film; patterning the gate insulation film; patterning the oxide semiconductor layer; reducing the oxide semiconductor layer in resistance by forming the first insulation film on the oxide semiconductor layer in the atmosphere not including an oxidized gas; patterning the first insulation film and forming a contact hole between the source electrode and the drain electrode and the oxide semiconductor layer; forming a source electrode layer and a drain electrode layer in the oxide semiconductor layer through the contact hole; forming the source electrode and the drain electrode through the contact hole and allowing the first insulation film to be exposed; patterning the exposed first insulation film and allowing a channel region of the oxide semiconductor layer to be exposed; and increasing the channel region in resistance by forming the second insulation film on the surface including the channel region of the oxide semiconductor layer in the atmosphere including an oxidized gas.

An amorphous oxide at least includes: at least one element selected from the group consisting of In, Zn, and Sn; and Mo. An atomic composition ratio of Mo to a number of all metallic atoms in the amorphous oxide is 0.1 atom % or higher and 5 atom % or lower.

By performing a laser-based or flash-based anneal process after silicidation, the degree of dopant activation with reduced diffusion activity may be accomplished, while the characteristics of the metal silicide may be improved or the complexity for manufacturing the same may be reduced.

A semiconductor device manufacturing method includes the steps of: (a) forming a stopper layer for chemical mechanical polishing on a surface of a semiconductor substrate; (b) forming an element isolation trench in the stopper layer and the semiconductor substrate; (c) depositing a nitride film covering an inner surface of the trench; (d) depositing a first oxide film through high density plasma CVD, the first oxide film burying at least a lower portion of the trench deposited with the nitride film; (e) washing out the first oxide film on a side wall of the trench by dilute hydrofluoric acid; (f) depositing a second oxide film by high density plasma CVD, the second oxide film burying the trench after the washing-out; and (g) removing the oxide films on the stopper layer by chemical mechanical polishing.

A back-channel-etch type TFT includes a gate electrode, an SiN film that is formed on the gate electrode, and an SiO film that is formed and patterned on the SiN film. The TFT further includes an polycrystalline semiconductor film that is formed and patterned on the SiO film in contact with the SiO film in such a way that all pattern ends of the polycrystalline semiconductor film are located in close proximity to pattern ends of the SiO film.

A thin-film transistor includes a source electrode, a drain electrode arranged apart from the source electrode, an organic semiconductor layer arranged between the source electrode and the drain electrode so as to establish connection of the source electrode and the drain electrode, a first insulating layer arranged on one surface side of the organic semiconductor layer, a gate electrode arranged on a side of the first insulating layer opposite that on which the organic semiconductor layer lie, and a second insulating layer arranged on a side of the organic semiconductor layer opposite that on which the first insulating layer lie. The organic semiconductor layer contains an organic semiconductor material having p-type semiconducting properties. The second insulating layer contains one or more compounds of the following formula (1), so that electrons are fed from the second insulating layer into the organic semiconductor layer:

wherein R¹ and R² independently represent a substituted or unsubstituted alkylene group; X¹, X², X³ and X⁴ each represent a hydrogen atom or an electron-donating group; and n represents 100 to 100,000, wherein at least one of X¹, X², X³ and X⁴ represents an electron-donating group.

A semiconductor device includes: a silicon substrate with semiconductor elements; an isolation trench formed in the silicon substrate for isolating active regions in the silicon substrate, the isolation trench having a trapezoidal cross sectional shape having a width gradually narrowing with a depth from the surface of the silicon substrate; a first liner insulating film formed on the surface of the trench and made of a silicon oxide film or a silicon oxynitride film having a thickness of 1 to 5 nm; a second liner insulating film formed on the first liner insulating film and made of a silicon nitride film having a thickness of 2 to 8 nm; and an isolation region burying the trench defined by the second liner insulating film.

A semiconductor device of the technology includes a first diffusion section (22), a second diffusion section (21), a channel section (23), a gate section (24), and a stress application section (31, 32, or 33). In a semiconductor layer (10) having a groove (10A), the first diffusion section (22) is formed at or in the vicinity of a bottom of the groove (10A), the second diffusion section (21) is formed at an upper end of the groove (10A), and the channel section (23) is formed between the first diffusion section (22) and the second diffusion section (21). The gate section (24) is buried in the groove (10A) at a position opposing the channel section (23). The stress application section (31, 32, or 33) applies one of compressive stress and tensile stress to the channel section (23) in a normal direction to the semiconductor layer (10).

An active matrix substrate including, in each pixel area, a transistor, a pixel electrode (17), a conductive member (18) functioning as one of electrodes of a storage capacitor, a drain lead-out (7) electrode connected to a drain electrode of the transistor, and overlapping with the conductive member (18), and a contact hole for connecting the drain lead-out electrode (7) to the pixel electrode (17), includes a gate insulating film (40) covering a gate electrode of each transistor, the gate insulating film including a first thickness portion (41) overlapping with at least part of the contact hole, and a second thickness portion (42) formed adjacent to the first thickness portion, and overlapping with the drain lead-out electrode, the first thickness portion (41) having a greater thickness than the second thickness portion (42). This makes it possible to provide the active matrix substrate in which a short-circuit between the conductive member functioning as one of the electrodes of the storage capacitor, and the drain lead-out electrode (or the pixel electrode) is successfully prevented.

The present invention relates to a compound semiconductor device and a method of manufacturing the same, wherein on a surface of a compound semiconductor layer including inner wall surfaces of an electrode trench, an etching residue 12a and an altered substance 12b which are produced due to dry etching for forming the electrode trench are removed, and a compound semiconductor is terminated with fluorine. Gate metal is buried in the electrode trench via a gate insulating film, or the gate metal is directly buried in the electrode trench, whereby a gate electrode is formed.

The invention relates to an organic thin film transistor using a paper substrate and a silk dielectric layer and a manufacturing method thereof. Wherein, the organic thin film transistor device includes: a paper substrate; a gate, which is arranged on the paper substrate; a gate dielectric layer, which is arranged on the paper substrate and covers the gate, wherein the material of the gate dielectric layer is It includes a fibroin; an organic semiconductor layer; and a source and a drain, wherein the organic semiconductor layer, the source and the drain are arranged on the gate dielectric layer.

A semiconductor device with p-channel MOS transistor having: a gate insulating film of nitrogen-containing silicon oxide; a gate electrode of boron-containing silicon; side wall spacers on side walls of the gate electrode, comprising silicon oxide; an interlayer insulating film having a planarized surface; a wiring trench and a contact via hole formed in the interlayer insulating film; a copper wiring pattern including an underlying barrier layer and an upper level copper region, and filled in the wiring trench; and a silicon carbide layer covering the copper wiring pattern. A semiconductor device has the transistor structure capable of suppressing NBTI deterioration.

An electrochemically-gated field-effect transistor includes a source electrode, a drain electrode, a gate electrode, a transistor channel and an electrolyte. The transistor channel is located between the source electrode and the drain electrode. The electrolyte completely covers the transistor channel and has a one-dimensional nanostructure and a solid polymer-based electrolyte that is employed as the electrolyte.