10results about How to "Excellent electrical properties" patented technology

A flexible circuit board includes a substrate, a plurality of circuit patterns disposed on the substrate, and a protective layer disposed on the circuit patterns, wherein each of the plurality of circuit patterns has a thickness greater than 8 µm and less than or equal to 25 µm, and wherein a thickness deviation between the plurality of circuit patterns is 0.5 µm to 3 µm. When the flexible circuit board is connected with a display panel, the display panel can have high performance and high current can flow through the display panel. The circuit pattern having the features according to the present invention is prevented from being damaged by high current.

A semiconductor device and a method for manufacturing the same are disclosed. According to an embodiment, the semiconductor device may include: an SOI substrate; a channel portion on the SOI substrate, the channel portion including a two-dimensional semiconductor material layer; a gate stack on the channel portion; and source / drain portions on the SOI substrate, located on opposite sides of the gate stack and disposed at opposite ends of the channel portion, wherein the two-dimensional semiconductor material layer is on the bottom surface and side surface of the gate stack, and extends on the side surface of the source / drain portion thereby being located between the side surface of the source / drain portion and the side surface of the gate stack.

An example of a semiconductor device includes a substrate; a channel layer on the substrate; a first barrier layer on the channel layer; a second barrier layer on the first barrier layer; a third barrier layer on the second barrier layer and extending into a portion of the first barrier layer and a portion of the second barrier layer; a gate electrode on the third barrier layer; and a source electrode and a drain electrode on either side of the gate electrode, wherein each of the source electrode and the drain electrode extends into a first portion of the third barrier layer and is connected to the second barrier layer, and wherein the second barrier layer is doped with silicon.

The present application relates to a kind of new near hemispherical probe and its preparation method, the near hemispherical probe can retain the excellent electrical characteristics of three-dimensional spherical structure, the area of collection electrode is small under the same electrode spacing, and the capacitance is low, and charge collection efficiency is almost independent of θ.Hemispherical electrode has good sealing, completely isolates detection sensitive area from substrate, dark current is not affected by wafer thickness, and extremely low noise is conducive to low-energy X-ray or low-energy particle detection.

This invention discloses a method for element doping of a thin-film solar cell and its absorber layer, relating to the field of thin-film solar cell technology. By immersing the activated absorber layer in a salt solution of a predetermined dopant element and simultaneously applying an exogenous inducing variable, the predetermined element is doped. During the doping process, the diffusion of dopant ions into the grain boundaries and lattice interior of the absorber layer is promoted, ensuring that the element is not affected by the surface morphology, hydrophilicity / hydrophobicity, internal or edge structure of the absorber layer. This solves the problems of difficult-to-control element doping uniformity, poor process stability, and low effective doping activation rate in existing technologies. It achieves the goal of diffusive doping of p-type elements in the absorber layer with high doping uniformity, high doping activation rate, controllable doping process, and compatibility with existing processes.

The present application relates to a growth inhibitor for film formation, a film formation method using the same, and a semiconductor substrate manufactured thereby. Specifically, it relates to a growth inhibitor for film formation which is a compound represented by Chemical Formula 1, a film formation method using the same, and a semiconductor substrate manufactured thereby, [Chemical Formula 1] AnB m X o Y i Z j wherein A is carbon or silicon; B is hydrogen or an alkyl group having 1 to 3 carbon atoms; X is one or more selected from fluorine, chlorine, bromine, and iodine; Y and Z are each independently one or more selected from oxygen, nitrogen, sulfur, and fluorine, and are different from each other; n is an integer of 1 to 15; o is an integer of 1 or more; m is 0 to 2n+1; i and j are each an integer of 0 to 3. The present application can suppress side reactions, reduce film growth rate, and remove process by-products in the film, thereby greatly improving step coverage and thickness uniformity of the film even when forming a film on a substrate having a complex structure.

Disclosed are a semiconductor device and a manufacturing method thereof. According to an embodiment, the semiconductor device can include a substrate, a buried oxide layer, a channel portion including a semiconductor layer, a source / drain portion, and a gate stack. The semiconductor layer includes a shell portion and a core portion spaced apart from each other and distributed in a projection direction overlapping each other, the shell portion being on the core portion, the shell portion and the core portion being respectively one of p-type doped and n-type doped.

This invention relates to a dynamic random access memory (DRAM) that integrates vertical-channel thin-film transistors (TFTs) and capacitors. The low leakage current of TFTs improves the data retention time of the DRAM, while the vertical channel achieves 4F... 2 The invention also relates to a method for fabricating the aforementioned dynamic random access memory (DRAM).