22 results about "Czochralski process" patented technology

The invention discloses a method, a device, equipment and a medium for controlling a Czochralski process, and belongs to the field of Czochralski. Observation variables in the single crystal straight pulling process are obtained and comprise the bright ring outer ring radius, the melt mass and the liquid opening distance. Then, based on a state space model, according to the observation variables, the internal state of the single crystal straight pulling process is estimated, and estimation variables including the estimated crystal radius and the estimated meniscus height are obtained; and then taking the estimated variable as an initial state, determining a predicted change track of an internal state based on a state space model, and generating and executing a control instruction based on the predicted change track by taking a target crystal radius and a target meniscus height as control targets. According to the scheme, through multi-variable collaborative estimation and predictive optimization, the problems that variables are strongly coupled, the internal state cannot be directly measured, control lags and the like in the czochralski single crystal growth process are solved, technical support is provided for preparing high-quality large-size single crystal silicon, and the crystal diameter control precision is improved.

A method for manufacturing a silicon epitaxial wafer comprising a phosphorus-doped silicon wafer and an epitaxial layer provided on a surface of the silicon wafer, wherein the method comprises: forming (S2) an oxide layer on a back side of the silicon wafer cut (S1) from a single-crystal ingot produced by a Czochralski process; removing (S3) the oxide layer present on an outer circumference of the silicon wafer; argon annealing (S4), wherein the silicon wafer is subjected to heat treatment in an argon gas atmosphere after removal of the oxide layer; and forming the epitaxial layer on the surface of the silicon wafer after argon annealing, wherein the formation of the epitaxial layer comprises: pre-baking (S5), wherein the silicon wafer is subjected to heat treatment in a gas atmosphere comprising hydrogen and hydrogen chloride to etch an outer layer of the silicon wafer;and growth (S6) of the epitaxial layer on the surface of the silicon wafer after pre-baking, wherein during argon annealing (S4) clusters of phosphorus and oxygen present on an outer layer of the silicon wafer are dissolved in a solid solution, and during pre-baking (S5) a thickness of the outer layer of the silicon wafer removed by etching is made smaller than a thickness of the outer layer where the clusters are dissolved in the solid solution during argon annealing.;

A manufacturing process for single-crystal silicon according to a Czochralski process using a single-crystal growing apparatus, the apparatus comprising: a chamber; a crucible located in the chamber; a heater configured to heat the crucible and thus produce a dopant melt comprising a silicon melt and red phosphorus or arsenic in high concentrations as a dopant added to the silicon melt, the heater comprising an upper heating device configured to heat an upper side face of the crucible and a lower heating device configured to heat a lower side face of the crucible; and a growing unit configured to grow a seed crystal after the seed crystal has been brought into contact with the dopant melt.wherein the process comprises: forming a shoulder of single-crystal silicon; and forming a straight body with a target diameter of 200 mm or more, wherein the manufacturing conditions are adjusted such that the resistivity, when using arsenic as a dopant, ranges from 1.5 mΩ·cm to 3.5 mΩ·cm and when using red phosphorus as a dopant, ranges from 0.6 mΩ·cm to 1.2 mΩ·cm, and during shoulder formation, while a heating ratio calculated as the division of a quantity of heat from the lower heating device by a quantity of heat from the upper heating device is maintained at 1, the crucible is rotated at a speed maintained at 16 rpm or more and 30 rpm or less from the beginning of shoulder formation until a diameter of the shoulder being formed reaches half the target diameter of the straight body or more.and the rotational speed of the crucible is reduced at this time or thereafter.

The invention relates to the field of semiconductor equipment, in particular to a method for improving oxygen content uniformity in a pulling process and a pulling single crystal furnace. The invention provides a method for improving oxygen content uniformity in a pulling process, which comprises the following steps of: establishing a three-dimensional electromagnetic field model of a main magnet system formed by two main coils, and simulating the distribution condition of an electromagnetic field in a melt area; the configuration of the two main coils is optimized; the space relative position of the two main coils is optimized; and electrical parameters and windings of the two main coils are optimized. According to the technical scheme, the geometric configuration and the spatial arrangement of the main magnetic field coil are systematically optimized, and the distribution uniformity of the magnetic field in the plane of the target area, especially the melt area, is improved, so that the radial uniformity of the oxygen content of the crystal is effectively improved.

The application discloses a kind of single crystal silicon rod Czochralski process silicon material absolute liquid distance measurement method.The measurement method is to the image about draft tube, silicon material liquid level and draft tube in the reflection of silicon material liquid level draft tube arc and silicon material liquid level arc Two-dimensional feature detection, according to the two-dimensional feature of the draft tube arc and the silicon material liquid level arc Three-dimensional coordinates of the draft tube arc and the silicon material liquid level arc are determined, the three-dimensional coordinates of the draft tube arc and the silicon material liquid level arc are fitted out draft tube lower along space circle and draft tube lower along reflection space circle using space circle fitting algorithm, the distance between the draft tube lower along space circle and the draft tube lower along reflection space circle is determined to the absolute liquid distance of the silicon material.The beneficial effects of the present application: compared with the monocular measurement method that pixel distance from draft tube to its reflection is generally used at present and the proportionality coefficient and offset required for conversion of pixel physical value are combined to determine the lifting pot, the present application directly gives the physical quantity of liquid distance change.

The invention relates to antimony-doped czochralski silicon for solar power generation. The concentration of antimony contained in the antimony-doped czochralski silicon is 1 * 10 < 13 >-1 * 10 < 17 > / cm < 3 >. The antimony-doped monocrystalline silicon can also contain 1 * 10 < 10 >-1 * 10 < 17 > / cm < 3 > of phosphorus or arsenic or gallium, and is prepared by the following steps: calculating the weight of the doped antimony according to the concentration, putting the antimony and a silicon material into a quartz crucible together, and normally drawing a single crystal according to the process steps of czochralski monocrystalline silicon under the environment of low furnace pressure and argon protection to obtain a crystal bar which is the antimony-doped monocrystalline silicon for solar energy, if the process is an RCZ or CCZ Czochralski process, the calculated antimony and silicon materials can be added into a quartz crucible together in a multi-time feeding or continuous feeding mode. The antimony-doped czochralski silicon has the advantages that the antimony-doped czochralski silicon for solar power generation is provided, and the conversion efficiency and the yield of an N-type monocrystalline silicon battery can be improved.

Method for producing a semiconductor silicon wafer, which is composed of a silicon wafer substrate and a monocrystalline epitaxial silicon layer on it, comprising: a step (S2) of forming a silicon oxide layer with a thickness of at least 300 nm or thicker only on the back side of the silicon wafer substrate by the CVD process at a temperature of not more than 500 °C, wherein the silicon wafer substrate is produced from a monocrystalline silicon ingot grown by the Czochralski process, is doped with phosphorus, has a resistivity set to not more than 1.05 mΩ·cm, and a solid solution oxygen concentration of not more than 0.9×10 18 atoms / cm² 3 exhibits and on whose front surface a monocrystalline epitaxial silicon layer is to be formed; a heat treatment step (S4) after the step of forming the silicon oxide layer, in which the substrate is held in an oxidizing atmosphere at a constant temperature of at least 1100 °C and at most 1250 °C for at least 30 minutes and at most 120 minutes; a step (S5) of removing the surface oxide layer, which is formed as a thermal oxide layer on the front surface of the substrate during the heat treatment step, after the heat treatment step; and a step of depositing a monocrystalline epitaxial silicon layer on the substrate after the step of removing the surface oxide layer.

Disclosed in the present disclosure are a manufacturing method for a monocrystalline silicon ingot, and a monocrystalline silicon ingot. The manufacturing method may comprise: selecting a preset position of a target monocrystalline silicon ingot, wherein a first distance from the preset position to the head portion of the monocrystalline silicon ingot is n times a machining length of a wire cutting machine, and a second distance from the preset position to the tail portion of the monocrystalline silicon ingot is m times the machining length of the wire cutting machine, n and m being positive integers; determining a target resistivity at the preset position, calculating a doping amount of a dopant for a silicon melt on the basis of the target resistivity, adding the dopant to the silicon melt on the basis of the calculated doping amount of the dopant, and pulling a target monocrystalline silicon ingot by using the Czochralski process; and cutting the target monocrystalline silicon ingot at the preset position, the silicon ingot segment between the head portion of the target monocrystalline silicon ingot and the preset position being used for preparing a first battery product, and the silicon ingot segment between the preset position and the tail portion of the target monocrystalline silicon ingot being used for preparing a second battery product. The present solution can effectively improve the yield of manufactured monocrystalline silicon ingots, and prevent the problem of waste when monocrystalline silicon ingots are cut.

A method of polishing a silicon wafer, including a final polishing step including a pre-stage polishing step and a subsequent finish polishing step. The finish polishing step in the final polishing step includes a finish slurry polishing step using a polishing solution having an abrasive grain density of 1×1013 / cm3 or more as the second polishing solution; and a pre-polishing step using a polishing solution having an abrasive grain density of 1×1010 / cm3 or less as the second polishing solution, the pre-polishing step being performed prior to the finish slurry polishing step. A method of producing a silicon wafer, including the steps of: forming a notch portion on a periphery of a single crystal silicon ingot grown by the Czochralski process; slicing the ingot to obtain a silicon wafer; and subjecting the resulting silicon wafer to the above method of polishing a silicon wafer.

The disclosed method for controlling the solid / liquid interface of a melt in indium purification by numerical simulation optimization belongs to the technical field of high-purity metal material preparation, and is based on multi-physical field numerical simulation to obtain a process control scheme for a stable solid / liquid interface of a melt by establishing a mapping relationship between an external magnetic field and process parameters-interface data-impurity concentration. The method comprises the following steps: obtaining original data of a Czochralski furnace and indium physical properties, calculating a geometric model and grid partitioning, and establishing a mathematical model; based on experimental historical data, setting boundary conditions, simulating the seeding, shoulder growth and key processes of constant diameter in the Czochralski process of indium purification; coupling multi-physical fields to analyze the change of the solid / liquid interface of the melt in the Czochralski process; based on the numerical simulation results, constructing a deep reinforcement learning model, establishing a mapping relationship among process parameters, interface data and impurity concentration, realizing a process "prediction-verification-optimization" closed loop iteration, and obtaining process parameters for the stable preparation of 8N high-purity indium.

Method for producing a semiconductor silicon wafer, which is composed of a silicon wafer substrate and a monocrystalline silicon epitaxial layer on it, comprising: a step (S4) of forming a silicon oxide layer with a thickness of at least 300 nm and at most 700 nm on the back side of the silicon wafer substrate, wherein the silicon wafer substrate is produced from a silicon ingot grown by the Czochralski process, is doped with phosphorus, has a resistivity adjusted to at most 1.05 mΩ·cm and contains defects which are essentially Si-P crystal defects formed by the aggregation of phosphorus in the crystal; a step (S5) of high-gloss polishing of a silicon wafer substrate; a step (S8) of the heat treatment to hold the silicon wafer substrate mounted on a substrate holder at a constant temperature of at least 700 °C and at most 850 °C for at least 30 minutes and at most 120 minutes at a process gas flow velocity of at least 0.1 m / s and at most 1.0 m / s at a distance of within 5 mm from the silicon wafer substrate and then, after increasing the temperature, at a constant temperature of at least 1100 °C and at most 1250 °C for at least 30 minutes and at most 120 minutes, maintaining the process gas flow velocity, wherein the substrate holder, which is made of silicon or silicon carbide, has a silicon oxide layer (4a1) on the surface with a thickness of at least 200 nm and at most 500 nm and satisfies a relation equation Y = C - X, where X denotes the thickness of the silicon oxide layer (4a1) of the substrate holder and Y denotes the thickness of the silicon oxide layer (4a1) formed on the back of the silicon wafer substrate, and C denotes a constant with a value of 800 to 1000; a step (S11) of removing the silicon oxide layer (4a1) on the back side of the silicon wafer substrate by circumferential machining to a distance of 0.1 mm to 1.0 mm from the circumferential periphery of the silicon wafer substrate after heat treatment; and a step (S13) of depositing a monocrystalline silicon epitaxy layer with a thickness of at least 1.3 µm and at most 10.0 µm.

There is provided a growing method of monocrystalline silicon including: pulling up monocrystalline silicon from a dopant-added melt in which a dopant is added to a silicon melt and growing the monocrystalline silicon according to Czochralski process, in which the monocrystalline silicon is grown by calculating a critical CV value, which is a product of a dopant concentration C and a pull-up speed V at a point of time when an abnormal growth occurred in the monocrystalline silicon; and controlling at least one of the dopant concentration C or the pull-up speed V to make a CV value, which is a product of the dopant concentration C and the pull-up speed V at the point of time, below the critical CV value.

The invention belongs to the technical field of beryllium material preparation, and particularly relates to a method for preparing a high-purity beryllium rod through a czochralski method. Comprising the following steps that 2N beryllium serves as a raw material, pretreated 2N beryllium is heated and smelted to be molten to form a melt, and the melt is kept in a stable convection state; when slag is generated in the melt, beryllium seed crystals are inserted into the melt, the temperature is reduced to 1000-1300 DEG C so that the slag can be solidified on the beryllium seed crystals to form slag blocks, then the slag blocks are taken out and serve as repetitive units till no slag block exists in the melt, and beryllium melt is obtained; and inserting the new beryllium seed crystal into the beryllium melt, enabling the beryllium melt to grow along the crystal orientation of the seed crystal by adopting a czochralski process, and cooling to room temperature to obtain the high-purity beryllium rod. The large-size high-purity beryllium rod with the purity reaching 99.9% or above is prepared through the czochralski method technology, the excellent physical performance and the high material utilization rate are achieved, the size can be accurately adjusted and controlled, large-scale production is achieved, and the method is suitable for the high-end industrial field.

Quartz glass crucible (1, 2) used for growing a silicon single crystal by a Czochralski method, comprising: a cylindrical crucible body (10) having a base and made of quartz glass; and a coating film (13A) containing a first crystallization accelerator, which is formed on an inner surface (10a) of the crucible body (10) to bring about the formation of an inner crystal layer (14A) consisting of an aggregate of dome-shaped or columnar crystal grains on a surface layer section of the inner surface (10a) of the crucible body (10) by heating during a step of the pulling up of the silicon single crystal, wherein the coating film (13A) containing the first crystallization accelerator is not heated after application and before pulling up, the coating film (13A) is formed by applying a barium-containing coating solution to the inner surface (10a) of the crucible body (10), The coating solution contains a water-insoluble barium compound and a water-soluble polymer as a thickening agent, and a concentration of barium applied to the inner surface (10a), 3.9×10 16 atoms / cm² 2 up to 1.6×10 17 atoms / cm² 2 amounts.

A method for producing a silicon epitaxial wafer (10) in which a silicon epitaxial layer (12) is formed on a surface of a boron-doped silicon substrate (11), the method comprising: Pulling a single-crystalline silicon ingot coated with a boron concentration of 2.7 10 17 atoms / cm 3 or more and 1.3·10 19 atoms / cm 3 or less doped, using a Czochralski process; Producing a silicon substrate (11) by processing the single-crystal silicon ingot; and Forming a silicon epitaxial layer (12) on a surface of the silicon substrate (11), wherein pulling the single-crystal silicon ingot comprises controlling the single-crystal pulling conditions of the single-crystal silicon ingot such that the boron concentration Y (atoms / cm 3 ) and the initial oxygen concentration X (·10 17 atoms / cm 3) a relationship expression of X ≤ -4.3·10 -19 Y+16.3 fulfill, wherein pulling the single-crystal silicon ingot further comprises decreasing the initial oxygen concentration X in the ingot pulling direction as pulling of the single-crystal silicon ingot proceeds in accordance with the boron concentration Y becoming larger in the ingot pulling direction by controlling the single-crystal pulling conditions of the single-crystal silicon ingot.

Embodiments of the present application provide a wire break control method, device, equipment and medium. The method comprises: in the present Czochralski process, acquiring characteristic data, wherein the characteristic data comprises control data and monitoring data, inputting the characteristic data into a wire break prediction model, wherein the wire break prediction model is trained by characteristic data samples and sample wire break results of the shoulder stage corresponding to the labels; wherein the sample wire break results comprise wire break and no wire break, generating a predicted wire break rate of the shoulder stage from the wire break prediction model according to the characteristic data, and adjusting process parameters in the case that the predicted wire break rate reaches a preset threshold, so as to control no wire break in the shoulder stage, so that the wire break rate of the shoulder stage can be accurately predicted in advance, and the process parameters are adjusted in time accordingly, avoiding the problems of inaccurate and untimely wire break judgment, and reducing the occurrence rate of wire break.

Single silicon crystals having a resistivity of ≤20 mΩcm are pulled by the Czochralski process from a melt, by a method of pulling a first section of a neck at a first velocity whereby the diameter of a first section of the neck, with respect to the diameter of a seed crystal, tapers at a rate of ≤0.3 mm per mm neck length to a diameter of not more than 5 mm;pulling a second section of the neck at a pulling velocity of <0.2 mm / min for not less than 3 min, without the diameter increasing to more than 5.5 mm; andpulling a third section of the neck at a third pulling velocity of >2 mm / min.

A method for producing an n-type silicon single crystal (10), comprising pulling up a silicon single crystal (10) from a silicon melt (9) in a crucible (3A) containing red phosphorus as the main dopant and growing the silicon single crystal (10) using the Czochralski process, the method comprising: controlling the specific electrical resistance at a starting position of the straight body part of the silicon single crystal (10) to 0.80 mΩcm or more and 1.05 mΩcm or less; and sequentially reducing the specific electrical resistance of the silicon single crystal (10) as the silicon single crystal (10) is pulled up and grown, to thereby regulate the specific electrical resistance of a part of the silicon single crystal (10) to 0.5 mΩcm or more and 0.7 mΩcm or less, wherein the inner diameter of the crucible (3A) is 1.7 times or more and 2.3 times or less than the diameter of the straight body of the silicon single crystal (10) during pulling up.

A method of growing monocrystalline silicon through a Czochralski process uses a monocrystalline silicon growth device, the device including: a chamber; a crucible; a heater configured to heat a silicon melt contained in the crucible, in which the heater includes: an upper heater configured to heat an upper portion of the crucible; and a lower heater configured to heat a lower portion of the crucible; and a pull-up unit configured to pull up a seed crystal after bringing the seed crystal into contact with the silicon melt. The method includes: adding a volatile dopant to the silicon melt; and subsequently to the step, pulling up the monocrystalline silicon. In the step, the crucible is heated in a manner that no solidified layer is formed on a liquid surface of the silicon melt and heat generation amounts Qd, Qu of the lower heater and the upper heater satisfy Qd>Qu.

A monocrystalline silicon includes a shoulder, a straight body, and a tail. The straight body includes: a first straight body having a first diameter d1; and a second straight body provided closer to the shoulder than the first straight body is and having a second diameter d2 larger than the first diameter d1 by from 3.5% to 15%. Firstly, a resistivity at a start point of the straight body connected to the shoulder is set to a first resistivity. Subsequently, the monocrystalline silicon is pulled up and grown to form the first straight body, and a resistivity at a start point of the first straight body is set to a second resistivity lower than the first resistivity.

A method for forming a power semiconductor device, the method comprising: Providing a semiconductor wafer (101) with a phosphorus doping concentration of less than 10 15 / cm 3 , which has grown through a Czochralski process and has a first page (101a); Forming an n-type substrate doping layer (105) with phosphorus as the dopant in the semiconductor wafer (101) at the first side (101a), wherein the substrate doping layer (105) has a doping concentration of at least 10 17 / cm 3 , typically of at least 10 18 / cm 3 exhibits; Forming an epitaxial layer (110) on the first side (101a) of the semiconductor wafer (101) after forming the substrate doping layer (105) Images of a dopant layer (115) in the epitaxial layer (110) during growth of the epitaxial layer (110) by diffusion of dopants from the substrate dopant layer (105) into the epitaxial layer (110); and Forming a power semiconductor device (100) with the doping layer (115) as a functional layer of the power semiconductor device (100).

The application belongs to the technical field of beryllium material preparation, and particularly relates to a method for preparing high-purity beryllium rods by a Czochralski method. The method comprises the following steps: taking 2N beryllium as raw material, heating and smelting the pretreated 2N beryllium to form a melt, and keeping the melt in a stable convection state; when slag is generated in the melt, inserting a beryllium seed crystal into the melt, reducing the temperature to 1000-1300 DEG C to make the slag solidify on the beryllium seed crystal to form a slag block, then taking out the slag block, and taking the slag block as a repeating unit until there is no slag block in the melt, and obtaining a beryllium melt; inserting a new beryllium seed crystal into the beryllium melt, and making the beryllium melt grow along the crystal direction of the seed crystal by a Czochralski process, and obtaining high-purity beryllium rods after cooling to room temperature. The method adopts the Czochralski process to prepare large-size high-purity beryllium rods with a purity of more than 99.9%, has excellent physical properties and high material utilization, can accurately control the size and realize large-scale production, and is suitable for high-end industrial fields.