1356 results about "Crystalline materials" patented technology

Structures including crystalline material disposed in openings defined in a non-crystalline mask layer disposed over a substrate. A photovoltaic cell may be disposed above the crystalline material.

PCT No. PCT/GB97/00817 Sec. 371 Date Apr. 13, 1998 Sec. 102(e) Date Apr. 13, 1998 PCT Filed Mar. 24, 1997 PCT Pub. No. WO97/36198 PCT Pub. Date Oct. 2, 1997An optical diffraction grating is formed from a region of photonic crystalline material Light is coupled into the photonic crystalline material, and the grazingly emergent output beam is collected. The photonic crystalline material may include an array of holes formed in a substrate of dielectric material, e.g., InP, and integrated with planar waveguide structures.

Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.

A surface of the first semiconductor crystalline material has a reduced roughness. A semiconductor device includes a low defect, strained second semiconductor crystalline material over the surface of the first crystalline material. A surface of the strained second semiconductor crystalline material has a reduced roughness. One example includes obtaining a surface with reduced roughness by creating process parameters that reduce impurities at an interfacial boundary between the first and second semiconductor crystalline materials. In one embodiment, the first semiconductor crystalline material can be confined by an opening in an insulator having an aspect ratio sufficient to trap defects using Aspect Ratio Trapping techniques.

Growth of multilayer films is carried out in a manner which allows close control of the strain in the grown layers and complete release of the grown films to allow mounting of the released multilayer structures on selected substrates. A layer of material, such as silicon-germanium, is grown onto a template layer, such as silicon, of a substrate having a sacrificial layer on which the template layer is formed. The grown layer has a lattice mismatch with the template layer so that it is strained as deposited. A top layer of crystalline material, such as silicon, is grown on the alloy layer to form a multilayer structure with the grown layer and the template layer. The sacrificial layer is preferentially etched away to release the multilayer structure from the sacrificial layer, relaxing the grown layer and straining the crystalline layers interfaced with it.

A device includes a crystalline material within an area confined by an insulator. In one embodiment, the area confined by the insulator is an opening in the insulator having an aspect ratio sufficient to trap defects using an ART technique. Method and apparatus embodiments of the invention can reduce edge effects in semiconductor devices. Embodiments of the invention can provide a planar surface over a buffer layer between a plurality of uncoalesced ART structures.

A device includes a crystalline material within an area confined by an insulator. A surface of the crystalline material has a reduced roughness. One example includes obtaining a surface with reduced roughness by using a planarization process configured with a selectivity of the crystalline material to the insulator greater than one. In a preferred embodiment, the planarization process uses a composition including abrasive spherical silica, H₂O₂ and water. In a preferred embodiment, the area confined by the insulator is an opening in the insulator having an aspect ratio sufficient to trap defects using an ART technique.

A semiconductor device includes a fin and a layer formed on at least a portion of the fin. The fin includes a first crystalline material. The layer includes a second crystalline material, where the first crystalline material has a larger lattice constant than the second crystalline material to induce tensile strain within the layer.

There is provided a process for converting methanol and/or dimethyl ether to a product containing C2 to C4 olefins which comprises the step of contacting a feed which contains methanol and/or dimethyl ether with a catalyst comprising a porous crystalline material, said contacting step being conducted in the presence of an aromatic compound under conversion conditions including a temperature of 350 DEG C. to 480 DEG C. and a methanol partial pressure in excess of 10 psia (70 kPa), said porous crystalline material having a pore size greater than the critical diameter of the aromatic compound and the aromatic compound being capable of alkylation by the methanol and/or dimethyl ether under said conversion conditions.

There is provided a catalyst and a process for converting methanol or dimethyl ether to a product containing C2 to C4 olefins. The catalyst comprises a porous crystalline material having a Diffusion Parameter for 2,2-dimethylbutane of about 0.1-20 sec-1 when measured at a temperature of 120 DEG C. and a 2,2-dimethylbutane pressure of 60 torr (8 kPa). In addition, the catalyst is characterized by a hydrothermal stability such that, after steaming the catalyst at 1025 DEG C. for 45 minutes in 1 atmosphere steam, the catalyst exhibits a methanol conversion activity of at least 50% when contacted with methanol at a methanol partial pressure of 1 atmosphere, a temperature of 430 DEG C. and 0.5 WHSV. The porous crystalline material is preferably a medium-pore zeolite, particularly ZSM-5, which contains phosphorus and has been severely steamed at a temperature of at least 950 DEG C.

The present invention provides aluminum oxide crystalline materials including dopants and oxygen vacancy defects and methods of making such crystalline materials. The crystalline materials of the present invention have particular utility in optical data storage applications.

A device includes an epitaxially grown crystalline material within an area confined by an insulator. A surface of the crystalline material has a reduced roughness. One example includes obtaining a surface with reduced roughness by creating process parameters which result in the dominant growth component of the crystal to be supplied laterally from side walls of the insulator. In a preferred embodiment, the area confined by the insulator is an opening in the insulator having an aspect ratio sufficient to trap defects using an ART technique.

A method of fabrication and device with holes for electrical conduction made by preparing a photosensitive glass substrate comprising at least silica, lithium oxide, aluminum oxide, and cerium oxide, masking a design layout comprising one or more holes to form one or more electrical conduction paths on the photosensitive glass substrate, exposing at least one portion of the photosensitive glass substrate to an activating energy source, exposing the photosensitive glass substrate to a heating phase of at least ten minutes above its glass transition temperature, cooling the photosensitive glass substrate to transform at least part of the exposed glass to a crystalline material to form a glass-crystalline substrate and etching the glass-crystalline substrate with an etchant solution to form the one or more depressions or through holes for electrical conduction in the device.

In a perpendicular magnetic recording medium having, over a substrate, a magnetic recording layer, an underlayer made of Ru or a Ru compound and provided below the magnetic recording layer, a pre-underlayer made of a nonmagnetic crystalline material, and a soft magnetic layer provided below the pre-underlayer, when the difference between the highest point and the lowest point of unevenness of the interface between the soft magnetic layer and the pre-underlayer, derived by a cross-sectional TEM image, is given as an interface roughness (nm) and the distance between the soft magnetic layer and the magnetic recording layer, excluding the soft magnetic layer and the magnetic recording layer, is given as a SUL-MAG distance (nm), interface roughness (nm)≦0.4 (nm) and interface roughness×SUL-MAG distance (nm)≦12 (nm) are satisfied.

A semiconductor device includes a first mono-crystallized layer including first transistors, and a first metal layer forming at least a portion of connections between the first transistors; and a second layer including second transistors, the second transistors including mono-crystalline material, the second layer overlying the first metal layer, wherein the first metal layer includes aluminum or copper, and wherein the second layer is less than one micron in thickness and includes logic cells.

An improved heater for processing materials or growing crystals in supercritical fluids is provided. In a specific embodiment, the heater is scalable up to very large volumes and is cost effective. In conjunction with suitable high pressure apparatus, the heater is capable of processing materials at pressures and temperatures of 0.2-2 GPa and 400-1200° C., respectively.

A method of fabrication and device with holes for electrical conduction made by preparing a photosensitive glass substrate comprising at least silica, lithium oxide, aluminum oxide, and cerium oxide, masking a design layout comprising one or more holes to form one or more electrical conduction paths on the photosensitive glass substrate, exposing at least one portion of the photosensitive glass substrate to an activating energy source, exposing the photosensitive glass substrate to a heating phase of at least ten minutes above its glass transition temperature, cooling the photosensitive glass substrate to transform at least part of the exposed glass to a crystalline material to form a glass-crystalline substrate and etching the glass-crystalline substrate with an etchant solution to form the one or more depressions or through holes for electrical conduction in the device.

The present invention relates to microfluidic devices and methods facilitating the growth and analysis of crystallized materials such as proteins. In accordance with one embodiment, a crystal growth architecture is separated by a permeable membrane from an adjacent well having a much larger volume. The well may be configured to contain a fluid having an identity and concentration similar to the solvent and crystallizing agent employed in crystal growth, with diffusion across the membrane stabilizing that process. Alternatively, the well may be configured to contain a fluid having an identity calculated to affect the crystallization process. In accordance with the still other embodiment, the well may be configured to contain a material such as a cryo-protectant, which is useful in protecting the crystalline material once formed.

A multilayered substrate structure comprising one or more devices, e.g., optoelectronic, integrated circuit. The structure has a handle substrate, which is characterized by a predetermined thickness and a Young's modulus ranging from about 1 Mega Pascal to about 130 Giga Pascal. The structure also has a thickness of substantially crystalline material coupled to the handle substrate. Preferably, the thickness of substantially crystalline material ranges from about 100 microns to about 5 millimeters. The structure has a cleaved surface on the thickness of substantially crystalline material and a surface roughness characterizing the cleaved film of less than 200 Angstroms. At least one or more optoelectronic devices is provided on the thickness of material.

A high-density optical disc with a super-resolution near-field structure (Super-RENS) on which information is written by a beam has multi-layers formed on a substrate. The disc includes one or more Super-RENS mask layers and one or more phase-change recording auxiliary layers, each containing a highly crystalline material. The Super-RENS optical disc allows high quality signal reproduction by eliminating signal instability and unevenness that may occur during reproduction after recording data as well as low manufacturing costs and high production yields.