13 results about "Nanoelectronics" patented technology

The invention belongs to the technical field of crossing of nano electronics, superconducting technology and quantum information science, and relates to a preparation method of flux quantum bits, which comprises the following steps: 1, processing a substrate; 2, depositing and oxidizing an aluminum film; 3, photoetching and etching to form a large structure; 4, forming a double-layer electron beam adhesive and a suspension bridge structure; 5, carrying out first dip angle evaporation and oxidation; 6, second-time dip angle evaporation; 7, removing photoresist; parameter consistency, yield and microwave performance of the prepared device all reach the industry leading level, the packaging mode is compatible with an existing system, and a reliable solution is provided for large-scale integration of a quantum computing system.

The invention provides a method and device for constructing sub-5 nano-metal gaps in a large area, and the method comprises the steps: forming a discontinuous first metal layer through employing a patterning technology, employing a dielectric film with atomic-scale thickness precision as a gap template, and constructing a second metal layer complementary with the first metal layer through combining with an overlay, oblique cutting and selective stripping technologies, thereby achieving the large-area construction of sub-5 nano-metal gaps. And finally, a high-precision metal nano gap is released by removing the medium template, so that controllable preparation of a large-area and high-uniformity sub-5-nano metal gap structure is realized. The preparation method breaks through the limitation of the traditional preparation method on the aspects of structural design flexibility, gap width precision and large-area processing, and is particularly suitable for the graphical manufacturing of the high-precision independent metal gap unit in micro-nano electronics, micro-nano optics and quantum mechanics devices. The nano-gap structure prepared by the method has a closed or open topological configuration, the unit size can reach the submicron level, and a new technical direction is provided for large-scale application of a nano-gap device in an integrated optical system.

The application provides a high-durability FeFET based on a ferroelectric hafnium aluminum oxide and aluminum oxide gate stack and a preparation method thereof, and belongs to the field of micro-nano electronics. The FeFET device comprises a silicon substrate, a patterned aluminum oxide intermediate layer, a hafnium aluminum oxide ferroelectric layer, a gate metal electrode and a contact metal are sequentially arranged on the surface of the silicon substrate, a source-drain region is formed on the surface of the silicon substrate through self-aligned ion doping, a source-drain metal contact electrode is arranged above the source-drain region, the hafnium aluminum oxide ferroelectric layer is grown through atomic layer deposition, the cycle number of hafnium oxide and aluminum oxide is controlled in the atomic layer deposition cycle process to control the atomic proportion of doping, the proportion of hafnium atoms and aluminum atoms in the finally formed hafnium aluminum oxide ferroelectric layer is 24:1, and the hafnium aluminum oxide ferroelectric layer stores two storage states in different polarization states. The application can improve the durability of the FeFET storage device.

This invention belongs to the field of semiconductor devices and micro / nanoelectronics technology, and discloses a CNTFET based on MoTi alloy contacts and its fabrication method. The CNTFET includes a substrate, a gate electrode, a gate dielectric layer, a carbon nanotube channel, and source and drain electrodes, wherein the source and drain electrodes are MoTi alloys or multilayer metal structures coated with MoTi layers. By controlling the Mo / Ti atomic ratio and optimizing deposition process conditions, this invention constructs a contact structure with tunable work function, high oxidation resistance, and excellent thin film quality, effectively reducing the Schottky barrier between the metal and carbon nanotubes, and achieving stable near-ohmic contacts. This device overcomes the shortcomings of existing technologies such as easy oxidation of low work function metals like Sc and Y, poor interface stability, and insufficient process compatibility. It significantly reduces contact resistance and improves the N-type conductivity stability, on-state current, and long-term reliability of the device in air environments, making it suitable for the integration of high-performance carbon-based logic devices and next-generation micro / nanoelectronic systems.

The invention discloses a ferroelectric tunnel junction based on a two-dimensional TiSe2 / Sc2CO2 Van der Waals heterostructure and a design method thereof, and belongs to the technical field of nanoelectronics. The ferroelectric tunnel junction comprises a left electrode, a central scattering region and a right electrode which are connected in sequence; the left electrode and the right electrode are respectively formed by periodically repeating a TiSe2 / Sc2CO2 Van der Waals heterostructure leftwards and rightwards; the central scattering area is composed of N Sc2CO2 single-layer orthogonal unit cells, the length of the central scattering area is N times of the length of the Sc2CO2 single-layer orthogonal unit cells, and N is a positive integer; the TiSe2 / Sc2CO2 Van der Waals heterostructure is formed by stacking a two-dimensional metal TiSe2 and a two-dimensional ferroelectric body Sc2CO2, and each ferroelectric tunnel junction only comprises the TiSe2 / Sc2CO2 Van der Waals heterostructure in one polarization direction. The device has the ohm-Schottky contact reversible switching characteristic, stable switching of high and low conductivity states under the zero bias voltage condition is achieved, and an important theoretical basis and a feasible implementation path are provided for design of next-generation high-performance ferroelectric logic devices and memories.

The present disclosure describes electrically stimulating biological systems using meshes, wherein the mesh comprises nanoscale wires and / or nanoelectronics. These may be embedded as a scaffold in biological structures, such as tissues, organoids, organs, organisms, and the like. These may be connectable to an external device to determine a property of the scaffold and / or to apply a stimulus to the biological structure. Certain embodiments are Al-driven systems designed for applications such as drug screening, stem cell therapy, or the like. In addition, some embodiments are directed to predictive models that can be used to predict and / or control the biological structure. For example, certain cells may be caused to mature more quickly, and / or the functionality of the biological structure may be enhanced or inhibited by using such models to apply suitable electrical stimuli to the biological structure, and / or portions of the biological structure.

The application discloses a reserve pool calculation method based on 2T0C dual-mode judgment, and belongs to the technical field of micro-nano electronics. hold By changing the storage node relaxation time constant tau, the short relaxation and the long relaxation are switched between each other, and the multi-level threshold layer judgment mechanism is combined, so that the complementary extraction and fusion classification of the image time sequence-space double features are realized, the precision and the generalization ability of image recognition are obviously improved, and the advantages of simple hardware structure and low power consumption are kept.

This invention discloses a one-dimensional coaxial heterostructure composite material, its preparation method, and its applications. The one-dimensional coaxial heterostructure composite material comprises: a nanotube with a cavity structure, and a one-dimensional embedded material uniformly embedded within the cavity structure of the nanotube. The one-dimensional embedded material includes one or more combinations of molybdenum sulfide, molybdenum selenide, and molybdenum telluride, forming a coaxial heterostructure between the nanotube and the embedded material. The preparation method of this invention efficiently synthesizes the one-dimensional coaxial heterostructure composite material on a substrate using chemical vapor deposition. This method is simple, versatile, and has the potential for large-area preparation. The prepared one-dimensional coaxial heterostructure composite material has advantages such as high quality and good uniformity, ensuring the convenience of synthesizing the one-dimensional heterostructure and providing a new material foundation for the development and application of embedded one-dimensional materials in nanoelectronics, nanooptics, and other fields.

The application discloses a preparation method of metal nanometer material surface protrusions and belongs to the field of nanoelectronics. In the application, metal nanometer wires or nanometer strips are first prepared into two-end devices, the metal nanometer wires are annealed by using Joule heat, and the initial morphology of the surface of the nanometer wires is stabilized through electrical preparation operation, then a semiconductor parameter analyzer and a matched probe station are used to perform current-voltage (I-V) scanning on the metal nanometer wires, the three-dimensional metal protrusions on the surface of the nanometer wires are regulated to the required morphology and height by monitoring the transient slope of the R-V curve of the nanometer wires and the amplitude of the resistance increase.

The present disclosure generally relates to devices and methods to determine and / or terminate cardiac arrhythmias. In some embodiments, the devices comprise meshes comprising nanoscale wires and / or nanoelectronics. In some case, meshes may be embedded in or placed upon a tissue at a target location within or on a heart. In some embodiments, the meshes may be connectable to an external device (e.g., to determine an electrical property at the target location and / or to apply an electrical stimulus to the target location). Other aspects relate to using the devices and methods disclosed herein for the treatment of cardiac arrythmia, such as atrial fibrillation. Additional non-limiting embodiments are generally directed to Al-driven systems to guide treatment of the arrythmia. For example, some embodiments are generally directed to predictive models that can be used to predict and / or control a pulse sequence of electroactive cells at the target location in the heart (e.g., to detect and correct an aberrant electrogram at the target location by delivering an appropriate pulse sequence).

The invention provides a preparation method of a fin type tunneling field effect transistor, and belongs to the technical field of micro-nano electronics. A traditional planar TFET device and a FinFET structure are combined, the advantage of low off-state current can be kept while on-state current can be improved, bipolar current is restrained, namely, an expansion region is prepared in a source region in a self-alignment mode, so that a tunneling junction is formed at the gate-source overlapping position, tunneling current is improved, and meanwhile, through a thick side wall prepared before source-drain epitaxy, the tunneling efficiency is improved. An under-coverage area structure is formed at the drain terminal to suppress bipolar current; meanwhile, the main body of the substrate region of the device is still lightly doped high-resistance silicon, so that the advantage of low off-state current of the tunneling field effect transistor is maintained. Besides, the preparation method is based on a standard fin type tunneling field effect transistor process flow of an advanced node, only one photoetching plate is additionally arranged on the premise of not changing a basic process flow, and the potential of realizing large-scale production is maintained.

The present invention generally relates to nanoscale wires and nanoelectronics, which in some aspects may be embedded in biological structures, such as tissues, organoids, organs, organisms, and the like. For example, one aspect is generally directed to stretchable cell scaffolds, which may be connected to electrical circuits. In some cases, a biological structure may form around the scaffold and deform the cell scaffold as it forms, thereby causing the cell scaffold to become embedded within the biological structure. The scaffold may be connectable in certain embodiments to an external device, e.g., to determine a property of the cell scaffold (e.g., an electrical property), and / or to apply a stimulus (e.g., an electrical stimulus) to the biological structure. Other aspects of the invention are generally directed to methods of making or using such cell scaffolds, kits including such cell scaffolds, biological structures containing such cell scaffolds, or the like.

This invention provides an MFMIS FeFET with an intermediate metal layer and its fabrication method, belonging to the field of micro-nano electronics technology. The device includes a silicon dioxide layer, a gate metal electrode, a ferroelectric layer, an intermediate metal layer, a dielectric layer, an oxide semiconductor channel layer, a source, and a drain. The silicon dioxide layer is located above a silicon substrate, the gate metal electrode is located above the silicon dioxide layer, the ferroelectric layer is attached above the gate metal electrode, the intermediate metal layer is located above the ferroelectric layer and connected to the electrode of the intermediate metal layer via leads, the dielectric layer is located above the intermediate metal layer, the oxide channel layer is attached to the dielectric layer, and the source and drain metal materials are attached to the oxide channel layer, with the channel region between the source and drain. The potential of the intermediate metal layer can be controlled or measured through the leads and electrodes, thereby enabling electrical testing and analysis of the device. The degradation mechanism of the storage window after durability cycling is studied, and a recovery waveform is applied to restore durability, thus improving durability.