150 results about "Conductive channel" patented technology

Aspects of the present disclosure include a battery measurement system having a plurality of capacitors, a plurality of probes each electrically coupled with a corresponding capacitor of the plurality of capacitors and a corresponding battery of a plurality of batteries, a controller configured to measure, via the plurality of probes, a plurality of voltages associated with the plurality of batteries in response to an interrogatory current, and a plurality of sense cables each associated with the corresponding battery of the plurality of batteries, wherein each sense cable of the plurality of sense cables is disposed across the corresponding battery such that the interrogatory current flows in a conduction channel in the corresponding battery in a first direction and in the corresponding cable in a second direction substantially opposite of the first direction.

The invention discloses copper paste, an electrode and a preparation method and application of the electrode, the electrode comprises copper powder, the copper powder comprises nano-copper particles and flaky copper powder, the nano-copper particles comprise at least two connected copper nanoparticles, and the adjacent copper nanoparticles are connected in a surface contact mode. According to the electrode disclosed by the invention, the nano-copper particles formed by connecting more than two copper nano-particles are filled in the gap areas among the large-size flaky copper powder, so that the nano-copper particles are in direct contact with the flaky copper powder, conductive channels among the conductive particles are smoother, and the structure of the electrode is more compact due to the filling of the nano-copper particles; the bulk resistance of the electrode is greatly reduced and is equal to the conductivity of a silver electrode; the nano-copper particles can also be used as an auxiliary adhesive after being sintered and cured, so that the adhesive force between the copper grid line and the solar cell is improved, and the connection between the grid line and the solar cell is firmer.

The invention provides a phosphorus emitter passivation structure and a preparation method thereof, the passivation structure comprises a phosphorus emitter, the phosphorus emitter comprises silicon, phosphorus, hydrogen, carbon and / or nitrogen, the surface of the phosphorus emitter is provided with a nano silicon oxide layer, the phosphorus emitter comprises an electric injection region and a doped region, the electric injection region is provided with a conductive layer at a corresponding position, and the doped region is provided with a conductive layer at a corresponding position. The conductive layer is used for being connected with a metal electrode, a passivation anti-reflection layer is arranged at the corresponding position of the doped region, and the carbon and / or nitrogen concentration of the electric injection region is higher than that of the electric injection region. Partitioned passivation is performed on the surface of the phosphorus emitter, and carbon and / or nitrogen atoms are introduced into the doped region, so that the interface passivation effect is improved; the electric injection region is not subjected to carbon and nitrogen doping and is not provided with a passive film, so that the influence of passivation on the contact resistivity is reduced; a conductive channel is introduced into the electric injection region for electric injection, so that the defect state of the phosphorus emitter can be further eliminated, and the recombination current is reduced.

The application provides a preparation method of a device based on electrostatic field induced microparticle patterning directional assembly, comprising the following steps: preparing a pre-patterning electrode and printing or depositing the pre-patterning electrode on a substrate to obtain a pre-patterning substrate; uniformly laying microparticles on a lower substrate and placing the pre-patterning substrate between the lower substrate and an upper substrate; forming a controllable electric field between the upper substrate and the lower substrate through corona discharge, and driving the microparticles to deposit on non-conductive areas of the pre-patterning substrate by electric field force to form a patterning conductive channel corresponding to the electrode; and packaging the substrate on which the patterning directional assembly is completed. The application realizes template-free, contact-free and solvent-free patterning directional assembly of microparticles, and has the advantages of simple process, low cost, high efficiency and strong universality. The application can be used to prepare multiple devices such as photoelectric detectors, pressure sensors and flexible electronics, and has important industrial application value.

The invention relates to the technical field of thermoelectric functional materials, in particular to an SWCNT / MBene composite thermoelectric thin film and a preparation method and application thereof. An acidified P-type doped one-dimensional SWCNT is used as a substrate, two-dimensional MBene is loaded, a one-dimensional / two-dimensional mixed structure is formed through hot pressing, and the thin film of a heterojunction structure is obtained. Wherein the one-dimensional SWCNT provides a good flexible skeleton and a conductive channel, the two-dimensional MBene nanosheet provides a Seebeck coefficient to enhance the thermoelectric conversion performance of the film, and the two-dimensional SWCNT and the two-dimensional MBene nanosheet cooperate to effectively balance the flexibility, the stability and the power factor of the thermoelectric film. Meanwhile, the preparation process is simple and controllable, large-scale production is easy, and damage to material performance and restriction on production efficiency by a complex process are avoided. The composite thermoelectric thin film is good in flexibility and excellent in performance, the preparation process is suitable for large-scale production, the composite thermoelectric thin film has wide application prospects in the fields of miniature thermoelectric power generation devices, flexible electronic temperature control devices and the like, and a new scheme is provided for practical application of high-performance thermoelectric materials.

The application provides a semiconductor device, a preparation method, a memory and an electronic device. The semiconductor device comprises: a first semiconductor structure, a first isolation layer and a second semiconductor structure which are sequentially stacked along a first direction; wherein the first direction is perpendicular to the first isolation layer; the first semiconductor structure comprises at least one first standard unit, each first standard unit comprises two sub-units, and each sub-unit comprises two first transistors; the second semiconductor structure comprises at least one second standard unit, each second standard unit comprises two second transistors; a power supply track is located between the two first transistors of each sub-unit, and the power supply track is connected with a first source-drain structure of the first transistor; and a conductive channel is located in the second semiconductor structure, a first end of the conductive channel is connected with a power supply metal structure in the second semiconductor structure, and a second end of the conductive channel extends along the first direction and is connected with the power supply track through the first isolation layer.

This application discloses a semiconductor device and its manufacturing method. The semiconductor device includes a first region and a second region. The second region contains a plurality of transistors. Each transistor includes: a semiconductor layer and a source region and a drain region, the source region and drain region being located in the semiconductor layer and close to its surface; a second gate dielectric layer located on the surface of the semiconductor layer; a gate conductor located on the second gate dielectric layer; a second sidewall located on the side surface of the gate conductor on the second gate dielectric layer; and a plurality of conductive channels respectively connected to the source region, drain region, gate conductor, and second sidewall as lead-out structures. The second sidewall includes a field plate, and the conductive channels of the field plate are connected to the conductive channels of the drain region. This application improves the breakdown voltage of the device without increasing the channel on-resistance.

The invention discloses a preparation method of a solid-state battery with a silicon-based negative electrode. The preparation method comprises the following steps: preparation of pre-lithiated silicon particles, preparation of a conductive network precursor, preparation of a Si-C composite negative electrode layer, preparation of a composite solid-state electrolyte and battery assembly. Li3PS4 is used as a main electrolyte, LiI and Li3PS4 form a solid solution with low grain boundary impedance, so that the activation energy is reduced from 0.35 eV to 0.28 eV, then Li3N is added as an interface modifier, N3-contained in the Li3N can react with Si-OH on the surface of silicon to form a stable Si-N bond, and the interface impedance is greatly reduced; then CNT is used as an electronic conductive main body, and after the CNT is modified by a coupling agent, amino groups on the surface of the CNT and P in Li3PS4 can form stable C-P bonds, so that Li3PS4 particles are uniformly loaded on the surface of the CNT, and an electron-ion double-conductive channel is formed; and moreover, a lithium naphthalene tetrahydrofuran solution is adopted to carry out mild pre-lithiation on the silicon particles, so that active lithium required by formation of an SEI layer is accurately supplemented, excessive lithium is prevented from reacting with electrolyte, lithium loss is reduced, and the utilization rate of lithium is increased to 90% or above.

The invention relates to the technical field of flow battery energy storage, in particular to a vertically-oriented conductive fiber reinforced composite bipolar plate which comprises a resin matrix, conductive filler and vertically-oriented high-conductive fibers, the vertically-oriented high-conductive fibers are uniformly distributed perpendicular to two working surfaces of the bipolar plate to form a continuous vertical conductive channel, and the vertical conductive channels are communicated with the resin matrix. The invention also provides a specific preparation method of the bipolar plate. The defect of conductivity anisotropy of an existing bipolar plate is overcome, a vertical orientation high-conductivity fiber channel is accurately constructed through a weaving or winding matched cutting process, the conductivity in the thickness direction is improved by 80-200%, the difference between the conductivity in the thickness direction and the conductivity in the facing direction is reduced to be within 15%, and the contact resistance and the internal resistance of a galvanic pile are greatly reduced.

The utility model discloses an anti-loosening suspension insulator, which relates to the technical field of communication engineering, and comprises a central column, an abutting ring is fixedly arranged at the bottom of the outer wall of the central column, a plurality of insulating ceramic rings are movably sleeved on the central column above the abutting ring, a threaded column is fixedly arranged at the top of the central column, and the threaded column is fixedly connected with the central column. The top of the threaded column is fixedly provided with an anti-loosening assembly which tightly presses the plurality of insulating ceramic rings on the outer wall of the central column. The main body structure comprises the central column, the outer wall of the central column is sleeved with the multiple insulating ceramic rings, the side faces of the multiple insulating ceramic rings are provided with the self-cleaning assemblies based on wind power, and the self-cleaning assemblies can scrape away sundries possibly attached to the outer walls of the multiple insulating ceramic rings irregularly through high-altitude wind power. The problems that a conductive channel is possibly formed on the surface of the insulator due to pollutant accumulation, leakage current is increased, the insulation effect is reduced, workers need to climb high frequently, and the cleaning process of the suspension insulator is high in risk and time-consuming are solved.

This invention relates to the field of infrared emitting composite materials, specifically to a conductive infrared emitting composite material and its preparation method. The preparation method is as follows: AB2O is prepared. 4‑δ Spinel material; the prepared AB2O 4‑δ Spinel material, carbonaceous material, and ceramic material are mixed and then sandwiched together with carbonaceous material to form a pressed tablet. Microwave plasma discharge treatment is used to activate the infrared emission performance of the plasma elements and excite the conductivity channels, resulting in a conductive composite material with high infrared emissivity. This composite material solves the technical problems of limited infrared emission capability, single excitation method, and complex preparation method of existing composite ceramic materials, and has broad application prospects in the field of tunable photoelectric synergistic excitation of infrared radiation.

The invention provides a monolithic three-dimensional integrated photoelectric detector and a preparation method thereof. The preparation method comprises the following steps: forming an isolation passivation layer on a readout integrated circuit serving as a substrate of the photoelectric detector; forming a source conductive through hole, a drain conductive through hole and a bottom gate contact hole in the isolation passivation layer; a conductive material is deposited and planarized, the source electrode conductive through hole, the drain electrode conductive through hole and the bottom gate contact hole are filled with the conductive material, the conductive material in the source electrode conductive through hole forms a source electrode conductive channel, the conductive material in the drain electrode conductive through hole forms a drain electrode conductive channel, and the conductive material in the bottom gate contact hole forms a bottom gate electrode layer; forming a bottom gate dielectric layer on the planarized surface, and forming a channel layer on the bottom gate dielectric layer; forming a source electrode and a drain electrode, wherein the source electrode and the drain electrode are electrically connected with the connecting port of the read-out integrated circuit through a source electrode conductive channel and a drain electrode conductive channel respectively; and forming a top gate structure which comprises a top gate dielectric layer and a photosensitive layer.

The invention relates to a method for manufacturing a bipolar or multipolar conductor for a medical device, comprising the following process steps: a) Providing a cable including an external insulation, an inner lumen, at least one electrically conductive channel; b) Provide at least one conductive paste; c) Creating at least one contact opening near the distal end of the cable, such that at least one electrically conductive channel can be selectively electrically contacted via the contact opening; d) Filling the contact opening with the conductive paste, wherein the volume of conductive paste filled is 105% to 200% of the capacity volume of the contact opening in order to create a protrusion of conductive paste protruding from the contact opening; e) Providing at least one electrode, wherein the electrode has a contact surface with a contact cross-sectional area; f) Positioning the electrode at the position of the contact opening, with the contact surface oriented towards the contact opening; g) Moving the positioned electrode towards the contact opening so that the excess conductive paste is introduced between the outer insulation and part of the contact surface during the movement; h) Curing of the conductive paste to fix the electrode electrically to the electrically conductive channel.

A photoelectric packaging structure, manufacturing method, and camera module are provided. The structure includes a plastic packaging module, a photosensitive chip, and a substrate module. The plastic packaging module includes a packaging body for covering the photosensitive chip. The substrate module includes a dielectric layer and a first multilayered wiring structure having a first and a second wiring layer. The first wiring layer includes a first conductive portion and a first conductive wiring pattern. One side of the first conductive portion contacts the connection pad of the photosensitive chip. The second wiring layer includes a second conductive portion and a second conductive wiring pattern. The second conductive wiring pattern is electrically connected to another side of the first conductive portion. The first and second conductive portions constitute a first conductive channel. The photosensitive chip is electrically connected to the first and second wiring layers through the first conductive channel.

The invention relates to the technical field of metal material processing, and discloses a preparation method of a copper-silver alloy for a high-strength and high-conductivity new energy wire harness, which comprises the following steps: inhibiting segregation caused by copper-silver density difference and refining grains by using a rotating traveling wave magnetic field and a high-energy ultrasonic beam through magneto-acoustic double-field coupling rheological continuous casting. And then under a cryogenic environment, special modified polysiloxane-graphene hybrid conductive gel is matched for large-strain drawing, the gel keeps semi-solid lubrication at a low temperature, and a conductive channel is established. And finally, establishing an axial temperature gradient by utilizing the temperature difference between the cryogenic state of the wire rod and the contact electrode area, and applying a unipolar electric pulse to trigger the Thomson effect. According to the process, a Thomson heat flow item is used for correcting a Joule thermal field, and electron wind power is used for driving silver atoms to be directionally separated out along high-density dislocation while overheating softening of a copper matrix is restrained. The method effectively solves the problem that the strength conductivity is inverted due to solidification segregation and traditional heat treatment, and the comprehensive performance of the copper-silver alloy is synchronously improved.

Apparatus and methods are disclosed, including memory devices and systems. Example memory devices, systems and methods include memory strings with a conductor channel shell and a low dielectric constant central region. In one example, memory devices, systems and methods include memory strings with a conductor channel shell and a hollow central region.

The invention discloses a variable-temperature aluminum nitride nucleating layer for inhibiting radio frequency loss and an epitaxial growth method. A third-order AlN nucleating layer is set as a low-temperature-high-temperature-low-temperature layer; an in-situ crystalline SiNx layer is introduced between AlN interfaces, and the in-situ crystalline SiNx layer can effectively block diffusion of Al and Ga interfaces, so that the probability of forming a parasitic conductive channel is reduced, and the radio frequency loss of a radio frequency device is effectively reduced; through the introduction of the two low-temperature AlN nucleating layers, the diffusion of Al / Ga is effectively slowed down, the formation of a conductive channel in the substrate is avoided, the leakage current of the device in radio frequency work is reduced, and the power additional efficiency PAE of the device is improved; through three-stage temperature regulation and control, high-density nucleation and diffusion inhibition are realized on a low-temperature seed layer; the medium-high temperature crystallization layer obviously improves the crystal quality and compresses the dislocation density to a lower level; and finally, the low-temperature high-resistance layer effectively locks carbon atoms, and the resistivity is improved, so that synergistic improvement of material electrical and structural performance is realized.

The invention relates to the technical field of functional current collector materials, and particularly discloses a high-binder current collector and a preparation method thereof, in the current collector, one part of the structure is a metal foil-organic layer-metal layer structure, and the other part of the structure is a metal foil-metal layer structure. In the metal foil-metal layer part, the metal layer is directly contacted with the metal foil below the metal layer to form a vertical conductive channel, so that the overall conductive efficiency of the current collector and the charge-discharge function of the battery are greatly improved; in the metal foil-organic layer-metal layer part, the organic layer is fixed between the metal foil and the metal layer through the binder, the stress generated in the cycle process of the battery is absorbed and dissipated through the intrinsic elasticity and toughness of the organic layer, and the anti-stripping performance between the metal and the organic layer is enhanced through the binder with high cohesiveness.

A method for producing a multipolar lead comprising the steps of: providing a hollow-cylindrical inner lining having an inner lining length which corresponds to a multiple of a lead length of the lead for the medical device; providing a plurality of electrically conductive channels, wherein each of the channels is formed by at least one insulated conductor comprising an electrical conductor and an insulating layer; spirally winding the insulated conductors around the inner lining; cutting the uninsulated cable to a length which corresponds to the lead length; sheathing the uninsulated lead cable with a shrink tube; heating the shrink tube to provide an insulated lead cable; providing a plurality of electrodes; creating a plurality of contact openings near a distal end of the lead cable; and, electrically contacting the plurality of electrodes, wherein each electrode is selectively connected to at least one electrically conductive channel via contact openings.

The SiC JBS unit comprises a cathode, an N + substrate, an N-drift region, a P + region and an anode which are sequentially arranged from bottom to top, P region grooves extending downwards are formed in the top of the N-drift region at intervals, the P + region is located in the P region grooves, and the top of the N-drift region and the top of the P + region are attached to the anode; a first depletion region is formed in a region where the N-drift region is connected with the P + region, a second depletion region is formed on the other side, far away from the N-drift region, of the P + region, and the second depletion region is used for limiting the width of the first depletion region. According to the SiC JBS unit, the first depletion layer and the second depletion layer are arranged on the two sides of the P + region 4 respectively, extension of the P + region 4 to the depletion layer of the N-drift region 3 is limited, the width of the first depletion layer is reduced, a conductive channel is widened, and the on resistance of the SiC JBS unit is reduced.

The invention discloses a photoelectric packaging structure, a preparation method thereof and a camera module. The photoelectric packaging structure comprises a plastic packaging module, a photosensitive chip and a substrate module. A plastic package body of the plastic package module comprises a first surface and a second surface. The photosensitive chip is arranged in the plastic package body and is provided with a connecting pad. The substrate module is arranged on the second surface and comprises a dielectric layer and a first multi-layer circuit structure. The dielectric layer comprises a third surface facing the second surface, and the first multi-layer circuit structure comprises a first circuit layer and a second circuit layer which are stacked in the thickness direction of the substrate module. The first circuit layer comprises a first conduction part and a first conductive circuit pattern, one side of the first conduction part is in contact with the connecting pad, the first direction and the second direction are perpendicular to the thickness direction, and at least part of the first conductive circuit pattern extends in the first direction. The second circuit layer comprises a second conduction part and a second conductive circuit pattern, and the second conduction part is electrically connected with the other side of the first conduction part to form a first conductive channel. Part of the second conductive circuit pattern extends along the second direction.

The invention provides a double-gate carbon-based device, a carbon-based integrated circuit and a preparation method of the double-gate carbon-based device. The double-gate carbon-based device comprises a bottom gate conductive channel; the bottom gate structure comprises a bottom gate conductive layer and a bottom gate dielectric layer, the bottom gate conductive layer is located on the bottom gate conductive channel and electrically connected with the bottom gate conductive channel, and the bottom gate dielectric layer is located on the bottom gate conductive layer; the channel layer is positioned on the bottom gate dielectric layer and is made of a carbon nanotube; the top gate structure comprises a top gate dielectric layer and a top gate conductive layer, the top gate dielectric layer is located on the channel layer, and the top gate conductive layer is located on the top gate dielectric layer; a source structure contacting one end of the channel layer; and a drain structure contacting the other end of the channel layer. The top gate structure is used as a switch structure for controlling the conduction and cut-off of the carbon-based device, and the bottom gate structure is used for regulating and controlling the threshold voltage of the carbon-based device according to a threshold regulation and control signal transmitted by the bottom gate conductive channel so as to set the critical voltage of the carbon-based device switched from the cut-off state to the conduction state.

The present application relates to the technical field of semiconductors, and provides a semiconductor device, a semiconductor device packaging structure, and an electronic device. The semiconductor device comprises a semiconductor layer, a metal conductive layer, and a metal silicide layer; the semiconductor layer comprises silicon, for example, the semiconductor layer may be a source and a drain in a silicon substrate, and the metal conductive layer may be a conductive channel in ohmic contact with the source and the drain; the metal silicide layer is stacked between the semiconductor layer and the metal conductive layer, and in the metal silicide layer, the metal content on the side close to the metal conductive layer is greater than that on the side close to the semiconductor layer, which may be understood as that the metal content of the upper layer of the metal silicide layer is greater than the metal content of the lower layer of the metal silicide layer. The metal silicide layer of the present application can be prepared by depositing metal for multiple times, metal formed in a later step diffuses into the metal silicide formed in an earlier step, so as to repair defects in the metal silicide formed in the earlier step, adjusting the linewidth effect, and optimizing the resistance.

The invention relates to a ferroelectric memristor array and a sequential sequence processing method adopting the ferroelectric memristor array, and the ferroelectric memristor array comprises a bottom array gating structure which is used for providing unit-by-unit addressing and suppressing an undercurrent path of a non-gated unit in the array when the array scale is expanded; the adjustable conductive channel structure is used for generating a continuous photoconductive effect which can be accumulated and attenuated along with time under optical excitation; the in-plane polarization regulation and control structure modifies the conductive degree of the semiconductor channel by regulating and controlling the surface potential barrier of the channel so as to form a non-volatile weight state; and the multi-physical-quantity coupled electrode structure is used as a unified channel for weight regulation and control, conductivity reading and photoelectric response. Compared with the prior art, the semiconductor channel potential barrier is dynamically regulated and controlled through in-plane polarization of the ferroelectric film, non-volatile multi-stage conductance weight is achieved, synaptic-like photoresponse and short-time memory characteristics are obtained through the continuous photoconduction effect of a semiconductor material, and the continuous light input natural accumulation and attenuation process is achieved.

The present application belongs to the technical field of polymer materials, and particularly relates to a porous conductive epoxy resin composite material and a preparation method and application thereof. The material comprises the following components: 30 parts of epoxy resin E44, 10-50 parts of dimethylbenzene, 0.398-1.587 parts of expanded microspheres, 0-3.035 parts of multi-walled carbon nanotubes and 9.675 parts of polyether amine curing agent T403. In the present study, expanded microspheres (EM) and multi-walled carbon nanotubes (CNT) are simultaneously introduced into the epoxy resin matrix as composite fillers, and a lightweight porous conductive epoxy resin composite material (PCEP) with high conductivity is successfully prepared. Specifically, lightweight EM with a unique closed pore structure is selected as a foaming and weight-reducing filler, which can significantly reduce the overall density of the composite material while maintaining the high strength and high toughness of the epoxy matrix, and the pore size and distribution can be accurately controlled. Then, high-quality dispersed CNT is uniformly introduced into the system, and by constructing a continuous and efficient conductive channel, the conductivity of the composite material is significantly improved.

A method for evaluating a capacity of a serum to neutralize a virus is disclosed. The method includes preparing a solution comprising at least one cell, a serum and a virus, placing the solution in contact with an organic electrochemical transistor comprising a source, a drain and a gate electrode, wherein the source and drain electrodes are electrically connected by means of a conductive channel, applying a potential difference between the drain and source electrode, applying a plurality of pulses of a potential difference between the gate and source electrode and measuring a respective plurality of values of pulses of current flowing through the channel; calculating a value of an estimation of a response time of the transistor, and comparing the value of the estimated response time with respect to a threshold value and detecting whether the serum has a neutralising capacity against the at least one virus.

The invention discloses a photoelectric packaging structure, a preparation method thereof and a camera module. The photoelectric packaging structure comprises a substrate module, a photosensitive chip and a plastic packaging module. The substrate module includes a glass substrate and a first conductive structure. The glass substrate comprises a first surface and a second surface which are opposite. The first conductive structure includes a first conductive pad exposed on the second surface. The photosensitive chip and the plastic package module are arranged on the second surface. The plastic package module comprises a plastic package body and a second conductive structure. The plastic package body comprises a third surface and a fourth surface which are opposite. The second conductive structure comprises a first conductive channel, a second conductive channel, a second conductive pad and a third conductive pad. The first conductive channel and the second conductive channel are arranged in the plastic package body. The second and third conductive pads are exposed on the fourth surface. The first conductive channel is connected with the first conductive pad and the second conductive pad, and the second conductive channel is connected with the non-photosensitive area of the photosensitive chip and the third conductive pad, so that the photosensitive chip can be electrically connected with the substrate module.

Semiconductor unit (100) for a power converter, wherein the semiconductor unit (100) comprises a power semiconductor (102) having a III nitride semiconductor layer (110), and a drain contact (104) and a source contact (106), and wherein the power semiconductor (100) in an operating state has a conductive channel (108) of a two-dimensional electron gas in a III nitride semiconductor layer (110) facing away from the contacts (104, 106), and a printed circuit board (112) in which the power semiconductor (102) is embedded, wherein the printed circuit board (112) has a recess (114) leading to the III nitride semiconductor layer (110) for guiding a positively charged liquid coolant (116) for cooling the power semiconductor (100) and for neutralizing opposite the drain contact (104) accumulated negative electron charges (118) on the power semiconductor (102).

The application discloses a thickness integrated structure for a surface acoustic wave filter, comprising a body, wherein the body comprises a packaging substrate and at least two chips stacked in sequence along a thickness direction on the packaging substrate through a bonding layer; and a pad of each chip is electrically connected with a pad of the packaging substrate through a conductive channel structure. The application further discloses a manufacturing method of the thickness integrated structure for the surface acoustic wave filter. The application integrates chips such as the surface acoustic wave filter in the thickness direction, thereby reducing the surface area of the device and saving the internal space of a mobile phone.

A semiconductor package includes a silicon die including a first die surface coupled to a package substrate, a second die surface opposite to the first die surface, and at least one die sidewall orthogonal to the first die surface and the second die surface, and a mold layer including a first mold surface, a second mold surface opposite to the first mold surface, and at least one mold sidewall orthogonal to the first mold surface and the second mold surface, the at least one mold sidewall being disposed along the at least one die sidewall, and the mold layer further including a power conductive corridor extending from the first mold surface and coupled to the package substrate through the first mold surface. The semiconductor package further includes a first stacked device coupled to the first die surface and to the power conductive corridor through the first mold surface.