14 results about "Phosphosilicate glass" patented technology

The invention relates to the technical field of fireproof materials, and discloses a fireproof plugging material and a preparation method thereof, and the fireproof plugging material comprises the following components by mass: 20-40 parts of a metal oxide enriched phosphate gelling system, 10-25 parts of an expansion main body, 5-15 parts of a synergistic fluxing and heat absorbent, 30-50 parts of an in-situ reactive aggregate, and 1-5 parts of reinforced fibers. According to the preparation method, a four-stage chain reaction system of expansion, synergistic fluxing, volatilization inhibition and in-situ welding is constructed, an oxygen-enriched phosphate gelling system provides BO volatilization inhibition capability and a POprecursor, boric acid provides a low-temperature endothermic effect and a BO precursor, the oxygen-enriched phosphate gelling system and the boric acid form a phosphorus borate eutectic melt at the temperature of 600-900 DEG C, and the low-temperature heat absorption effect and the BO precursor form a low-temperature heat absorption effect and a low-temperature heat absorption effect at the temperature of 600-900 DEG C; and the melt further reacts with wollastonite to generate a calcium-magnesium-boron-phosphorus-silicate glass phase, and a loose carbon layer obtained after expandable graphite is expanded is welded, so that the core contradiction that high expansion rate and high-temperature residual strength cannot be considered at the same time in the prior art is effectively solved.

This document discloses a P-type back-contact battery, a preparation method thereof, and a solar module. The preparation method for the P-type back-contact battery includes preparing a process wafer for the P-type back-contact battery, forming a gettering structure on the first and / or second surface of the P-type back-contact battery, the gettering structure including a second tunneling layer, a second polysilicon layer, and a second phosphosilicate glass layer, respectively, etching the process wafer after the gettering structure is formed to remove the gettering structure and the first phosphosilicate glass layer on the second surface, and forming passivation layers on the first and second surfaces of the process wafer. The technical solution of this application is to form a gettering structure on the first and second surfaces of the P-type back-contact battery process wafer, thereby absorbing impurities on the first and second surfaces of the process wafer, reducing recombination centers formed by impurities, improving carrier mobility, and improving the conversion efficiency of the P-type back-contact battery.

In one aspect, a preparation method for a solar cell includes the following steps: sequentially forming a first silicon oxide layer, an intrinsic amorphous silicon layer, a phosphorosilicate glass layer and a second silicon oxide layer on the back surface of an n-type silicon substrate; removing the phosphorosilicate glass layer and the second silicon oxide layer in a partial region of the back surface of the n-type silicon substrate; subjecting the back surface of the n-type silicon substrate to boron diffusion; forming an isolation groove at the boundary between the boron-doped polycrystalline silicon layer and the phosphorus-doped polycrystalline silicon layer; and preparing a first electrode connected to the boron-doped polycrystalline silicon layer and a second electrode connected to the phosphorus-doped polycrystalline silicon layer.

Support (200) comprising: a support body (202); a bonding material (204) on a first main surface (208) of the support body (202), wherein the support (200) is configured to be attached to a semiconductor wafer via the bonding material (204) by wafer bonding, wherein the support body (202) contains one or more of silicon, boron phosphosilicate glass, borosilicate glass, phosphosilicate glass, boron nitride, polycrystalline silicon, silicon carbide; and dopants integrated in a first part (216) of the support (200) on the first main surface (208), wherein the dopants are configured to eject from the support (200) by thermal processing and are configured to form an n-type or p-type doping in the semiconductor wafer.

The present application provides a method for preparing a TOPCON cell and a TOPCON cell. The preparation method includes steps of: double-sided texturing the silicon wafer multiple times. Polysilicon is deposited on the front side, and then phosphorus diffusion is performed to form a doped polysilicon layer and a phosphorosilicate glass; alternatively, the phosphorus diffusion is performed to form the phosphorus diffused layer and the phosphorosilicate glass. Laser grooving is performed to form localized emitters. After third double-sided texturing on the silicon wafer, the double-sided rounding is performed.

The application discloses a high-toughness phosphosilicate glass and a low-carbon preparation method thereof, and relates to the technical field of glass manufacturing. The high-toughness phosphosilicate glass comprises the following components in terms of molar percentage: SiO2 10-80%, P2O5 0.5-60%, Al2O3 0.5-60%, B2O3 0.5-60%, ZnO 0.5-30%, M2O 0.5-40%, XO 0.1-30% and Sb2O3 0.1-10%; the M element in the M2O is selected from one or more of Li, Na, K, Rb and Cs; and the X element in the XO is selected from one or more of Mg, Ca, Sr and Ba. The high-toughness phosphosilicate glass has a fracture toughness of 2.28 MPa.m 0.5 , an absorption coefficient less than 0.50 cm ‑1 in a wavelength range of 380-780 nm, and a transmittance greater than 80% in the wavelength range of 380-780 nm. In the preparation process, no carbon-containing material is used, and the glass melting temperature is reduced to 1000-1400 DEG C, thereby greatly reducing carbon dioxide emission and preparation energy consumption compared with traditional glass preparation technology, and realizing low-carbon preparation of the glass.

The present application provides a method for preparing a bifacial TOPCON cell and a bifacial TOPCON cell. The preparation method includes steps of double-sided texturing the silicon wafer multiple times (S1, S3, S7 or S1, S3, S9). Polysilicon (5) is deposited on the front side, and then phosphorus diffusion is performed to form a doped polysilicon layer (7) and a phosphosilicate glass (6); alternatively, the phosphorus diffusion is performed to form the phosphorus diffused layer (13) and the phosphosilicate glass (6'). Laser grooving is performed to form localized emitters (S6). After third double-sided texturing on the silicon wafer (S7, S9), the double-sided rounding is performed.

The invention relates to the technical field of photovoltaic cells, in particular to a double-sided texturing method of a silicon wafer and a heterojunction solar cell. The invention provides a double-sided texturing method for a silicon wafer, which comprises the following steps of: sequentially carrying out cleaning, polishing treatment, surface oxide layer removal and double-sided high-temperature gettering treatment on an N-type monocrystalline silicon wafer to obtain a clean N-type monocrystalline silicon wafer; carrying out first phosphorosilicate glass layer removal treatment on the front surface of the clean N-type monocrystalline silicon wafer, and carrying out single-surface texturing treatment on the front surface to obtain a single-textured silicon wafer; and carrying out second phosphorosilicate glass layer removal treatment on the back surface of the single-suede silicon wafer, and then carrying out double-sided texturing to obtain the double-suede silicon wafer. The silicon wafer obtained by the double-sided texturing method provided by the invention can effectively improve the photoelectric conversion efficiency of a heterojunction solar cell, and the preparation process is simple and easy for industrial application.

This invention discloses a monitoring method for the laser processing step of solar cells. The monitoring method includes: providing a monitoring sheet, which comprises a crystalline silicon wafer, a phosphorus-doped polycrystalline silicon layer and a phosphosilicate glass layer on a first main surface of the crystalline silicon wafer, a boron diffusion layer, a boron-phosphosilicate glass layer, a first wrap-around coating, and a second wrap-around coating on a second main surface of the crystalline silicon wafer; performing intermittent laser processing on specific areas of the monitoring sheet using the laser processing step to form alternating laser-processed and non-laser-processed areas; removing the second wrap-around coating and the first wrap-around coating from the laser-processed areas; removing the boron-phosphosilicate glass layer and the boron diffusion layer from the laser-processed areas, and the second wrap-around coating, the first wrap-around coating, the boron-phosphosilicate glass layer, and the phosphosilicate glass layer on the first main surface of the crystalline silicon wafer from the non-laser-processed areas and other areas, to obtain the target monitoring sheet; inspecting the target monitoring sheet; and evaluating the laser processing step based on the inspection results. This monitoring method can reliably and effectively monitor the laser processing step.

This disclosure provides enhancements in semiconductor fabrication aimed at boosting device performance and simplifying manufacturing. By employing a dopant layer, such as borosilicate or phosphosilicate glass, low doping junction diffusion can be managed effectively. An advancement can include using silicon germanium (SiGe) as an inner spacer for continuous sidewall epitaxial (EPI) growth seeding, optimizing the epitaxial source / drain layer quality by maintaining a thin, highly-doped layer to control electrical properties. Additional improvement can include filling stress material between the epitaxial source / drain sidewalls to preserve channel stress and enhance electrical performance. Furthermore, gate and inner spacers can be removed, creating air-filled structures that improve cell capacitance. Moreover, an inner wrap-around contact (WAC) can be formed using high etch selectivity between the stress material and epitaxial layers, reducing contact resistance and preventing deep metal-defined recess processes.

The application belongs to the technical field of solar cells, and particularly relates to a ToPCon cell and a preparation method thereof. The preparation method of the ToPCon cell comprises the following steps: performing texturing on the front surface of a substrate; performing boron diffusion treatment on the front surface of the texturing substrate; removing a borosilicate glass layer plated around the back surface of the substrate; sequentially depositing a tunneling oxide layer and a polysilicon layer on the back surface of the substrate; sequentially removing a phosphosilicate glass layer, a polysilicon layer and a tunneling oxide layer plated around the front surface of the substrate; and removing the borosilicate glass layer on the front surface of the substrate through alkali texturing treatment. In the process of removing the borosilicate glass layer through alkali texturing treatment, the problem that the second textured surface on the front surface of the substrate is damaged by the alkaline solution does not need to be considered, so that the problem that the borosilicate glass layer cannot be completely removed and the performance of the cell is reduced can be solved, that is, the preparation method of the application can completely remove the borosilicate glass layer without damaging the textured surface of the substrate.

This invention relates to the field of PERC etching technology, specifically to a back-side etching process for PERC batteries. It includes the following steps: pre-cleaning the PERC battery silicon wafer; removing the phosphosilicate glass layer from the surface of the PERC battery silicon wafer; contacting the PERC battery silicon wafer with a nitric acid solution to sever the PN junction; spraying the PERC battery silicon wafer through a mixed solution; removing the porous silicon on the surface of the silicon wafer, and simultaneously removing the wax layer sprayed during the inkjet process; rinsing the PERC battery silicon wafer with deionized water; and finally drying. In this back-side etching process for PERC batteries, before etching, the surface of the silicon wafer is first treated with a hydrofluoric acid solution to remove the phosphosilicate glass layer, reducing the impact of the phosphosilicate glass layer on the etching process, improving the etching effect, and resulting in a PERC battery with high reflectivity and high conversion efficiency.

The invention discloses an additive, a low hydrofluoric acid etching solution and an etching method cooperating with ultrasound. The multi-component additive comprises the following components in percentage by mass: 0.01%-0.5% of a penetration enhancer, 2%-10% of a PSG activating component, 0.1%-0.5% of organic protonic acid, 0.1%-0.5% of an interface cleaning component and 0.1%-0.5% of a reaction stabilizing component. The multi-component additive is used for preparing a low-concentration hydrofluoric acid etching solution, and the low-concentration hydrofluoric acid etching solution is used for etching PSG (Phosphosilicate Glass) of a silicon wafer under the synergistic effect of ultrasonic waves, so that the defects in the prior art can be effectively overcome. According to the method, the chemical efficiency of the low-concentration HF is fully exerted through precise coupling of a series of collaborative mechanisms under the drive of ultrasonic-assisted specific energy, the PSG can be quickly and uniformly etched, the dosage of the HF is reduced to 50% or above of that of a traditional process, the production cost is reduced, and the method is safe and environmentally friendly.

The invention relates to the field of BC batteries, in particular to a preparation method and equipment of a BC battery. The method comprises the following steps: S1, putting a silicon material and an antimony-containing doping source into a single crystal furnace for single crystal growth, and controlling the antimony concentration in a melt to be within a preset concentration in the growth process to obtain an antimony-doped single crystal rod; s2, processing the antimony-doped single crystal rod into a silicon wafer; s3, depositing a composite layer on the back surface of the silicon wafer, wherein the composite layer sequentially comprises a borosilicate glass layer, a phosphorosilicate glass layer and a Sb2O3 layer from the silicon wafer to the outside; s4, selectively irradiating a predetermined region on the back surface of the silicon wafer by adopting laser to enable antimony atoms in the Sb2O3 layer to be activated and diffused downwards to enter the silicon wafer so as to form an n-type heavily doped region; and S5, annealing the silicon wafer and forming a back passivation layer and an electrode. According to the method, the mass production efficiency of the BC battery is improved, the electric leakage rate is reduced, the thermal stability and compatibility of the passivation layer are improved, and the single-tile material and the manufacturing cost are remarkably reduced.