793 results about "Grid pattern" patented technology

A semiconductor substrate (1) includes a plurality of semiconductor elements (2) in which functional elements are constructed and which is formed in a grid pattern, wherein continuous linear grooves (3) are formed on longitudinal and lateral separating lines (4) that individually separate the plurality of semiconductor elements (2) with the exception of intersections of the separating lines (4) and portions corresponding to corners of each semiconductor element (2).

The invention provides parametric modules called Self Implementing Modules (SIMs) for use in programmable logic devices such as FPGAS. The invention further provides tools and methods for generating and using SIMs. SIMs implement themselves at the time the design is elaborated, targeting a specified FPGA according to specified parameters. In one embodiment, a SIM references or includes one or more floorplanners each of which may employ one or more placement algorithms. Such placement algorithms might include, for example: a linear ordering algorithm that places datapath logic bitwise in a regular linear pattern; a rectangular mesh algorithm that implements memory in a grid pattern in distributed RAM; a columnar algorithm for counters and other arithmetic logic; or a simulated annealing algorithm for random logic such as control logic. Therefore, a design including more than one SIM can utilize a plurality of placement algorithms at the same or different levels of hierarchy. The design as a whole can therefore utilize a non-uniform global placement strategy.

A method for manufacturing a composite structure is disclosed herein. The process uses a frame and selectively pressurizable forms. The forms define the interior members of the composite structure and frames define the exterior surface of the composite structure. Composite material is wrapped around the forms and the forms and composite material are placed in the frame. Selective forms are then pressurized and the composite material is co-cured together. A single piece co-cured fuselage incorporating a plurality of stiffeners is also disclosed in the application. The stiffeners are co-cured to the fuselage and may be in various patterns. The patterns may include an iso-grid pattern, and ortho-grid pattern, and a hoop-grid pattern.

Methods of forming arrays of small, densely spaced holes or pillars for use in integrated circuits are disclosed. Various pattern transfer and etching steps can be used, in combination with pitch-reduction techniques, to create densely-packed features. Conventional photolithography steps can be used in combination with pitch-reduction techniques to form superimposed patterns of crossing elongate features with pillars at the intersections. Spacers are simultaneously applied to sidewalls of both sets of crossing lines to produce a pitch-doubled grid pattern. The pillars facilitate rows of spacers bridging columns of spacers.

A leak in a membrane on top of a horizontal roof deck is located by applying conductive wires on the membrane underneath the aggregate in a grid pattern. A measuring and switching circuit generates voltage having a positive attached to the roof deck and a negative attached to the wires. The circuit has a relay for each wire which can be switched between a current sensor system and the negative potential. The sensor system is arranged to sense at each of the wires in turn the current flowing from the roof deck through any leak in the membrane to the wire. A micro-processor operates the relays in turn to connect all the other wires to the negative as a shield while each wire is sensed. From the output of the grid the changes in current in the x and y directions are analyzed to locate the leak in the membrane.

Disclosed are embodiments of a lithographic patterning method that incorporates a combination of photolithography and self-assembling copolymer lithography techniques in order to create, on a substrate, a grid-pattern mask having multiple cells, each with at least one sub-50 nm dimension. The combination of different lithographic techniques further allows for precise registration and overlay of the individual grid-pattern cells with corresponding structures within the substrate. The resulting grid-pattern mask can then be used, in conjunction with directional etch and other processes, to extend the cell patterns into the substrate and, thereby form openings, with at least one sub-50 nm dimension, landing on corresponding in-substrate structures. Once the openings are formed, additional structures can be formed within the openings.

There are provided a lead frame including a plurality of first external terminal portions 5 provided on a plane, inner lead portions 6 formed of back surfaces of the respective first external terminal portions and arranged so as to surround a region inside the inner lead portions, and second external terminal portions 7 formed of uppermost surfaces of convex portions positioned outside the respective inner lead portions; a semiconductor element 2 flip-chip bonded to the inner lead portions via bumps 3; and an encapsulating resin 4 encapsulating surroundings of the semiconductor element and the inner lead portions. The first external terminal portions are arranged in a lower surface region of the encapsulating resin along a periphery of the region, and the second external terminal portions are exposed on an upper surface of the encapsulating resin. A plurality of terminals 8 for electrical connection are provided in a grid pattern in a region inside the first external terminal portions and exposed on a lower surface of the encapsulating resin. A plurality of semiconductor elements or coils and resistors can be incorporated, and further semiconductor devices can be stacked.

A specially designed sonotrode and anvil are adapted to be used in combination for ultrasonic welding of work pieces, to produce a narrower weld region, but one exhibiting greater durability, thereby permitting use of less packaging material. The contact surfaces comprise a surface of the anvil having a plurality of energy directors, where the plurality of energy directors are arranged into a three-dimensional grid pattern to be capable of distributed vibration-transmissive contact. The energy directors may comprise a series of plateau surfaces being regularly spaced apart from each other in a first direction, and in a second direction that is orthogonal to the first direction, to form the grid pattern. The rectangular-shaped plateaus may be spaced apart by valleys. Engagement of the energy directors of the anvil with the corresponding surface of the sonotrode may cause minor elastic deformation of work pieces positioned therebetween prior to ultrasonic welding.