172 results about "Cell pattern" patented technology

An SRAM array and a dummy cell row structure is discussed that permits an SRAM array to be divided into segments isolated by a row pattern of dummy cells. The dummy cell structure avoids the use of special OPC conditions at the power supply line and block boundaries by providing a continuous cell array at the lower cell patterning levels in an area efficient implementation. In one implementation, the SRAM array comprises a first and second array block each comprising an SRAM cell having a first layout configuration, one or more of the dummy cells having a second layout configuration arranged along the row pattern associated with a wordline of the SRAM array, a first power supply voltage line connected to the first array block, and a second different power supply voltage line connected to the second array block. The first and second power supply voltage lines of the array blocks are further connected to the one or more dummy cells. Beneficially, the bitlines of the array may be continuous across the first and second array blocks and a dummy cell associated therewith.

Space-based wireless radiotelephone communications are provided in a satellite footprint over a satellite radiotelephone frequency band. The satellite footprint is divided into satellite cells in which satellite radiotelephone frequencies of the satellite radiotelephone frequency band are spatially reused. At least one of the satellite radiotelephone frequencies that is assigned to a given satellite cell in the satellite footprint is terrestrially reused outside the given satellite cell. A radiation pattern of at least the given satellite cell is modified to reduce interference with the at least one of the satellite radiotelephone frequencies that is terrestrially reused outside the given satellite cell.

A method of particle beam lithography includes selecting at least two cell patterns from a stencil, correcting proximity effect by dose control and by pattern modification for the at least two cell patterns, and writing the at least cell two patterns by one shot of the particle beam after proximity effect correction (PEC).

A method or process enables the collection of data from mobile devices and mobile networks using filtering, compression, encryption, memory management, and power management technologies to collect mobile device metrics at the mobile device (client side), and then transmit these metrics from the mobile device to a server for processing by analytics software. The analytics processing may also occur directly on the mobile device. Policies are determined and configured at the processing server to drive and control the mobile device metrics captured, which may include but are not limited to, data usage (e.g. time of day, amount of data sent / received), voice usage (e.g. time of day, calls in / out of network, dropped calls, call duration), the location of the mobile device, cell patterns (e.g. problem cells, roaming), touch interactions, behavioral analysis (programs used, services uses), battery performance, CPU usage, memory usage, network usage (e.g. 2G, 3G, 3.5G, 4G, Wi-Fi, WiMAX), and the like.

A method of making a memory cell or magnetic element by using two hard masks. The method includes first patterning a second hard mask to form a reduced second hard mask, with a first hard mask being an etch stop for the patterning process, and then patterning the first hard mask to form a reduced first hard mask by using the reduced second hard mask as a mask and using an etch stop layer as an etch stop. After patterning both hard masks, then patterning a functional layer by using the reduced first hard mask as a mask. In the resulting memory cell, the first hard mask layer is also a top lead, and the diameter of the first hard mask layer is at least essentially the same as the diameter of the etch stop layer, the adhesion layer, and the functional layer.

A method of detecting a defect of a semiconductor device includes forming test patterns and unit cell patterns in a test region a cell array region of a substrate, respectively, obtaining reference data with respect to the test patterns by irradiating an electron beam into the test region, obtaining cell data by irradiating the electron beam into the cell array region, and detecting defects of the unit cell patterns by comparing the obtained cell data with the obtained reference data.

A method and system for particle beam lithography, such as electron beam (EB) lithography, is disclosed. The method and system include selecting one of a plurality of cell patterns from a stencil mask and partially exposing the cell pattern to a particle beam, such as an electron beam, so as to selectively project a portion of the cell pattern on a substrate.

A method for particle beam lithography, such as electron beam (EB) lithography, includes predefining a stencil design having a plurality of cell patterns with information from a cell library, fabricating the stencil design, synthesizing a functional description into a logic circuit design after predefining the stencil design so that one or more characteristics of the stencil design are considered during synthesizing of the functional description into the logic circuit design, optimizing the logic circuit design, generating a layout design from the optimized logic circuit design, and forming the logic circuit on a substrate according to the stencil design and the layout design.

A method for particle beam lithography, such as electron beam (EB) lithography, includes forming a plurality of cell patterns on a stencil mask and shaping one or more of the cell patterns with a polygonal-shaped contour. A first polygonal-shaped cell pattern is exposed to a particle beam so as to project the first polygonal-shaped cell pattern on a substrate. A second polygonal-shaped cell pattern, having a contour that mates with the contour of the first polygonal-shaped cell pattern, is exposed to the particle beam, such as an electron beam, so as to project the second polygonal-shaped cell pattern adjacent to the first polygonal-shaped cell pattern to thereby form a combined cell with the contour of the first polygonal-shaped cell pattern mated to the contour of the second polygonal-shaped cell pattern. The polygonal-shaped contour of the first and second cell patterns may comprise a rectilinear-shaped contour.

A drug-eluting stent having a first cell pattern at one end and a second cell pattern on an opposite end. The cells in the first cell pattern have a smaller MCUSA than those in the second cell pattern. An anti-restonic drug can be coated on the first cell pattern and an anti-thrombotic drug on the second, with the anti-thrombotic drug overlaying and covering both the first and second cell patterns. The stent is operatively positionable at a distal graft-vein anastomosis with the first cell pattern adjacent the stenosis, and with the second cell pattern positioned adjacent the vein or the graft.

In a spectrum allocation method in a cellular communication system, a cell pattern is divided into clusters each containing a plurality of adjacent cells. A pool of forward and return link bearers is allocated to each cluster and may be shared among cells within the cluster. Bearers are reused between blusters having a sufficiently high mutual isolation. Preferably, the same time slot in a return link bearer is allocated to multiple users within the cluster. The receiver of the shared return link bearer uses multi-user detection techniques to separately decode the signals from each user sharing a time slot, using the spatial diversity of the individual cells.

The invention provides a heat-insulation stealthy high-temperature-resistant gas inlet duct. The gas inlet duct comprises a wave-transparent layer, a heat-insulation stealth layer, an electromagneticshielding layer and a low emissivity coating from inside to outside. The wave-transparent layer is formed by a continuously oxide-enhanced oxide-based composite material; the heat-insulation stealth layer is a multilayer composite material which is formed by alternately arranging heat-insulation core layers and electromagnetic periodic structure wave absorbing layers in a matching optimizing design manner, every heat-insulation core layer is a ceramic fiber mat reinforced aerogel composite heat-insulation core layer, and the electromagnetic periodic structure wave absorbing layer is composed of a high-temperature electromagnetic periodic structure cell pattern; and the electromagnetic shielding layer is formed by carbon fibers, and the low infrared emissivity coating is sprayed on the external surface of the electromagnetic shielding layer. The heat-insulation stealthy high-temperature-resistant gas inlet duct has the advantages of good heat insulation effect, wide wave absorbing frequency band, good low-frequency wave absorbing performance and certain infrared stealth performance, and can be applied to high-speed aircrafts to solve the problems of heat insulation and radar and infrared stealth of aircraft gas inlet ducts under severe aerodynamic heating conditions.

An endoprosthesis that has an interconnected series of struts, selected strut members connected to adjacent strut members at a longitudinal apex. Strut members include a first end portion, an intermediate portion hingedly connected to the first end portion, and a second end portion hingedly connected to the intermediate portion and extending to the apex. Some of the strut members can have a nesting feature configured for nestingly receiving another strut member when the endoprosthesis is in the delivery condition. A scaffolding body of the endoprosthesis can have an inner and outer component, each having a set of interconnected strut members which overlap those of the other to define a cooperating cell pattern. Also, the endoprosthesis can be configured to naturally tend to contract when the body is smaller than a predetermined diameter and expand when the body is larger than a predetermined diameter.

Reel-to-Reel method for making membrane electrode assemblies. A first catalyst is deposited in a repeating cell pattern on a first side of a proton exchange membrane film. A second catalyst is deposited on the back side of the proton exchange membrane. An electron conductor material is deposited on a support film which is adhered by means of an adhesive film to the proton exchange membrane film. The various layers are aligned and laminated together to form the membrane electrode assembly.

An electromagnetic wave absorber includes a ground layer made of a metal conductor, a dielectric layer formed on the ground layer, and a unit cell pattern made of a resistive material, and formed on the dielectric layer. The unit cell pattern includes a fundamental patch having a regular square shape, in which a rectangular recess is formed on the center of each of the respective sides, the fundamental patch being located at the center of each of the unit cell pattern, and half cross dipole patches, which are respectively disposed at the four sides of the fundamental patch at a regular angle so as to be engaged with the recesses formed on the respective sides of the fundamental patch at a regular interval.

Disclosed is a high-accuracy biological 3D (three-dimensional) printing method. According to the method, firstly, procedures for controlling a platform to move are compiled on a computer according to cell patterns wanting to be printed or three-dimensional cell gel structures, secondly, mixed solution of cells / growth factors / biological materials for 3D printing is selected, the cells / the growth factors / the biological materials are sucked into a syringe with a metal sprayer in a mixed manner, the metal sprayer is connected with a positive electrode of direct-current high-voltage power supply, a receiving plate is fixed on the movable platform below the metal sprayer and connected with the ground, the mixed solution forms material jet streams by the aid of electrostatic force, and the movable procedures on the movable platform are started, so that the material jet streams form the predesigned patterns or structures on the receiving plate. According to a cross linking mode, a treatment mode of temperature and calcium ions is changed, so that the material jet streams rapidly forms cells / hydrogel in situ through illumination. Various fine cell patterns and three-dimensional cells / gel micro-structural systems can be rapidly printed on a substrate as required.

A method of forming a mask pattern comprises the following steps. A second cell library is prepared by making process proximity effect correction with respect to cell patterns stored in a first cell library. The second cell library stores corrected cell patterns. A first corrected cell pattern and a second corrected cell pattern of the corrected cell patterns are placed so that an edge of the first corrected cell pattern and an edge of the second corrected cell pattern contact or come close to or overlap each other. A boundary pattern at the boundary neighborhood between the first corrected cell pattern and the second corrected cell pattern is extracted. Process proximity effect correction is made with respect to the boundary pattern.

An electromagnetic invisibility cloaking device with a broadened cloaking bandwidth and / or a tunable frequency of operation. The cloaking device includes an object (e.g., antenna) and a metasurface (301) that conforms to the surface design of the object. The metasurface includes an array of metal cells (302A, . . . , 302Y), where each of the metal cells includes a circuit element (304) (e.g., active, passive, negative impedance converter element). The array of metal cells may be represented as an array of metal square patches, a mesh grid, horizontal or vertical conductive strips, or any arbitrary combination of unit cell patterns, where each opening, or a subset of them, in such an array includes an embedded circuit element. By incorporating the circuit elements in the conformal metasurface, the cloaking bandwidth is broadened and the frequency of operation is actively controlled and tuned.

A method for generating layout data of a semiconductor integrated circuit includes applying optical proximity correction conditions to cells so as to generate cell patterns, selecting cell patterns to correspond cells, based on layout information of cells along a specified signal propagating path; calculating delay times for the signal propagating path for combinations of cell patterns; selecting a combination of cell patterns, based on lengths of the calculated delay times and the allowable delay time; and generating layout data of the signal propagating path using the selected combination.

The invention relates to a transflective vertically aligned (VA) liquid crystal display (LCD) comprising a patterned quarter wave foil (QWF). The display (10) comprises, in a particular, front and back electrodes (14a, 14b, 14c) provided on transparent substrates (lia, llb) and sandwiching a LC medium (12), so as to define reflective (10a) and transmissive sub-pixels (10b). The patterned QWF (16), which is preferably provided inside the LC cell (in-cell application), has regions (16a) which provide a defined retardation and cover the reflective sub-pixels (10a), and regions (16b) having no on-axis retardation and covering the transmissive sub-pixels (10a).

The invention provides a method to correct the mask layout, the layout including multiple cell patterns with different densities. It firstly carries out a detecting program, and according to the densities separates various component patterns into multiple kinds of cell patterns, and finally corrects various kinds of cell patterns, respectively.

A method for particle beam lithography, such as electron beam (EB) lithography, includes predefining a stencil design having a plurality of cell patterns with information from a cell library, fabricating the stencil design, synthesizing a functional description into a logic circuit design after predefining the stencil design so that one or more characteristics of the stencil design are considered during synthesizing of the functional description into the logic circuit design, optimizing the logic circuit design, generating a layout design from the optimized logic circuit design, and forming the logic circuit on a substrate according to the stencil design and the layout design.