7 results about "Random logic" patented technology

The invention provides a distributed data path combination equivalence verification method and a distributed server, and the method comprises the steps: carrying out the rewriting of two to-be-verified data path circuits, and obtaining two circuit description files with similar circuit structures; constructing a Miter circuit according to the circuit description file; random logic simulation is carried out on the Miter circuit to obtain internal potential equivalent nodes, and the internal potential equivalent nodes are stored in an equivalent node queue; selecting potential equivalent node pairs from the equivalent node queue, extracting fan-in cones of the potential equivalent node pairs, and constructing a sub miter circuit according to two groups of fan-in cones; selecting a verification mode according to the density degree of the XOR block in the sub-miter circuit, and verifying the sub-miter circuit; if verification succeeds, the corresponding potential equivalent nodes and the corresponding fan-in cones are combined, otherwise, other potential equivalent node pairs continue to be verified until verification of all potential equivalent nodes is completed; and the SAT solver is used for executing final equivalence verification and returning a verification result, so that the equivalence verification of the data path combination is efficiently realized.

A storage device, including: a nonvolatile memory device including a plurality of memory cells; and a controller configured to, based on receiving an open zone command from an external host device: based on a number of free erase units from among a plurality of erase units included in the plurality of memory cells being greater than a threshold value, allocate at least two free erase units to a first-type zone, and based on the number of the free erase units being smaller than or equal to the threshold value, allocate the at least two free erase units to a second-type zone, wherein the controller is further configured to permit a random write based on a random logical address received from the external host device for the first-type zone, and to permit a zone write based on a sequential logical address received from the external host device for the second-type zone.

A computing device (100) includes a processor (100) having a plurality of cores (111-114), a core translation component (616), and a core assignment component (617). The core translation component provides a set of registers (405), one register for each of the plurality of processor cores. The core assignment component includes a component for providing a core index to each of the registers of the core translation component according to a core assignment scheme during processor initialization. Process instructions from an operating system are transmitted to the corresponding core based on the core index.

The invention discloses a load state identification method based on hierarchical clustering and an image feature set, and belongs to the technical field of equipment state identification. Comprising the following steps: establishing an equipment typical curve library; carrying out typical working condition clustering on the determined logic type equipment and the random logic type equipment based on DTW; and constructing a load feature set and carrying out equipment state identification. According to the method, the precision of identifying the equipment state combination in the total power data can be improved, and subsequent load prediction and demand response potential calculation are facilitated.

The invention provides a distributed data path combination equivalence verification method and a distributed server. The method comprises: rewriting two data path circuits to be verified to obtain two circuit description files with similar circuit structures; constructing a Miter circuit according to the circuit description file; performing random logic simulation on the Miter circuit to obtain internal potential equivalent nodes and storing them in an equivalent node queue; selecting potential equivalent node pairs from the equivalent node queue and extracting their fan-in cones, and constructing a sub-miter circuit according to two groups of fan-in cones; selecting a verification mode according to the density of XOR blocks in the sub-miter circuit and verifying the sub-miter circuit; if the verification is successful, merging the corresponding potential equivalent nodes and the corresponding fan-in cones, otherwise continuing to verify other potential equivalent node pairs until all potential equivalent nodes are verified; using a SAT solver to perform the final equivalence verification and return the verification result, so as to efficiently realize the data path combination equivalence verification.

A method for using a storage array of a circuit includes generating a netlist of components and connections of circuitry of a storage array using behavioral description and random logic synthesis, using a write port to clock-gate each register of the storage array, and multiplexing data based on a selected word line of the storage array.

This invention discloses a scene graph generation method based on mutual perspective inverse relation calibration and hypernym guidance prompts. First, it establishes the principle of mutual perspective inverse relations and utilizes an adaptive inverse relation enhancement strategy. Through two paths—logical sample expansion and random logical permutation—the inverse perspective logic is internalized into the training process. For large-scale visual language models, hypernym guidance prompts are introduced, abstracting fine-grained entities into a coarse-grained set of hypernyms. This adaptively constructs text features containing inverse logic in the latent space, making the generated representations more consistent with the invariance of mutual perspectives. Finally, the cross-modal mutual perspective representations are jointly optimized using a cross-entropy objective function, serving as the final model prediction parameters. This invention significantly improves the inference robustness of scene graph generation models when facing long-tailed distributed data and complex interactive scenarios, effectively solving the problems of inaccurate identification of rare relations and semantic ambiguity caused by perspective switching.