ESOP minimization method for logic function

Abstract

The present invention discloses an ESOP minimization method for a logic function. By converting the optimal coverage searching problem of a 3n global space in the ESOP minimization process of an n variable logic function into the simplest connection problem in a plurality of cube blocks, a search space is reduced, thereby breaking away from a constraint of a variable scale; moreover, a cube set is directly operated without being converted into a minterm set, so that limitation to a product term number is avoided; and in order to achieve accurate minimization of rapid ESOP, a minimized conversion algorithm of a cube EXOR conversion diagram is adopted to improve operation efficiency so as to effectively reduce calculation complexity and a memory occupied quantity, and the characteristics that calculation time is insensitive to the number of input variables and is only related to the number of product terms included by the logic function and intersection can effectively achieve an effect that random n variables totally regulate the ESOP minimization of the logic function. The ESOP minimization method has the advantages of no limitation to the number of the product items and the number of the variables in the logic function and capacity of carrying out minimization processing on an ESOP of a random logic function.

Description

technical field [0001] The invention relates to a method for minimizing a logic function, in particular to an ESOP method for minimizing a logic function. Background technique [0002] In the past, the low-power design of very large-scale integration (VLSI) was mainly developed for AND / OR circuits, while digital logic circuits can be expressed as Boolean logic in the form of AND / OR, or Reed-Muller logic in the form of AND / XOR . Studies have shown that the exclusive-or sum of products (ESOP) formed by AND / XOR has a more streamlined form than the traditional sum of products (SOP) formed by AND / OR; secondly, ESOP is used to realize Some functional circuits (such as arithmetic circuits, communication circuits, parity check circuits, etc.) can obtain significant advantages in terms of area, power consumption, speed and testability, especially in parity check circuits, the number of ESOP product items and The number of input variables has a linear relationship, while the SOP has...

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Problems solved by technology

[0004] For the ESOP minimization of fully prescribed logic functions, foreign scholars have proposed many simplification algorithms and systematic methods. ESOP is minimized, but The exhaustive space cannot handle functions with more than 3 variables; secondly, several heuristic simplification software are proposed based on the conversion rules of product terms, such as EXMIN2, MINT and EXORCISM-2,3,4, among which EXORCISM-4 has the best performance and can Dealing with large-scale multi-output functions, but the minimum ESOP cannot be guaranteed, and the simplification efficiency drops rapidly when the number of product items reaches more than 1000; in addition, Mishchenko et al., Sasao and Stergiou et al. proposed three very effective simplification methods Algorithm, mainly suitable for ESOP minimization of some test benchmark circuits

On the other hand, because the minimization of ESOP is quite difficult, a truly effective ESOP minimization algorithm has not yet been proposed. Computational complexity, can only handle Boolean functions with less than 6 variables; although there are some algorithms that can handle the ESOP minimization of functions with more than 20 variables, there are corresponding restrictions on the number of product terms (product terms are also called cubes)

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