76 results about "Hierarchical design" patented technology

The invention discloses an unmanned aerial vehicle cluster cross-layer cooperative routing method based on TDMA, is applied to the field of wireless communication network resource scheduling and unmanned aerial vehicle autonomous networking cooperative control, and aims to solve the problem that the overall resource utilization rate of a system is low due to hierarchical design of a routing strategy and an MAC layer channel access control strategy in an existing TDMA network. The method comprises a dynamic collaborative framework based on routing and time slot allocation and a time slot state sensing routing algorithm based on deep reinforcement learning, the framework provides real-time time slot resource allocation state input for the algorithm, the algorithm outputs an optimal path meeting the bandwidth requirement for the framework, the problem of resource mismatching of a traditional layered framework is effectively avoided, and the routing efficiency is improved. And finally, collaborative optimization of the service bandwidth achievement rate and the network resource utilization efficiency in a high-load scene is achieved.

The invention relates to a hardware driving method supporting multiple operating systems, a driving program is divided into an equipment layer and a connection layer, the equipment layer comprises corresponding logic for operating hardware, and the connection layer comprises adaptive codes of the corresponding operating systems; the method specifically comprises the steps that 1, an equipment layer is constructed, same functions are sorted out for equipment of the same type, an equipment type model is abstracted, and a cross-platform unified interface specification is designed according to hardware functions, and the unified interface specification comprises multiple types of interfaces; 2, specific functions are achieved based on the cross-platform unified interface specification designed in the step 1; 3, creating a connection layer; and step 4, realizing the operation of the upper operating system on the equipment on the connection layer. According to the invention, for drive development, the processing modes of asynchronous and synchronous modes are unified, and the development cost is reduced. The hierarchical design function division of the equipment layer and the connection layer is clearer, and the code maintainability is improved.

The invention discloses a Transform-based digital textbook automatic hierarchical design method. The method comprises the steps of obtaining digital textbook content, performing structured analysis, dividing the digital textbook content into a plurality of content units, and allocating a unique identifier; an improved Transform model is input, semantic modeling is executed, the cognitive hierarchy is controlled, and folding representation is generated; based on the folded semantic representation, initial layering is executed, a layered structure is constructed, and a sequence and hierarchical relationship is generated; constructing a self-evolution hierarchical decision maker, detecting conflicts in a hierarchical structure, and identifying a hierarchical inconsistent relationship; re-executing hierarchical processing based on the conflict relation updating rule to generate an updated hierarchical structure; and performing disturbance processing on the textbook structure, repeating modeling and layering processes, and verifying a hierarchical stability result. According to the method, the stable and automatic hierarchical design of the digital textbook is realized by improving Transform semantic modeling and self-evolution hierarchical decision.

The invention relates to the technical field of chip design, and provides a clock constraint generation method, electronic equipment and a storage medium, and the method comprises the steps: building a relational database based on hierarchical design information of a chip, the relational database comprising an instantiated module relationship in the chip and a cross-module port connection relationship; determining a clock source from the relational database, and traversing a propagation path of the clock source in the relational database by taking the clock source as a starting point; and generating a clock constraint file of the chip based on the propagation path of the clock source. According to the method, the electronic equipment and the storage medium provided by the invention, the hierarchical design information is converted into the dynamic, queriable and traversal relational database, so that the clock propagation path is reconstructed, the clock constraint file is driven to be automatically generated, and on the premise that the complete hierarchical design information is reserved, the automatic generation of the clock constraint file is realized. The efficient, accurate and complete propagation path reconstruction is realized, and the clock constraint generation efficiency and accuracy are improved.

The invention discloses an automatic software testing method based on behavior-driven development, belongs to the technical field of software testing, and remarkably reduces repeated work of manual coding by automatically generating a test script. Based on a test scene described by a natural language, the system directly converts a structured test model into an executable test code by utilizing a predefined template library and a dynamic code generation technology. For example, key actions and parameters are extracted from a user story written by a Gherkin language through an analyzer and mapped to a code template of a framework such as Selenium or JUnit, and scripts do not need to be written manually line by line. The hierarchical design of the test model further simplifies the script generation process, supports batch processing of multi-scene test tasks, greatly shortens the test preparation period, improves the overall test efficiency, is compatible with various programming languages and test frameworks, and can adapt to project requirements of different technology stacks.

The invention discloses a multi-strategy fusion file data desensitization management and control system, and relates to the technical field of information security and data processing, a system architecture adopts a hierarchical design and comprises a presentation layer, a business logic layer and a data access layer, the interface design of the presentation layer is simple, and a user can easily operate the presentation layer; the business logic layer is responsible for processing various rules and ensuring that data can be correctly processed; the data access layer is responsible for interacting with a database to realize secure storage and quick reading of data, and the architecture design ensures the expandability and maintainability of the data desensitization file security management system; system functions are realized in two ways: a common user can perform desensitization operation on sensitive data and download a file; an administrator can modify configuration and manage the desensitization rule besides the functions of a common user; the system can effectively protect sensitive data and reduce the risk of data leakage, and has high practical value.

The invention is suitable for the technical field of computer system starting, and provides an OpenSBI starting method and system of an RISC-V SoC based on an FPGA, the system comprises a hardware abstraction layer, a boot loading layer, a privilege management layer and a kernel execution layer, and each layer realizes data interaction and process connection through a standardized interface; through the hierarchical design of FPGA hardware initialization, SPL / U-Boot firmware loading, OpenSBI privileged mode configuration and kernel startup, modular management of a startup process is realized, the system coupling degree is reduced, multiple storage medium and operating system types are supported, hardware abstraction is realized through an OpenSBI standard interface, subsequent extension of new peripherals or upgrading of an RISC-V architecture version is facilitated, and the development of the RISC-V architecture is facilitated. The standardized starting process reduces the adaptation workload of hardware and firmware, and debugging and rapid iterative development are facilitated.

The application provides an asset simulation system for threat awareness, comprising a simulation module, a decision module, a semantic mapping library, a response agent, a resource storage module and a session library, when an access request of an attacker is received, the decision module first matches the resource type corresponding to the request through the semantic mapping library, if it is static resource access, the decision module directly calls the static simulation resource in the resource storage module and returns the response, if it is dynamic resource access, the decision module triggers the response agent, so that the response agent is started and dynamically interacts with the attacker, records the interaction log, and synchronously updates the session context to the session library. The application realizes high-fidelity replication of static and dynamic resources of the protected assets relying on a vertical large model, and through hierarchical design, can quickly respond to static resource access and deeply interact with dynamic resource access.

The present invention belongs to the field of intelligent transportation technology, and specifically discloses a channel resource allocation method and system based on hierarchical reinforcement learning. The present invention proposes a fairness model based on Jain's fairness index, which is used to measure the fairness of resource allocation and ensure that the resource allocation between different vehicles is relatively balanced; a reliability model is established, which measures the probability of successful transmission of information within a specified time by introducing the concept of interruption probability, thereby ensuring the communication needs of the V2V link; a delay model is designed based on the information age AOI model, which is used to evaluate the time it takes for information to be generated and received, so as to ensure timely transmission of information. The present invention also constructs a cellular vehicle network channel resource allocation model based on hierarchical reinforcement learning. Through hierarchical design, the model decomposes the cellular vehicle network channel resource allocation problem into an upper-layer clustering problem and a lower-layer intra-cluster channel resource optimization problem, thereby ensuring fair and efficient resource allocation in a complex environment.

The invention discloses a photovoltaic cell production and operation-oriented data warehouse modeling method, device and system, a storage medium, a computer product and a data warehouse. The method comprises the following steps: determining an associated system and equipment related to the whole process of photovoltaic cell production and operation; constructing a data source layer, an access layer, a model layer and an application layer for the associated system and equipment; wherein the model layer adopts a layered design; and forming the data warehouse by using the data source layer, the access layer, the model layer and the application layer. According to the method, the data integration efficiency is improved, and the processing performance of the multi-source data is improved, so that the service agility and the decision-making capability are optimized.

The invention belongs to the technical field of medical scene consensus, provides a medical alliance block chain grouping consensus method and system based on leader group decision, and aims to solve the practical problems of high communication complexity, power concentration and main node failure of a traditional PBFT in a large-scale node scene. Through hierarchical design of leader group decision, a grouping strategy is adopted to prevent a power concentration phenomenon, and through leader group parallel decision, post quantum security is guaranteed, communication overhead is reduced, consensus efficiency is improved, and the power concentration phenomenon is avoided.

The invention belongs to the technical field of ocean engineering, and particularly discloses a multi-objective optimization design method for an ocean vehicle based on hierarchical design, which comprises the following steps of: S1, defining design variables, optimization objectives and constraint conditions, and constructing a parameterized model of the vehicle; s2, sensitivity analysis is conducted on the design variables, and the design variables are divided into high-sensitivity design variables and low-sensitivity design variables according to sensitivity ranking; s3, processing the high-sensitivity design variables by a multi-objective optimization method based on adaptive sequential sampling to obtain an optimal combination of the high-sensitivity design variables; s4, optimizing the low-sensitivity design variables by utilizing a fuzzy reasoning Taguchi method to obtain an optimal combination of the low-sensitivity design variables; and completing optimization of the aircraft according to the optimal combination of the high-sensitivity design variables and the optimal combination of the low-sensitivity design variables. According to the method, through technical innovation such as variable layering, adaptive sampling and staged optimization, the bottleneck of a traditional modeling and optimization method on high-dimensional complex problems is effectively broken through, and the method has clear technical advantages and wide engineering adaptability; and reliable and efficient technical support is provided for subsequent parameter sensitivity analysis, uncertainty quantification and rapid design iteration.

An embodiment of the present application provides a data processing method and device for Kafka storage and computing separation. By constructing a multi-layer data processing architecture, including four levels: network communication, task distribution, processing scheduling, and storage. Through the hierarchical design of the write-ahead log area and the main storage area, hot and cold data separation is achieved. Combining the replica manager, coordinator, and load predictor to realize the intelligent scheduling of system resources. The adaptive compression algorithm and verification mechanism are adopted to ensure the data transmission efficiency and integrity. A message buffer is created to store hot data, and flexible access to hot and cold data is realized based on the message position. This method effectively solves the deficiencies of traditional technologies in aspects such as storage and computing coupling, storage efficiency, and load balancing, and significantly improves the performance and scalability of the message queue system.

The embodiment of the invention discloses a method and a device for generating various modal contents based on a knowledge base and an index, electronic equipment and a computer readable storage medium, and realizes'knowledge priori constraint 'of a generation process based on dual drive of the knowledge base and a vector index; introducing a cyclic screening and dynamic threshold control mechanism, and constructing a convergent optimization closed loop; multi-modal complementation and consistency verification logic is provided, and integrated generation of cross-modal content is achieved; through a shunting-scheduling-fusion mechanism, the problems of scheduling efficiency and consistency in a multi-model collaboration process are innovatively solved; an end-to-end closed loop is established, knowledge retrieval and content generation are truly connected, and a knowledge base is evolved into a dynamic driving engine from a static information source. According to the technical scheme provided by the invention, through hierarchical design and module decoupling, the expandability of the system is ensured, and the professionality and practicability of the generated content are also improved.

The invention discloses a drilling engineering design on-line cooperation method and system. The method comprises the steps of collecting and storing a formulated template, geological data analysis, algorithm packaging, well bore structure on-line design, tubular column checking, drilling tool combination design, drilling parameter design and report automatic generation. The system is integrated with an application layer, a service layer, an engine layer and a data management layer through hierarchical design and modular construction. The method has the technical effects and advantages that (1) the template is edited online, and different format requirements are supported; (2) the algorithm is online and can be directly used without depending on external software; (3) data structuring: all data are formatted automatically in the design process, and extra work is not needed; and (4) multiple persons are assisted, and each person can complete one of the modules.

The application discloses a supergraph generation method and system, and a circuit simulation method. The supergraph generation method comprises the following steps: constructing a corresponding hierarchical design tree based on a netlist design; generating a data flow graph of each module corresponding to each node of the hierarchical design tree; performing feature analysis on each module based on the data flow graph of each module, putting the nodes corresponding to the modules matching the features of the undesired split modules into a feature list, and putting the nodes corresponding to the other modules into a non-feature list; traversing the nodes in the feature list, deleting the child nodes of the parent nodes in the two lists if the parent nodes of the nodes currently traversed are also in the feature list; after the traversal is completed, judging whether the number of all nodes in the two lists meets a node number constraint, and if yes, generating a supergraph by taking the remaining nodes in the two lists as supergraph nodes. The application can quickly generate a supergraph with good split effect.

A general-purpose modular dynamics simulation system comprises a kernel layer, a protocol layer, and a hardware layer. The kernel layer includes: a dynamics calculation module, an environment simulation module, a sensor simulation module, an actuator simulation module, and a kernel layer configuration module. The protocol layer includes: a sensor interface module, an actuator interface module, and a protocol layer configuration module. The hardware layer includes: a hardware board driver module and a hardware layer configuration module. This invention solves problems in current ground testing systems such as severe software-hardware coupling, the need to redevelop dynamics software for different satellite models, and difficulties in changing satellite model parameters and component product parameters by employing a hierarchical design approach for ground dynamics software through three-layer decoupling, modular encapsulation design, configuration via configuration files, and parameter modification via host computer commands. This improves the versatility and convenience of dynamics software development and has significant application and promotion value.

The invention discloses an automatic driving decision control method based on a hierarchical strategy network. The method comprises the following steps: collecting automatic driving core data; constructing a driving scene; the method comprises the following steps: constructing a hierarchical strategy network architecture based on a driving primitive hierarchical design and an arbiter-expert strategy cooperation mechanism; carrying out digital twin-driven training and verification on a hierarchical strategy network; and deploying the maturely trained model to a real vehicle system, and further performing fine adjustment through real vehicle data feedback. According to the method, the interpretability of a modular method and the high-performance advantage of an end-to-end method are integrated, a conventional driving scene and an extreme long-tail scene are accurately processed by means of hierarchical design of driving primitives and digital twinning simulation training, and the method is suitable for a decision control module of an automatic driving system at the level of L4 or above.

The invention relates to the technical field of configuration management databases, in particular to a service and IT resource associated configuration database system and a service desk request method. A configuration database system of a three-layer architecture is designed; a data layer adopts a unified configuration item library to store service configuration items, IT resource configuration items and association relationship data, and an association weight value and an effective time index are introduced; the association layer establishes a bidirectional association model through an association model engine, detects state change and updates the state change by using an automatic discovery module, and presents an association relationship by a topology visualization module; the application layer is provided with a business influence analysis module for calculating the influence degree, providing a priority basis for a service desk linkage module, and realizing rapid matching and scheme generation; through hierarchical design and module cooperation, deep fusion of business and IT resources and intelligent processing of service response are realized.

The invention relates to the technical field of structural design, in particular to a frequency conversion board screw design method, device and equipment and a storage medium, according to the method, screw layout coordinate information is confirmed based on constraint information and an improved genetic algorithm, a traditional empirical layout method is replaced, screw distribution better meets the mechanical property and electrical performance requirements of all functional domains, and the design efficiency is improved. The problem of unreasonable layout parameters is solved, the manual trial and error cost is reduced, a clear basis is provided for subsequent production, assembly and maintenance, and the systematic fault risk is reduced; through the hierarchical design of basic core parameter extraction and partition fastening force calculation and in combination with the correction coefficient of each functional domain, the differential requirements of vibration impact requirements of a power module area, anti-vibration performance threshold values of a control chip area and the like can be met in a targeted manner, the problem of loose connection or excessive fastening caused by insufficient specification and model matching degree is avoided, and the reliability of the power module area is improved. High-frequency signal interference can be reduced, the occurrence probability of plastic deformation of the substrate is reduced, and the long-term operation reliability of equipment is improved.

The application provides a method for cooperatively suppressing short-circuit current and subsynchronous oscillation of an offshore wind power flexible direct system, comprising the following steps: step 1, determining common parameters for wideband coupling: for the problems of short-circuit current and subsynchronous oscillation, common parameters are determined through theoretical analysis and system topological structure of an offshore wind power flexible direct receiving end power grid; step 2, constructing a dynamic damping controller containing a deep double Q network (DDQN) according to the selected common parameters and a hierarchical design method: step 3, the upper optimization layer of the DDQN-based dynamic damping controller outputs the optimal adjustment instruction of the common parameters according to the system state, the lower execution layer receives the adjustment instruction of the upper layer, obtains a new common parameter value and outputs the new common parameter value to a current inner loop controller, and the current inner loop controller generates a modulation signal to control the output of the converter. The common parameters are optimized through the design of the dynamic damping controller, and the method realizes the cooperative suppression of the short-circuit current and the subsynchronous oscillation.

The application belongs to the technical field of AI development, and particularly relates to a localized one-stop AI development platform and method, which comprises at least one first control server, multiple computing power servers and a data center level Ethernet switch. The Ethernet switch and the multiple computing power servers are located at a computing interconnection layer. The at least one first control server is located at a data access layer and is a core management layer of a business network. The application adopts a hierarchical design network architecture to solve the technical problem of how to build an AI development platform with high performance, high reliability and resource isolation capability.

The present invention discloses a method and a system for testbench replication of an assertion counterexample in hierarchical C++ high level synthesis designs, comprising: - defining a high level synthesis (HLS) design for an integrated chip wherein the design of the integrated chip is programmed as a C++ hierarchical design; - verifying the HLS design and reporting inline assertions that are added via calls to an assert function of the high level synthesis design; - using a high level verification engine to debug a falsified assertion thereby providing an executable of the C++ hierarchical design that is built with a gcc compiler along with a gdb based debugger and that is used for the replication of a counterexample to remedy the falsified assertation which is referred to as testbench; - using the counterexample of the high level verification engine to drive the debugging of the falsified assertion with input values of the counterexample that will address the debugging at ac_channel operation level; - creating a database within the testbench being pre-populated with every ac_channel's read / nb_read operations data value being calculated in the counterexample that exist in cone of the falsified property where a falsified assertion has been generated for; - during the execution of the testbench when a read / nb_read operation of an internal ac_channel is performed using the pre-populated ac_channel's read / nb_read operations data value as input value for performing a read / nb_read operation during the debugging of the falsified assertion.

The invention relates to the technical field of power system network security and operation optimization, in particular to a power system communication security active defense method fusing measurement coding and optimal disturbance deployment, which organically combines equipment deployment optimization, operation scheduling optimization and information transmission protection through hierarchical design and cross-layer coupling. And an integral defense system which can be dynamically adjusted and continuously evolved is formed. In the deployment stage, the balance between investment and defense capability is realized by emphasizing optimal site selection and hardware configuration; in the operation stage, the D-FACTS is flexibly incorporated into the optimal power flow model, and system safety and economical efficiency are both considered; in the communication layer, the robustness and continuity of attack detection are improved by means of a dynamic measurement coding mechanism; in a multi-layer cooperation mechanism, through detection result feedback and dynamic adjustment, full-life-cycle optimization iteration is realized.

Aspects of the invention include systems and methods configured to provide hierarchical circuit designs that makes use of effective metal density screens during hierarchical design rule checking (DRC) analysis. A non-limiting example computer-implemented method includes providing a first hierarchical level of a chip design. The first hierarchical level includes one or more internal shapes and at least one blockage shape having an internal structure defined at a second hierarchical level of the chip design. A tuple is assigned to the blockage shape. The tuple includes a metal layer identifier for the blockage shape, a minimum expected density for the blockage shape, and a maximum expected density for the blockage shape. The method includes determining whether a density violation exists in the first hierarchical level based in part on one or both of the minimum expected density for the blockage shape and the maximum expected density for the blockage shape.

The invention discloses an energy industry Internet unknown threat detection layered architecture design method and equipment. The method comprises the following steps: cooperatively collecting multi-source heterogeneous energy industry protocol data, obtaining a protocol document and capturing a real-time message; performing hierarchical cleaning on the data and intelligently dividing a data set; then, unknown protocol fields are complemented through Diffusion-BERT collaborative modeling, and boundaries are optimized and are subjected to hierarchical analysis; based on a self-supervised learning analysis protocol, classifying and verifying consistency; dynamically optimizing hyper-parameters and fine tuning of the model; and finally, the model is lightened and deployed to an industrial platform, protocol real-time analysis and unknown threat detection are realized, the problems of insufficient data support, poor protocol adaptation, update shutdown and difficulty in landing in the prior art are solved, and the energy industry Internet security is guaranteed.

The invention discloses a rapid migration method, device and equipment for a test structure layout based on a node common framework and a storage medium, and relates to the technical field of semiconductors, and the method comprises the following steps: loading a pre-cured common framework based on a target process node; receiving differentiated configuration parameters of different users of the same process node, replacing an input parameter set of source configuration with an input parameter set of target configuration, and selecting a corresponding layer mapping processing strategy according to whether the target configuration is associated with a target verification file or not; according to the input parameter set of the target configuration, carrying out adaptive modification on a device structure; generating a target layout based on the general framework, the adapted device structure and the selected layer mapping processing strategy, executing verification check associated with the selected layer mapping processing strategy, and finishing migration from the source configuration to the target configuration after verification is passed; based on a generality framework of the same node, rapid migration of the layout is realized through a layering design of solidifying generality and differentiation.

The invention discloses a large language model fine tuning method and a related method and system, and belongs to the field of artificial intelligence, and the method comprises the steps: obtaining a to-be-fine-tuned neural network layer and an input vector of the to-be-fine-tuned neural network layer; for the neural network layer, processing is carried out through an independent low-rank adaptation module, input vectors are divided into k groups of vectors according to dimensions, and k is an integer greater than 1; generating increment output for each group of vectors; wherein the low-rank adaptation module comprises a dimension reduction matrix and a dimension raising matrix, and parameter quantity is reduced based on grouping operation; and splicing the increment output of all the grouping vectors, and superposing the increment output with the output of the original neural network to obtain fine-tuned output. The method can be applied to the field of cryptography, and supervised fine tuning is carried out by using a cryptographic industry data set to construct a large language model special for the cryptographic industry. Through innovative grouping and hierarchical design, the number of learnable parameters in the fine tuning process is significantly reduced, and the generalization ability and robustness of the model are enhanced.

The embodiment of the invention discloses a multi-level crossbar switch, a processing cluster and a processing system. The multi-level crossbar switch in the embodiment of the invention can realize data exchange among the processing units in the processing unit group and data exchange among the processing units crossing the processing unit group. Therefore, the multi-level crossbar switch is introduced into the processing cluster, the data exchange originally needing to be realized in the global cache can be limited in the processing cluster in the embodiment of the invention, so that the access pressure of the global cache is reduced, and meanwhile, the multi-level crossbar switch is set to adopt a hierarchical design, so that the access pressure of the global cache is reduced. According to the embodiment of the invention, the bandwidth pressure which needs to be borne by the multi-level crossbar switch can be differentiated to each internal crossbar switch unit, so that the bandwidth pressure which can be borne by the interior of the processing cluster is improved, and the data exchange efficiency among the storage units in the processing cluster is improved.

The invention relates to the technical field of online testing, in particular to a wireless passive multi-parameter sensing monitoring system suitable for a rotor bearing, which comprises a multi-physical parameter acquisition module, a power supply module, different parameter conditioning circuit boards adopting hierarchical design, a central processing module with an MCU (Microprogrammed Control Unit) chip, a wireless communication module and an upper computer, analog signals of physical parameters acquired by the multi-physical-parameter acquisition module are processed into digital signals through different parameter conditioning circuit boards which are designed in a layered mode, the digital signals are transmitted into the central processing module with the MCU chip, then the digital signals are converted into electromagnetic waves through the wireless communication module and thrown into the environment, and after an upper computer receives the electromagnetic waves, the wireless communication module transmits the electromagnetic waves to the central processing module. And processing the data into required monitoring data. The problem that the running state of the rotor bearing of the small turbojet engine is difficult to monitor in real time can be effectively solved, multiple physical parameters in the running state of the rotor bearing can be effectively monitored, and new equipment and a new method are provided for monitoring requirements when the rotor bearing works.