186 results about "Hardware abstraction layer" patented technology

The invention provides a GPU computing power scheduling method based on a one-cloud multi-core heterogeneous computing power platform, and the method comprises the following steps: S1, carrying out heterogeneous resource registration and modeling, accessing hardware equipment containing multiple types of GPUs through a resource registration module, collecting the equipment model, the video memory capacity and performance index data, and carrying out heterogeneous resource modeling; constructing a resource feature database containing a topological relation, and supporting hybrid access of chips; s2, virtualized resource reconstruction: pooling a physical GPU into virtual GPU resources by adopting a hardware abstraction layer technology, realizing video memory isolation and calculation unit division through a containerization technology, and configuring each virtual GPU instance with an independent drive stack and a security sandbox; and S3, submitting a multi-modal task, receiving a CUDA / OpenCL calculation task submitted by a user, analyzing task demand parameters including a calculation core number, a video memory occupation amount and a data throughput threshold, and generating a task descriptor containing a priority label.

The embodiment of the invention provides a chip platform hardware abstraction layer construction method, which comprises the following steps: scanning chip platform hardware characteristic information, constructing a hardware characteristic analysis model, carrying out classified labeling on the hardware characteristic information to extract equipment interfaces, resource attributes and operation characteristics, establishing a characteristic vector library of hardware components, and constructing a hardware abstraction layer of the hardware components, grouping the hardware components by adopting a hierarchical clustering algorithm to form a function category tree; training an adaptive abstract model based on the function category tree, mapping hardware components with similar functions to a unified interface space, and calculating target Q value update strategy network parameters based on a time sequence difference algorithm to generate a hardware abstract rule base; loading a hardware abstraction rule base in a hardware abstraction layer engine, dynamically monitoring a resource use state, updating an allocation strategy, and returning a hardware operation result to an application layer through a uniform interface; according to the method, hardware features can be deeply understood, an intelligent interface packaging strategy is constructed, and efficient scheduling of resources is realized through technologies such as reinforcement learning.

The invention relates to a multi-type industrial equipment PLC control method and device based on a hardware abstraction layer, and the method comprises the steps: constructing the hardware abstraction layer comprising a core layer and an adaptation layer; the core layer is provided with a standardized interface set, the adaptation layer is provided with a special adaptation module, and a control protocol is converted through a protocol analysis engine. And generating a unified instruction set based on the standardized interface set, and establishing a data interaction channel supporting priority scheduling. And identifying the newly-added equipment, matching the equipment configuration library, and generating a newly-added adapter drive if the equipment configuration library fails. And acquiring a device state by using a data interaction channel, and constructing a cooperative control logic to realize linkage. Equipment load and task queues are monitored in real time, and dynamic task scheduling and grading fault processing are carried out. And when an adapter configuration updating instruction is detected, the adaptive layer thermally loads the updated drive, and unified, intelligent, efficient and stable PLC control of multiple types of industrial equipment is realized through cooperation of the core layer and the adaptive layer.

The invention relates to an implementation method and device for an EtherCAT master station system based on a non-operating system, and the method comprises the steps: achieving the adaptation of an SOEM protocol stack to a hardware abstraction layer of an EtherCAT master station through the byte order processing based on a bit mask and a staged shift strategy and the EtherCAT frame receiving and transmitting control based on annular buffer area index management; on the basis of non-real-time task priority scheduling processing of a hardware timer, main circulation driven by a single-thread event and overtime monitoring of a blocking communication synchronization mechanism in combination with the timer, adaptation of an SOEM protocol stack to an EtherCAT master station operating system abstraction layer is achieved; through network scanning and communication parameter configuration, a memory management mechanism based on CoE standard mapping and a periodic position mode of a slave station, adaptation of an EtherCAT master station application layer is realized. According to the invention, through optimization and adaptation of the SOEM protocol stack, operation-system-free and microsecond-level communication jitter of the EtherCAT master station system is realized.

The invention discloses a virtual machine computing resource dynamic allocation method and system based on a PCIe card and a storage medium, and belongs to the field of virtualization technology and hardware resource management.The method comprises the steps that the computing unit resource utilization rate of the PCIe card is monitored in real time through a hardware abstraction layer; dynamically generating a resource allocation scheme based on an improved auction algorithm, wherein the algorithm optimizes a resource quota through a time attenuation factor and a resource reuse penalty term; utilizing a programmable register remapping technology to distribute independent VF equipment for the virtual machine and establish a direct access channel; realizing interruption isolation between virtual functions through an interruption redirection controller; and during resource redistribution, atomic migration of a calculation task is completed by adopting a check point migration mechanism, and the atomic migration comprises context preloading and PCIe link layer retraining. According to the method, the problems of hardware resource distribution rigidness, insufficient isolation and migration service interruption in the prior art are solved, and fine-grained control and service lossless switching of the heterogeneous computing units are realized.

The invention provides a universal control system for a body-equipped robot and the body-equipped robot. The system comprises an elastic microkernel, a time-sensitive bus network and hardware components which are deployed in the body-equipped robot, the elastic microkernel is in communication connection with each hardware component through a time-sensitive bus network; the elastic microkernel deploys a basic industrial operating system, virtualizes a plurality of virtual domains in the industrial operating system according to an application scene of the robot with the body, and constructs a real-time communication framework based on deterministic communication middleware in the industrial operating system; the elastic microkernel is further provided with a hardware abstraction layer, a mainstream hardware instruction set is integrated in the hardware abstraction layer, and cross-platform support is provided for functional software in the virtual domain through a standardized interface. According to the method, the problems of scattered computing resources, complex communication and the like in the prior art are solved, and a highly-integrated, flexible, extensible and cross-platform compatible control scheme is provided for the robot with the body.

The invention discloses an architecture system applied to embedded system development, and relates to the field of embedded system development, and the architecture system comprises an application layer which is used for executing business logic in an embedded system and managing the configuration of the embedded system, and the application layer is developed by adopting a Lua script; the hardware abstraction layer provides a unified hardware access interface; and the virtualization interface layer is used for providing a uniform interface for the application layer, so that the application layer can access the hardware resources of the hardware abstraction layer and call the system service in the embedded system. According to the method and the device, the problem that cross-platform transplantation is difficult due to the fact that a C language direct programming mode is adopted in an embedded system in the related technology is solved.

The invention relates to the technical field of deep learning, in particular to a PyTorch framework-based compatibility expansion system, which comprises a cross-framework model converter, a heterogeneous hardware abstraction layer, a hybrid computational graph execution engine, an intelligent distributed trainer and a self-adaptive optimizer, the cross-frame model converter converts input model formats of different frames into PyTorch executable formats, the heterogeneous hardware abstraction layer supports rear ends of various hardware and automatically selects an optimal calculation path, and the hybrid calculation graph execution engine fuses dynamic graph flexibility and static subgraph optimization and supports dynamic control function execution flow. An intelligent distributed trainer automatically selects a parallel scheme and is compatible with multi-protocol communication, a self-adaptive optimizer performs dynamic optimization based on hardware characteristics and a PyTorch tensor, a cross-frame model converter supports model conversion of multiple deep learning frames, the cost of migration among different frames by a user is reduced, and the universality of the PyTorch frame is improved.

The invention relates to a flexible combined machine tool control system. The system comprises a multi-channel user interface module, a servo parameter monitoring module, a workpiece coordinate system management module and the like. The multi-channel user interface module is associated with a work station by means of a dynamic binding technology, automatically generates an interactive interface according to configuration parameters and visually configures an enabling state. And the servo parameter monitoring module displays and adjusts the shaft motion parameters in real time and adjusts the shaft motion parameters on line, the deviation is corrected through a self-adaptive algorithm, coordinate synchronization of multiple workstations is achieved through the algorithm and a batch writing function, and mixed analysis of an NC program and a user-defined instruction is supported. The hardware abstraction layer module encapsulates a heterogeneous control card interface, dynamically allocates hardware resources, and coordinates time sequence linkage of each part by using a state machine model. The system also combines visual inspection to correct cutter compensation parameters, and double safety protection is set. According to the invention, the problem of low equipment cooperation efficiency in multi-station flexible processing is effectively solved, and the system compatibility and the processing precision are improved.

The invention provides a VirtIO interface-based ubiquitous hardware equipment virtualization supporting method and system, according to a VirtIO interface standard, bottom layer physical hardware is abstracted into virtual equipment, a VirtIO virtual equipment driver is divided into a front end and a rear end, data interaction is carried out through a sharing mechanism to form a virtual hardware abstraction layer, and the virtual hardware abstraction layer is used for supporting virtual hardware. Upwards providing state information of virtual equipment and interface information of operation equipment for an application program, shielding heterogeneity of bottom-layer physical equipment, and downwards butting local and / or far-end physical equipment to carry out actual I / O operation; and calling a migration interface through the virtual hardware abstraction layer, establishing a link with a far-end virtual device driver, transmitting the state of the local virtual device to a far end, and recovering and reconstructing the virtual device by the far-end driver. According to the method, heterogeneous hardware in a ubiquitous scene can obtain more efficient resource abstraction and management, the resource utilization rate is improved, and meanwhile the resource dynamic configuration and flexible expansion capacity is provided.

Implementations are described herein for detecting deepfakes in digital media while preserving the privacy of the source computing device. In various implementations, sensor fingerprints and / or security tokens that signal software-introduced alterations, e.g., introduced by hardware abstraction layers (HALs) or virtual machines (VMs) may be utilized to detect such deepfakes. These signals may be used, separately and / or in combination, for various purposes, such as flagging digital content to a user as being a deepfake, preventing or blocking receipt and / or playback of digital content deemed to be a deepfake, allowing an end user to disable aspect(s) (e.g., layers) of digital content that are determined to be synthetic, etc.

The invention relates to the technical field of unmanned aerial vehicle control and management, in particular to an unmanned aerial vehicle parameter consistency configuration method based on template management, which adopts a structured parameter configuration template in a JSON format, comprises four blocks of metadata, parameter definition, constraint rules and digital signatures, establishes an MAVLink communication link with an unmanned aerial vehicle flight controller through a template management terminal, and provides an unmanned aerial vehicle parameter consistency configuration method. And executing an automatic configuration process based on a finite-state machine, and ensuring parameter logic consistency by using a difference comparison and constraint verification mechanism. According to the method, temporary storage, batch writing and atomic submission of parameter changes are achieved through the atomization transaction submission protocol, the integrity of the configuration process is guaranteed, the digital signature auditing log containing the timestamp, the device identifier, the template hash and the change details is generated after configuration is completed, whole-process tracing is supported, and the method is high in practicability and easy to popularize. Headless mode operation, parameter white list control and hardware abstraction layer adaptation are supported, and high automation, standardization and safety of unmanned aerial vehicle parameter configuration can be achieved.

The invention discloses a multi-machine multi-card distributed training optimization system and method oriented to a credential heterogeneous environment, and relates to the technical field of distributed training. In order to solve the defects existing in distributed training in a credential and credential heterogeneous environment, the system comprises an application layer for receiving a training task; the core system layer comprises a self-adaptive task scheduling module, a hybrid communication topological optimization module and a dynamic check point and elastic recovery control module, and the scheduling module generates a performance portrait and an optimal scheme based on a training task and adjusts the scheme according to a node fault; the optimization module executes the scheme, firstly detects node topology, constructs a hierarchical path, loads and initializes an optimal communication rear end for target equipment, and synchronizes the path to the target equipment; the control module periodically stores a complete training context and realizes reliable recovery of a training process; the credential hardware abstraction layer is used for providing a uniform interface for realizing underlying resource access and data acquisition; and the hardware resource layer comprises heterogeneous computing nodes and an RoCE network switch.

The invention relates to the technical field of optical access network equipment maintenance, and discloses a PON gateway fault self-checking method and a self-checking system, in particular to a PON gateway fault self-checking method integrating task priority scheduling, hardware abstraction layer adaptation, multi-gateway cooperative detection and intelligent reasoning diagnosis. Intelligent upgrading from single equipment detection to network-level fault positioning is realized by constructing a standardized detection instruction system, a time-space aligned cooperative detection network and a fault positioning model based on a Bayesian network.

The invention belongs to the technical field of aviation airborne system design, and provides a helicopter airborne system-oriented novel software architecture and a construction method thereof, and the architecture comprises a hardware abstraction layer, a framework resource layer, an intelligent platform service layer and an application software layer from bottom to top. And the hardware abstraction layer realizes decoupling of hardware and basic software of an operating system. The framework resource layer supports operation of a hybrid key operating system, supports and isolates tasks and application programs with different key levels, software bases and computing power requirements, and provides basic computing communication resources and AI computing power resources. The intelligent platform service layer comprises middleware, a servitization function unit and a servitization management unit, and the servitization function unit comprises atomic services and enhanced services. And the application layer interacts with the intelligent platform service layer and is decoupled from a bottom software and hardware environment. The framework is suitable for unmanned / manned helicopters, and generalization of platform support and maximum reuse of software assets are achieved.

The invention provides a vehicle camera data transmission method and device, and the method comprises the steps: responding to a vehicle-mounted system to complete the initialization configuration, generating corresponding request instruction information based on a demand event which is triggered by a target application program and is expected to obtain camera data, and transmitting the information to a hardware abstraction layer module; in response to the access permission of the target application program passing verification, encrypting the request instruction information, and sending the request instruction information to a video equipment interface to obtain camera data of a target vehicle camera; encrypting the camera data to obtain encrypted camera data, calculating a check code corresponding to the encrypted camera data, and sending the check code to a shared memory; and the target application program obtains the encrypted camera data and the check code in the shared memory, and decrypts the encrypted camera data to use the camera data. Through the method, the real-time performance, efficiency and stability of camera data transmission are improved, and the complexity of data transmission is reduced.

The invention discloses an industrial robot master control system which comprises a robot hardware abstraction layer, a real-time control algorithm plug-in layer and a non-real-time request corresponding layer, non-blocking asynchronous communication between different modules is achieved through a shared memory, and the robot hardware abstraction layer is used for shielding hardware differences generated due to different robot types. The high reusability of the robot master controller is realized; the real-time control algorithm plug-in layer is used for realizing the separation of the real-time control algorithm layer and the hardware abstraction layer and realizing the overall control of the robot; and the non-real-time request response layer is used for realizing interaction and communication capabilities of the robot and an external function module. The invention also provides a plurality of standardized system development interfaces, so that the system can form a unified development specification, a communication specification and a development mode under software and hardware decoupling. The system architecture provided by the invention is easy to realize in an industrial robot system, the mobility, compatibility and stability of software are improved through modular design, and the system architecture has relatively high applicability.

A method includes: When detecting preview requests for a plurality of cameras, a first device creates views and buffers that correspond to the plurality of cameras in a camera Android application package APK, delivers the buffers corresponding to the views to a framework FWK layer, and obtains camera data streams corresponding to the plurality of cameras from a hardware abstraction layer HAL through the FWK layer; and the first device renders the plurality of camera data streams to the corresponding buffers respectively through a layer transferring module of the FWK layer. The camera data streams of the plurality of cameras are carried and displayed by using the plurality of views, and the plurality of camera data streams are rendered to the buffers of the corresponding views through the layer transferring module, so as to implement quick preview.

The invention relates to a hybrid accelerator card management method and device, an electronic device and a storage medium, and is applied to the field of computer hardware acceleration and data storage and transmission, and the hybrid accelerator card management method comprises the following steps: determining a runtime library interface of a hybrid accelerator card in response to a received server data transmission request; registering a memory address of the hybrid acceleration card to a preset hardware abstraction layer based on a remote direct memory access technology; a unified hardware abstraction interface is preset in the hardware abstraction layer; the runtime library interface is bound with the unified hardware abstract interface; and calling the runtime library interface to execute data transmission operation between the hybrid acceleration cards through a preset hardware abstraction layer. According to the method and the device, the GPU acceleration cards of different manufacturers are compatible, and meanwhile, the effect of improving the data processing and transmission efficiency is achieved.

The invention discloses a multi-platform laser compatible control system based on an STM32 microcontroller platform. The multi-platform laser compatible control system comprises a hardware framework and a software framework. The hardware framework adopts a FreeRtos real-time operating system architecture and comprises a main control unit, a laser interface, a communication interface and a security module. And the main control unit adopts an STM32F4. The software framework comprises a hardware abstraction layer (HAL), a middleware layer, an application layer and a user interface layer. The laser control system aims at overcoming the defects of a traditional laser control system in the aspects of compatibility, safety, maintenance upgrading, operation efficiency, state monitoring and the like, is high in compatibility, high in safety, intelligent and high in efficiency, and meets the requirements of scientific research, industry and medical fields for precise control of the laser.

The invention belongs to the technical field of optical modules, and relates to an optical module based on an embedded operating system and a working method thereof, the embedded operating system is transplanted in an MCU of the optical module, and a CMIS protocol and / or a function task defined by a user are / is executed through the embedded operating system; the architecture of the optical module comprises an application layer, a kernel layer and a hardware abstraction layer, the kernel layer schedules and processes tasks defined in the application layer to control the hardware abstraction layer; and the kernel layer adopts an embedded operating system kernel, specifically, an embedded operating system is transplanted in the MCU of the optical module. An embedded operating system kernel is introduced to the optical module MCU, so that the real-time operating system support of the high-speed optical module is realized; and based on the task scheduling and priority management capability of an embedded operating system, the high real-time response capability of the optical module under the conditions of 400G, 800G and higher speed is realized.

The invention discloses an IO processing method and device, a medium and equipment, and relates to the field of virtualization, and the method comprises the steps: obtaining an IO request which is sent by an application program and aims at shared hardware equipment; after an IO frame layer of the virtual machine processes the IO request, hijacking the IO request to a hardware adaptation layer corresponding to the virtual machine, so that the hardware adaptation layer performs preset processing on the IO request to obtain a target IO request; the hardware adaptation layer sends the target IO request to a shared hardware abstraction layer, so that the shared hardware abstraction layer performs decision processing of processing opportunity on the target IO request to obtain a decision result; and under the condition that the decision result indicates that the target IO request meets the instant processing condition, the shared hardware abstraction layer sends the target IO request to a driving program corresponding to the virtual machine so as to drive shared hardware equipment to execute a read operation or a write operation indicated by the target IO request. According to the method, the processing performance of the hardware equipment in the virtualization process can be improved.

The invention provides a method for adjusting screen brightness and electronic equipment, and the method comprises the steps: obtaining a first screen-on operation in a screen-off state; in response to the first screen-on operation, acquiring a camera identifier on a hardware abstraction layer of a software system of the electronic equipment, the camera identifier being used for indicating a target camera corresponding to the ambient light detection function; in the hardware abstraction layer, a target working mode of the target camera is determined according to a preset priority, and the working mode of the target camera comprises a camera mode and an ambient light mode; and when the target working mode is determined to be the ambient light mode, starting a target camera through the hardware abstraction layer, enabling the target camera to collect ambient light parameters in the ambient light mode, and adjusting the screen brightness according to the collected ambient light parameters. According to the scheme, the corresponding interface is called in the hardware abstraction layer to determine the target working mode of the target camera, the execution time is saved, it is ensured that the ambient light parameters of the target camera are reported in time, and bright flash jump is avoided.

The invention discloses a test case editing scheme oriented to the automatic test industry, and the scheme realizes efficient editing, analysis and execution of test cases through layered architecture design. The scheme comprises the following steps: (1) dividing a test case into a measurement abstraction layer and a hardware abstraction layer; (2) in the measurement abstraction layer, constructing a test index sequence and a corresponding index operation sequence to form a test process file; (3) in the hardware abstraction layer, establishing a mapping relation between the operation keyword and the underlying instrument driver, and forming an instrument configuration file; and (4) the test process file and the instrument configuration file are converted into objectified description, so that flexible editing and automatic script conversion of the test case are realized. The method has the beneficial effects that (1) the readability and editing efficiency of the test case are improved, and the workload of manual script conversion is reduced; (2) the generalization ability of the test scheme is enhanced, and the method is suitable for various test devices and test scenes; and (3) flexible configuration and efficient reuse of test resources are realized through a layered architecture and a standardized file format.

The invention discloses a low-coupling real-time robot control software system, which comprises a core control module which adopts a layered architecture design and comprises a hardware abstraction layer, a middleware layer and an application layer; the real-time communication module is used for constructing an internal communication network based on a high-speed real-time Ethernet protocol; the intelligent task scheduling module is used for distributing and scheduling tasks by applying a dynamic programming algorithm in combination with a priority queue; the man-machine interaction module supports multi-mode interaction including voice recognition, gesture control and touch screen operation; the motion control module is responsible for accurately controlling the robot through kinematics and dynamical models according to the instruction of the task scheduling module; and the exception handling and diagnosis module is used for monitoring the running state of the system. Modular design of the robot control system is achieved, expansibility, maintainability and real-time performance of the system are improved, and the robot control system can be flexibly applied to different hardware platforms.

The invention relates to the technical field of computers, and discloses a multi-FPGA collaborative deep neural network parallel acceleration method. According to the method, unified compiling and automatic calculation graph segmentation mapping based on a dynamic programming algorithm are carried out on a deep neural network model through a host control node, a heterogeneous strategy fusing data, the model and assembly line parallel is generated, and the problems of single FPGA computing power resource limitation and memory wall are effectively solved; direct communication between the FPGAs is achieved through a high-speed point-to-point internet, an asynchronous assembly line execution mechanism and a hardware-level data packaging technology are combined, communication delay is reduced, assembly line bubbles are eliminated, and a multi-FPGA cluster reaches a near-linear speed-up ratio; computing distribution is optimized in real time through a global load balancing unit, and the equipment utilization rate is increased; and meanwhile, a transparent deployment interface is provided through the hardware abstraction layer, so that the super-large-scale neural network can efficiently run on a multi-FPGA platform with low delay, and the overall calculation efficiency is improved.

The invention discloses a frame rate control method and device, equipment, a storage medium and a computer program product, and the method comprises the steps that an application layer responds to a first operation of shooting control, and issues a first instruction for triggering frame rate adjustment to a hardware abstraction layer; and the hardware abstraction layer responds to the first instruction, notifies a driving layer to perform register configuration of the image sensor, and configures the frame rate of the image sensor as a first frame rate.

The invention is suitable for the technical field of computer system starting, and provides an OpenSBI starting method and system of an RISC-V SoC based on an FPGA, the system comprises a hardware abstraction layer, a boot loading layer, a privilege management layer and a kernel execution layer, and each layer realizes data interaction and process connection through a standardized interface; through the hierarchical design of FPGA hardware initialization, SPL / U-Boot firmware loading, OpenSBI privileged mode configuration and kernel startup, modular management of a startup process is realized, the system coupling degree is reduced, multiple storage medium and operating system types are supported, hardware abstraction is realized through an OpenSBI standard interface, subsequent extension of new peripherals or upgrading of an RISC-V architecture version is facilitated, and the development of the RISC-V architecture is facilitated. The standardized starting process reduces the adaptation workload of hardware and firmware, and debugging and rapid iterative development are facilitated.

There is provided a gaming input provider (500) for an automotive operation system, AOS, system (100), which operates according to an AOS, the AOS including a AOS standard gaming input application programming interfaces, APIs, block (502) requiring, in input, a gaming input signal (512) of a pre-defined format and providing, to a higher layer gaming engine (204), a standardized version of the gaming input signal (212) of the pre-defined format, the gaming communication controller comprising: a communication service (102) to wirelessly receive a gaming input signal (302) from a mobile device (300); a hardware abstraction layer, HAL, block (202) to convert the gaming input signal (302, 112) onto the pre-defined format.

The application relates to the technical field of industrial measurement and control software, and discloses a nationwide state-oriented measurement and control platform which adopts a layered architecture and comprises the following: an application service layer for providing a man-machine interactive interface and executing business logic; a unified business message layer for providing a standardized data communication interface; a multithreaded time sequence scheduling engine for parallel receiving, scheduling and processing real-time tasks; a unified hardware abstraction layer for encapsulating the differences of different field bus drivers and providing a unified device operation interface; a domestication adaptation layer constructed on a Qt core framework and used for providing a unified driving abstraction across domestic chips and operating systems; and a hardware access layer for directly interacting with physical hardware devices.The application realizes 'one-time development and cross-domestic platform deployment', significantly improves the real-time performance, maintainability and expandability of the system under the domestic ecological environment, and meets the dual requirements of self-controllability and high performance.