45 results about "FeiTeng" patented technology

The invention discloses an industrial PCB cooperative control method based on open-source and Feiteng CPUs, particularly relates to the technical field of industrial automatic production line control, and is used for solving the problem that a quality control instruction and a board card physical flow in an existing PCB production line are difficult to accurately synchronize, so that an adjustment instruction is lagged or mistakenly acted. A unique identifier is generated for each printed circuit board, the position of each printed circuit board is tracked in real time, and when a board card enters a synchronous control area, a Feiteng CPU obtains the state of each execution device; selecting a data query strategy based on state consistency, and collecting node state feedback and quality data; according to the method, the consensus convergence rate and the phase-frequency characteristic distortion index of the system are calculated, the triggering time point of a control instruction is dynamically adjusted when the index is abnormal, and a correction instruction is sent to execution equipment through an open source gap distributed soft bus, so that high-precision cooperative control of the instruction and board card flow is realized, and the real-time performance and reliability of closed-loop quality control are improved.

The invention discloses an MAC (Media Access Control) address configuration method, which is applied to a Feiteng processor platform, and the Feiteng processor platform comprises a Feiteng processor, an EEPROM (Electrically Erasable Programmable Read-Only Memory) and UEFI firmware. The method comprises the following steps: writing a target MAC address into a specific storage position of an EEPROM; and the UEFI firmware reads the MAC address from the specific storage position of the EEPROM in the DXE stage, and writes the MAC address into the MAC address register of the Feiteng processor network controller. According to the invention, the persistent configuration of the MAC address can be realized.

The invention relates to the technical field of block chain technology and education data management, and discloses an education data management system and method based on a block chain, and the method comprises the steps: constructing an education business field specific language, and training an education business intention understanding model; applying a constraint solving algorithm to solve the smart contract parameters meeting various constraint conditions, and generating a smart contract code meeting multi-objective optimization; performing multi-level formalized verification on the generated intelligent contract code; constructing an educational policy and regulation knowledge base and calculating a contract policy compliance score; implementing a hierarchical transition strategy; the system is constructed based on a domestic Feiteng processor and a Kylin operating system, and stable operation and data security in an extreme environment are ensured; the technical problems of difficulty in intelligent contract development, difficulty in policy compliance evaluation and complexity in contract evolution upgrading in education data management are solved, and reliable storage, safe sharing and effective management of education data are realized.

The invention belongs to the technical field of intelligent management and control of indirect cooling and air cooling systems, and discloses a localized adaptive indirect cooling and air cooling intelligent management and control integrated system. Comprising a localized hardware platform, a localized software platform, a mobile robot subsystem, an infrared temperature measurement and intelligent detection subsystem, an intelligent treatment subsystem, an upper and lower double-drive control subsystem, a flexible drag chain subsystem and an intelligent management and control centralized control center subsystem. The domestic hardware platform adopts domestic mainstream CPUs (Central Processing Unit), including Peng, Haiguang, Feiteng, Loongson, Mega-Core and SW, the dominant frequency is not lower than 2.3 GHz, the number of cores is not less than 4, and comprehensive domestic adaptation is realized: the domestic mainstream CPUs, electrical equipment and sensors are adopted in hardware of the system, and a domestic operating system, a database and middleware are adopted in software of the system; comprehensive localization adaptation from a bottom layer to an application layer is achieved, dependence on imported technologies is reduced, data safety and system stability are guaranteed, and national information and credential requirements are met.

The utility model discloses a double-guide-rail type multi-extension server based on a Feiteng D2000 platform. The double-guide-rail type multi-extension server comprises a box body, a mainboard, an upper-layer extension module, a lower-layer extension module, a first guide rail assembly, a second guide rail assembly, a hard disk and a power supply, the first guide rail assembly comprises a first guide rail and a first bracket, the first guide rail is connected with equipment, the first bracket is arranged on the box body, and the first bracket is connected to the first guide rail in a front-back sliding mode; the second guide rail assembly comprises a second guide rail and a second bracket, the second guide rail is arranged in the box body, the second bracket is connected to the second guide rail in a front-back sliding mode, and the lower-layer expansion module is arranged on the second bracket; thus, the first guide rail assembly is utilized to enable the box body to be arranged on the equipment in a pluggable mode, and the second guide rail assembly is matched to achieve the effect that the lower-layer expansion module is arranged on the box body in a pluggable mode, so that disassembly and assembly of the upper-layer expansion module and the lower-layer expansion module on the box body are facilitated, follow-up maintenance and replacement are facilitated, the working efficiency of a server is improved, and the application range is wide.

The utility model provides a cooling fan automatic control circuit used for a domestic Feiteng CPU, which comprises a cooling fan speed regulation main control circuit and a cooling fan driving circuit, a temperature sensor and a fan speed regulation communication support module are arranged in the domestic Feiteng CPU, an input end of the cooling fan speed regulation main control circuit is connected with the temperature sensor, and an output end of the cooling fan speed regulation main control circuit is connected with the fan speed regulation communication support module. The cooling fan speed regulation main control circuit is in communication connection with the fan speed regulation communication support module, the cooling fan speed regulation main control circuit is connected with the cooling fan driving circuit, and the output end of the cooling fan driving circuit is connected with the CPU cooling fan. The cooling fan speed regulation main control circuit can control the cooling fan driving circuit to adjust the rotating speed of the CPU cooling fan according to temperature information fed back by the temperature sensor and temperature control curve information provided by the fan speed regulation communication support module. The utility model has the beneficial effects that the temperature of the CPU can be acquired in real time and the running speed of the cooling fan can be adjusted.

The utility model discloses a 3U CPCI (Compact Peripheral Component Interconnect) blade computer mainboard based on a Feiteng processor, which comprises a CPCI mainboard, and cutting structures are arranged at the edges of PCB (Printed Circuit Board) guide rails on two sides of the CPCI mainboard; when the CPCI mainboard is used as an air cooling mainboard, the PCB guide rail edges on the two sides of the CPCI mainboard are in sliding fit with the air cooling case track; when the main board is used as a cold conduction main board, the main board is matched with the fixed installation mode of a cold conduction case by removing the PCB guide rail edges. According to the CPCI mainboard, the cutting structures are arranged on the edges of the PCB guide rails on the two sides of the CPCI mainboard, so that the CPCI mainboard can be flexibly matched with different types of cases; no matter a 4HP air cooling case or a cold conduction case, seamless installation and compatibility can be achieved through a corresponding cutting structure, the adaptability and universality of the mainboard are remarkably improved, and application scenes with different heat dissipation requirements are met.

The invention discloses a multi-task modular hierarchical regulation and control system based on a multi-core CPU architecture, which relates to the technical field of power generation control, and comprises a domestic multi-core CPU hardware basic module adopting a Feiteng or Peng architecture, a triple modular redundancy design and a 24-bit AD signal acquisition module based on a domestic operating system; the multi-task hierarchical scheduling core module is used for five-level priority division, a core binding and dynamic migration strategy and an improved round-robin algorithm; the modular function adaptation interface module supports hot plug, parameter self-matching and dual-path redundancy switching; the running state monitoring and feedback module is used for evaluating the health state in a weighted fusion manner; and an open development support module, dual-mode configuration and an encapsulation algorithm support third-party development and version management. According to the method, DCS autonomous controllability and efficient and balanced multi-task scheduling are realized, the operation monitoring and operation and maintenance intelligent level is improved, and safe and efficient operation of a unit is guaranteed.

According to the application, a computer power management control system and method based on FT2000 processor are provided, which comprises: a computer power management control module: based on FT2000 notebook, according to the requirement of different states of the computer to the power, the power-on and power-off timing of each power supply is controlled by domestic CPLD, so as to realize the computer power management control; a charging and temperature control module: communicating with the single-chip microcomputer, CPLD and FT2000 through IIC interface, so as to realize the battery charging management function, notebook temperature detection and heat dissipation function.

The utility model relates to control management module technical field, concretely relates to a 3UVPX control management module based on Feiteng E2000S, this module takes Feiteng tenglong E2000S CPU as the core, adopts specific package form, possesses advanced characteristic and rich integration function. Network design adopts WX1860AL4 and XPHY0111QFIGR combination, realizes gigabit ethernet interface function. Through leading out two way I2C as IPMB, combine chassis management unit ChMC and board card management unit IPMC, follow IPMI2.0 agreement, realize the collection and control to each module state information in chassis. The module high integration, the performance is superior, can effectively satisfy the multiple needs of rugged chassis management.

The invention discloses a satellite-borne computer device based on a D2000V processor, and belongs to the technical field of satellites. Comprising a processor module, a control module, a storage module, a power module and an external interface module. The processor module adopts a Feiteng D2000V processor to form a minimum hardware system for CPU (Central Processing Unit) operation of the processor; the control module adopts an anti-fuse type or Flash type FPGA (Field Programmable Gate Array) to realize a control management function, and mainly comprises health management functions such as remote control and telemetering information processing, program reconstruction management function, storage channel selection, CPU (Central Processing Unit) start control, CPU on-orbit operation state management, fault diagnosis and the like; the storage module realizes a program storage function of the processor and adopts a multi-redundancy physical backup form, the power supply module realizes input power supply conversion and provides a basic power supply function for the spaceborne computer device, and the external interface module realizes external information interaction of the spaceborne computer device. The reconstruction scheme is flexible, the integration level is high, external interfaces are rich, the space environment adaptability is high, and various satellite processing load requirements are met.

The invention discloses a multi-type data high-speed interaction method based on Feiteng D2000 and an FPGA (Field Programmable Gate Array), which comprises the following steps of: acquiring the total number of FPGA chips on a PCI (Peripheral Component Interconnect) bus under an operating system directory, traversing all the FPGA chips to finish initialization, performing partition processing on DDR (Double Data Rate) mounted on each FPGA, performing address mapping on a Bar space, storing flag bit information related to uplink and downlink data, and storing the flag bit information related to the uplink and downlink data. The application program creates a thread polling Bar space flag bit to obtain a data updating state, the number and the position of unread data are obtained through calculation, and a driving function is called to read the data and forward the data. The data sending step comprises the steps of mapping according to a destination chip name to obtain an equipment descriptor, packaging a message header, judging whether to carry out zero filling operation or not to obtain final sending data, and subpackaging and calling a driving function to send the data according to an agreed fixed byte. Therefore, the purpose of multi-type data high-speed interaction between the Feiteng D2000 and the FPGA is achieved.

The application discloses a dual-time system communication method and system based on a Feiteng Kirin platform and a CPLD, and the dual-time system communication method comprises the following steps: acquiring a generation source of a time system source; judging the type of the time system source according to the acquired generation source of the time system source; and controlling the CPLD by the CPU in the corresponding time system source mode according to the judged type of the time system source, so as to realize the control of the time system source. The dual-time system communication method and system based on the Feiteng Kirin platform and the CPLD have the advantages that the CPU and the CPLD are adopted, the manufacturing cost is low, the occupied space is small, the degree of intelligence is high, and the user is convenient to use.

The embodiment of the invention discloses a resolution adaptation method and device based on Feiteng E2000 external equipment, a terminal and a medium, and the method comprises the steps: obtaining a resolution list of the external HDMI equipment when a Feiteng E2000 notebook computer is externally connected with the HDMI equipment; judging whether the resolution supported by the Feiteng E2000 notebook computer is matched with the resolution of the external HDMI equipment or not; if not, adding a virtual resolution parameter adaptive to the external HDMI device in a GPU drive of the Feiteng E2000 notebook computer; initializing GPU display output configuration to enable the GPU to process display data according to the virtual resolution parameter; and transmitting the processed display data to the external HDMI interface through a transmission channel of the external HDMI equipment. And therefore, the external HDMI equipment can normally display according to the resolution of the external HDMI equipment.

The application provides a system, method and device for clearing CMOS settings on a domestic Feiteng platform, belonging to the technical field of CMOS setting clearing, and the system comprises an MCU, a BMC, a CPU, a first Flash chip, a second Flash chip, a button cell and a server mainboard power supply; the CPU is connected with a first chip selection switch, and the first chip selection switch is connected with the first Flash chip, the second Flash chip and the MCU; the BMC is connected with a second chip selection switch, and the second chip selection switch is connected with the first Flash chip and the second Flash chip; the MCU is connected with the button cell, the server mainboard power supply and the BMC, and the MCU is further connected with a power-on button and a short-circuit PIN. In the case of AC power failure, the application restores the factory settings of the BIOS firmware through the backup Flash chip, reduces the risk of human operation, reduces the loss, and improves the maintenance convenience.

The invention relates to a miniaturized low-power-consumption processor board, and belongs to the technical field of signal processing systems. The processor board takes Feiteng D2000 / 8 as a core, and can realize functions of display, control, storage, external data interface and the like; and the processor board comprises a Feiteng D2000 / 8 processor, a Feiteng bridge chip X100, a BMC (Baseboard Management Controller) and onboard DDR4 particles. The Feiteng CPU, the memory, the network, the serial port and other chips are integrated, more interfaces are reserved on the mainboard, the functions of display, control, storage, external data transmission and the like can be achieved, and the performance requirements in complex application scenes can be met.

The invention discloses a detection device and method for a Feiteng S5000C processor, a complete intelligent detection system is constructed by integrating a processor clamp, a voltage and current detection module, a temperature monitoring module, an MCU control module and a man-machine interaction module, and real-time data acquisition, multi-dimensional performance evaluation and intelligent grading judgment algorithms are adopted. Accurate testing and automatic grading of the power consumption characteristic and the temperature tolerance of the Feiteng S5000C processor are achieved. The detection device provides an intuitive man-machine interaction interface, and breaks through the limitation that a traditional detection scheme depends on PC terminal control, lacks field real-time display and is prone to errors in manual recording.

The utility model discloses a computer mainboard based on a Feiteng-sharp D3000 processor, and relates to the technical field of embedded systems, the computer mainboard based on the Feiteng-sharp D3000 processor comprises a PCB circuit board, the PCB circuit board is provided with the Feiteng-sharp D3000 processor, a memory module, a CPLD module, a storage module, a network interface module, a power supply module and a resource expansion module; and the Feiteng Tengsharp D3000 processor is electrically connected with the memory module, the CPLD module, the storage module, the network interface module, the power supply module and the resource expansion module. The computer mainboard has the advantages that the autonomous safety control and safety credibility of the computer mainboard are improved, and then potential safety hazards in the aspects of technical risks and maintenance controllability are reduced to a certain extent when the computer mainboard is used.

The application provides a compatible method, system and medium of a multi-voltage adapter based on Feiteng D3000, first, according to first voltage information input by the adapter, a first switch control signal is generated based on preset voltage threshold comparison logic, then, according to the first switch control signal, a corresponding power supply path is turned on to obtain second voltage information, wherein, for the second power supply path, a first voltage regulating parameter is configured based on preset voltage regulating logic to obtain the second voltage information, and finally, according to the second voltage information, first confidence information is obtained based on preset confidence setting logic to judge whether a redundant protection mechanism is triggered. Through voltage detection and logic decision, the application solves the compatibility problem of the product, and through dynamic voltage regulation and redundant protection, multiple protections are formed to improve the reliability and safety of the product.

The invention relates to a dual-redundancy KVM computer based on a Feiteng platform and a switching control method of the dual-redundancy KVM computer. The dual-redundancy KVM computer comprises a mainboard module A, a mainboard module B, a management module, a KVM switching module and a power module, the management module is respectively connected with the main control module A, the main control module B and the KVM switching module, and is responsible for recording the working states of the main board module A and the main board module B, reporting fault information and sending a switching instruction to the KVM switching module; the KVM switching module is connected with the main board module A and the main board module B, and is responsible for receiving HDMI and USB signals output by the double main boards, and performing either-or switching of multiple paths of HDMI and USB signals according to a key signal or a management module instruction message; and the KVM switching module is also connected with external equipment, so that the dual-redundancy computer can provide four paths of HDMI (High Definition Multimedia Interface) display signals and six paths of USB (Universal Serial Bus) interface signals to the outside. The working efficiency of the multi-computer integrated system can be improved.

The utility model discloses a multi -functional integrated machine based on the processor of flying, including fuselage and camera module, the fuselage inside is provided with mainboard and expansion board, expansion board is connected with mainboard electricity, be provided with flying processor on mainboard, mainboard and expansion board all are provided with a plurality of external interfaces, the fuselage and camera module detachable connection. The utility model discloses in the mainboard outside additional setting expansion board, has increased the external interface, and more USB, multi -serial port can connect more equipment, and the fuselage and camera module detachable connection can be according to different scene and customer requirement, and the convenient quick selection and allocation camera.

The utility model discloses a storage control blade based on FT2000 + / 64, which comprises a processor unit, and the processor unit is electrically connected with a bridge piece unit, a BMC health management unit, a 10-gigabit network card unit, a gigabit network card unit, a CPLD unit, an IPMB interface unit, a clock unit, a hot plug unit and a power rail. The BMC health management unit is electrically connected with the IPMB interface unit; the clock unit and the hot plug unit are electrically connected with the power rail. A domestic Feiteng FT2000 + / 64 core processor is used as a core, front-end data comprehensive processing is completed, and operation resource support is provided for achieving functions of task management, system management, data fusion, comprehensive detection, comprehensive identification and the like. In addition, a Feiteng X100 bridge chip is adopted, and the system has the advantages of being high in universality, flexible in expansion, low in power consumption and the like. The application requirements of various markets can be met, the method can be widely applied to the market fields of desktops / portable terminals, servers, embedded type and the like, and the product competitiveness is effectively improved.

The invention is suitable for the technical field of computers, and provides a BIOS starting method based on a Feiteng platform, the Feiteng platform comprises a Feiteng CPU, a CPLD, a first flash memory, a second flash memory, an MCU and a third flash memory, and the method comprises the steps that when loading of contents of the three flash memories fails to start the BIOS, the CPLD is disconnected with the Feiteng CPU and connected with the MCU; the MCU updates the content of the third flash memory according to the indication of the CPLD; after the updating is successful, the CPLD is disconnected with the MCU and is connected with the Feiteng CPU; and the CPLD controls the Feiteng CPU to load the content of the third flash memory to start the BIOS. According to the application, the backup flash memory can be updated through the MCU, so that the flash memory is prevented from being updated by using a hardware means, and a board card is further prevented from being damaged due to disassembly of the flash memory.

The invention relates to a nationwide BMC design method based on Tenglong E2000S on a 6U board card, and belongs to the technical field of computers. The BMC comprises a Feiteng E2000S processor, an LPDDR4X, a display module, an active crystal oscillator, a firmware Flash, a temperature acquisition module, a voltage acquisition module, an RTC clock module, a power-on reset module, a KVM switching module, an ADC acquisition module and a power supply module. According to the invention, nationwide production is realized from the scheme, complex monitoring requirements in practical application are met, and board card operation state monitoring and stability can be effectively improved.

The invention discloses an IIC bus hanging repair method based on a Feiteng 20004 processor, and belongs to the technical field of communication. The method solves the problem of hanging of the IIC bus caused by abnormal communication through software configuration and comprises the following steps: firstly, multiplexing a pin corresponding to a serial data bus SDA into a GPIO function and setting the pin into an output mode, then writing 0 into a data register to force the SDA to output a low level so as to simulate a slave equipment response signal, and finally, re-initializing an IIC module to recover communication. According to the method, hardware does not need to be changed, the bus stability and the equipment operation reliability are effectively improved, and the method is suitable for an IIC communication system of a Feiteng 20004 processor.

The invention discloses a PCIE (Peripheral Component Interface Express)-to-EMMC (Embedded Multi Media Card) bridging method based on a Feiteng D2000 + FPGA (Field Programmable Gate Array) architecture. The method comprises a bridging connection step: connecting a Feiteng processor D2000 and an FPGA, and connecting the FPGA and an EMMC storage chip; the bridging operation step comprises the following steps of: 1, electrifying a Feiteng processor D2000, an FPGA (Field Programmable Gate Array) and an EMMC (Embedded Multi Media Card) storage chip; step 2, after the FPGA is loaded, keeping resetting the Feiteng processor D2000; step 3, resetting the EMMC storage chip by using an FPGA (Field Programmable Gate Array), and initializing the EMMC storage chip; 4, judging whether initialization of the EMMC storage chip is successful or not; if not, the FPGA is used for resetting and initializing the EMMC storage chip again; if the mapping is successful, the FPGA maps the address space of the EMMC storage chip to the function register space of the PCIE IP core through the AXI bus; step 5, the FPGA releases the reset of the Feiteng processor D2000; 6, after the Feiteng processor D2000 loads the program, PCIE enumeration operation is carried out, and address space is distributed to the FPGA end equipment.

The invention relates to a micro unmanned aerial vehicle target detection method based on computational energy 1684x and a YOLOv11 algorithm, and belongs to the technical field of unmanned aerial vehicles. According to the method, a PyTorch framework is adopted to train a YOLOv11 algorithm on an accelerator card by using an unmanned aerial vehicle data set; the trained weight pt file is converted into a bmodel capable of running on a computing energy 1684x accelerator card; a processor adopted by the model reasoning hardware environment is a Feiteng CPU, and a necessary toolkit is installed for realizing reasoning deployment of the YOLOv11 model on a ''Feiteng CPU + energy computing NPU'' platform; and then model reasoning is carried out. According to the invention, a new model YOLOv11 is adapted to a domestic platform for the first time, and real-time detection of the micro unmanned aerial vehicle is realized by adopting the YOLOv11 model.

The utility model relates to the technical field of computers, in particular to an AI accelerator card performance optimization device and electronic equipment. The acceleration card is applied to a Feiteng platform and comprises a CPU, a first bridge, a second bridge, a first acceleration card module and a second acceleration card module, one end of the CPU is connected with a first end of the first bridge, a second end of the first bridge is connected with one end of the first acceleration card module, and the first bridge is used for realizing communication between the CPU and the first acceleration card module through the first bridge; the third end of the first bridge is connected with one end of the second bridge, the other end of the second bridge is connected with one end of the second acceleration card module, and the first bridge and the second bridge are connected in series, so that communication between the CPU and the second acceleration card module is achieved. According to the invention, the data transmission rate can be improved, and the data transmission delay can be reduced, so that the requirements of high-performance calculation on data bandwidth and transmission efficiency are met.

The invention discloses a 5G protocol stack adaptation method and device based on a Feiteng platform, and the method comprises the steps: building an operation environment of a target protocol stack on a target platform based on an ARM64 architecture; adaptive reconstruction based on an ARM instruction set is carried out on the target protocol stack; calling a calculation library of the target platform to replace a standard C library function, and performing hardware acceleration on a calculation-intensive module in the target protocol stack; deploying a data plane acceleration framework in a user mode to perform network optimization on the target protocol stack; the data plane acceleration framework realizes direct connection between a network card and a user mode through a VFIO mechanism; and operating the base station protocol stack and the user terminal protocol stack based on the target protocol stack subjected to adaptive reconstruction, hardware acceleration and network optimization so as to establish a 5G communication link. The deployment and communication capabilities of the protocol stack on the Feiteng architecture platform are realized, the compatibility problem in the architecture migration process is solved, and a complete technical solution is provided for autonomous controllability of a localized 5G network.

The application discloses a programmable watchdog and timer logic IP design method for a Feiteng processor, a watchdog timeout time register is designed in the watchdog logic IP, a watchdog reset logic carries out internal counting according to the set time, combines the state of a watchdog feeding signal and a watchdog enable signal, and outputs a watchdog reset signal when the counter reaches the value corresponding to the timeout time, so that the programmability of the watchdog timeout time is realized. The timer logic IP realizes the counting control of the programmable timer by instantiating a timer period, a timer emptying and a timer starting register, and outputs an external interrupt to the domestic Feiteng processor after the counter reaches the set value. The application effectively expands the timer resource of the domestic embedded system based on the Feiteng processor.