Feiteng FT2000 main control computer and power-on self-starting circuit

Abstract

The utility model discloses a Feiteng FT2000 main control computer and power-on self-starting circuit, the power-on self-starting circuit includes RC circuit, Schmitt trigger and MOS switch, the RC circuit includes first RC circuit and second RC circuit that are connected in parallel, the first RC circuit includes first resistor and first capacitor that are connected in series, and the second RC circuit includes second resistor and second capacitor that are connected in series. The first RC circuit comprises a first resistor and a first capacitor which are connected in series, the second RC circuit comprises a second resistor and a second capacitor which are connected in series, the Schmitt triggers comprise a first Schmitt trigger and a second Schmitt trigger, the MOS switches comprise a first MOS switch and a second MOS switch, and the first Schmitt trigger and the second Schmitt trigger are respectively connected in series to the first RC circuit and the second RC circuit. The first MOS switch is connected to the second RC circuit in series, the second MOS switch is connected between the RC circuit and a PWRBTNEN pin of the FT2000 processor in series, the resistance value of the first resistor is larger than that of the second resistor, and the design cost of the self-starting circuit can be greatly saved.

Description

Technical Field

[0001] The utility model relates to the field of computer hardware, in particular to a Feiteng FT2000 main control computer and a power-on self-starting circuit. Background Art

[0002] With the rapid development of Internet technology, the localization rate of computer processors is also gradually increasing. Feiteng FT2000 processor, as the mainstream domestic computing unit at this stage, is widely used in various main control computer systems. In computer systems such as data centers, industrial control, scientific research computing, etc., the system needs to have a power-on self-start function that responds quickly to power-on to adapt to the corresponding application scenario requirements. However, most of the Feiteng FT2000 main control computer systems in the existing technology rely on manual power-on actions and cannot meet the power-on self-start function. A small number of Feiteng FT2000 main control computer systems can achieve the power-on self-start requirement by adopting a combination of MCU (microcontroller) and CPLD (programmable logic device) and need to design complex circuits. Due to the high cost of these chips, the manufacturing cost of the computer system will be increased, and the complex circuit will also increase the technical difficulty and maintenance difficulty of the design. In view of this, the present utility model is proposed. Utility Model Content

[0003] In order to solve the problems of high power-on self-starting design cost and complex circuit of the existing Feiteng FT2000 main control computer system, the utility model provides a Feiteng FT2000 main control computer and a power-on self-starting circuit.

[0004] To solve the above technical problems, the utility model provides a power-on self-starting circuit, the power-on self-starting circuit comprising an RC circuit, a Schmitt trigger, and a MOS switch. The RC circuit comprises a first RC circuit and a second RC circuit connected in parallel. The first RC circuit comprises a first resistor and a first capacitor connected in series. The second RC circuit comprises a second resistor and a second capacitor connected in series. The Schmitt trigger comprises a first Schmitt trigger and a second Schmitt trigger. The MOS switch comprises a first MOS switch and a second MOS switch. The first Schmitt trigger and the second Schmitt trigger are connected in series to the first RC circuit and the second RC circuit, respectively. The first MOS switch is connected in series to the second RC circuit. The second MOS switch is connected in series between the RC circuit and the PWR_BTN_EN pin of the FT2000 processor. The resistance value of the first resistor is greater than the resistance value of the second resistor.

[0005] In an embodiment of the present invention, the first resistance value is 698 kΩ, and the second resistance value is 499 kΩ.

[0006] In an embodiment of the present invention, the capacitance values of the first capacitor and the second capacitor are equal.

[0007] In an embodiment of the present invention, the capacitance values of the first capacitor and the second capacitor are both 2.2 μF, and are used to form an RC circuit with a resistor to generate charging and discharging delays.

[0008] In the embodiment of the present invention, the first Schmitt trigger and the second Schmitt trigger are both 74LS14.

[0009] In the embodiment of the present invention, the first MOS switch and the second MOS switch are both of the model M2N7000. They are used to construct a NOT gate circuit to control the level of the PWR_BTN_EN pin.

[0010] In an embodiment of the present invention, the power-on self-starting circuit further includes an input power supply, and the input voltage of the input power supply is 3.3V.

[0011] In an embodiment of the present invention, the power-on self-starting circuit further includes a fourth resistor and a fifth resistor, the fourth resistor being connected in series between the input power supply and the PWR_BTN_EN pin of the FT2000 processor, and the fifth resistor being connected in series to the first RC circuit.

[0012] In an embodiment of the present invention, the resistance value of the fourth resistor is 10 kΩ, and the resistance value of the fifth resistor is 100 kΩ.

[0013] In order to solve the problems in the prior art, the utility model further provides a Feiteng FT2000 main control computer, which comprises a computer body and the above-mentioned power-on self-starting circuit.

[0014] Compared with the prior art, the beneficial effects of the present invention are:

[0015] By designing two groups of RC circuits and setting a first resistor and a second resistor with different resistance values in the two groups of RC circuits, the levels of the two RC circuits are flipped successively under the action of their respective Schmitt triggers, and the level signal of the PWR_BTN_EN pin is controlled in a NOT gate circuit composed of two MOS tubes, so that the computer generates a power-on pulse signal, thereby meeting the power-on self-starting application scenario requirements of a main control computer composed of an FT2000 processor, eliminating the need for expensive control chips and complex circuits, and saving design costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The accompanying drawings are used to provide a further understanding of the embodiments of the present invention and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the embodiments of the present invention, but do not constitute a limitation of the embodiments of the present invention. In the accompanying drawings:

[0017] Figure 1 This is a manual startup circuit diagram of the FT2000 processor in the prior art;

[0018] Figure 2 This is the power-on pulse signal diagram of the FT2000 processor;

[0019] Figure 3 This is a power-on self-starting circuit diagram of the FT2000 processor in the prior art;

[0020] Figure 4 This is another circuit diagram of the FT2000 processor in the prior art;

[0021] Figure 5 This is a circuit diagram of the power-on self-starting circuit of the utility model;

[0022] Figure 6 It is a waveform diagram of the first RC circuit and the second RC circuit in the power-on self-starting circuit of the utility model;

[0023] Figure 7 This is a flip waveform diagram of the first RC circuit and the second RC circuit in the power-on self-starting circuit of the utility model;

[0024] Figure 8 It is a waveform diagram of the startup pulse in the power-on self-starting circuit of the utility model. DETAILED DESCRIPTION

[0025] The following is a detailed description of the specific embodiments of the present invention in conjunction with the accompanying drawings. It should be understood that the specific embodiments described herein are only used to illustrate and explain the present invention and are not intended to limit the present invention.

[0026] See also Figure 1 , Figure 1 This is the manual startup circuit diagram of the FT2000 processor in the prior art. Figure 2 This is a diagram of the power-on pulse signal of the FT2000 processor. In this prior art, when the device is turned on, the user needs to press the button switch S1 to generate a power-on pulse signal. After the main chip of the FT2000 processor detects the power-on pulse signal, it switches the power state from S5 to S0, realizing the normal startup of the main control computer.

[0027] In the above embodiment, the S5 state is: when the host computer is powered on, the FT2000 CPU is in a low power consumption state, only the power management part of the CPU chip is working, and other peripherals are in a power-off state. The S0 state is: all peripherals of the host computer are powered on and the peripherals are working normally.

[0028] In the prior art, the FT2000 processor needs to be powered on manually by pressing a switch to enable the computer to start up normally, and the automatic startup function after power-on cannot be achieved. Therefore, a power-on self-starting circuit combining MCU and CPLD has gradually evolved.

[0029] See also Figure 3 , Figure 3 This is a circuit diagram of the FT2000 processor in the prior art. In this prior art, when the device is turned on, the MCU or CPLD is used to control the CMOS switch to achieve control of the main power circuit, thereby generating a power-on pulse signal to achieve the device's power-on self-start function.

[0030] The working principle is as follows:

[0031] 1. The main power supply of the host computer is turned on. At this time, the MCU or CPLD part has power, and the FT2000 mainboard has only power.

[0032] 2. The MCU or CPLD outputs a high-level signal, the Q2 MOS tube is turned on, and then the Q1 tube is turned on, so that the main power supply can supply power to the FT2000 motherboard;

[0033] 3. When the FT2000 motherboard has power, the MCU or CPLD generates a power-on pulse signal to the FT2000 motherboard. After the FT2000 CPU main chip detects the power-on pulse signal, it switches the power state from S5 to S0, enabling the main computer to start up normally.

[0034] In the above-mentioned existing technologies, an MCU or CPLD is used to generate the main power MOS tube control signal and the power-on pulse signal, which can meet the application scenario requirements of automatic power-on. However, this part of the circuit is complex, and the main power loop current is usually large, reaching several hundred watts. The heat generated by the internal resistance of the MOS tube is also a reliability risk.

[0035] See also Figure 4 , Figure 4This is another circuit diagram of the FT2000 processor's power-on self-start circuit in the prior art. In the prior art, when the device is turned on, an MCU or CPLD is used to generate a power-on pulse signal. After the FT2000 processor main chip detects the power-on pulse signal, it switches the power state from S5 to S0, achieving normal startup of the main control computer. In this prior art, the use of an MCU or CPLD to generate a power-on pulse signal can meet the application scenario requirements of automatic startup. However, the cost of the MCU or CPLD main chip is usually relatively high, and software programming is required to generate the pulse signal.

[0036] See also Figure 5 , Figure 5 This is a circuit diagram of a power-on self-starting circuit of the present invention. To address the problems of the prior art, the present invention provides a power-on self-starting circuit comprising an RC circuit, a Schmitt trigger, and a MOS switch. The RC circuit comprises a first RC circuit and a second RC circuit connected in parallel. The first RC circuit comprises a first resistor and a first capacitor connected in series, and the second RC circuit comprises a second resistor and a second capacitor connected in series. The Schmitt trigger comprises a first Schmitt trigger and a second Schmitt trigger. The MOS switch comprises a first MOS switch and a second MOS switch. The first Schmitt trigger and the second Schmitt trigger are connected in series to the first RC circuit and the second RC circuit, respectively. The first MOS switch is connected in series to the second RC circuit. The second MOS switch is connected in series between the RC circuit and the PWR_BTN_EN pin of the FT2000 processor. The resistance value of the first resistor is greater than the resistance value of the second resistor.

[0037] exist Figure 5 In the embodiment, the first RC circuit is RC1, the second RC circuit is RC2, the first resistor is R1, the second resistor is R2, the first capacitor is C1, the second capacitor is C2, the first MOS switch is M1, the second MOS switch is M2, the first Schmitt trigger is U1A, and the second Schmitt trigger is U1B.

[0038] By connecting RC1 and RC2 in parallel and making R1's resistance greater than R2's, the flipping times of U1A and U1B in RC1 and RC2 are different. This means that the voltage of RC1 reaches the flipping threshold longer than the voltage of RC2. When RC1 and RC2 reach their respective flipping thresholds, the corresponding output waveforms of U1A and U1B flip. The flipping signals of U1A and U1B then control the on / off switching of M1 and M2, thereby controlling the voltage level of the PWR_BTN_EN pin.

[0039] Since the resistance of R2 is small, the U1B signal in RC2 flips first, outputting a low level, and the MOS tube M1 is disconnected. At the same time, U1A in RC1 remains high, the MOS tube M2 is turned on, and the PWR_BTN_EN signal output is a low level signal. When the voltage of RC1 reaches the flip threshold, the U1A output in RC1 is low, the MOS tube M2 is turned off, and the PWR_BTN_EN signal output is a low level signal.

[0040] In an embodiment of the present invention, the first resistor R1 is 698 kΩ, and the second resistor R2 is 499 kΩ, so that the time it takes for the voltage of RC1 to reach the flip threshold is longer than the time it takes for the voltage of RC2 to reach the flip threshold.

[0041] In an embodiment of the present invention, the capacitance values of the first capacitor C1 and the second capacitor C2 are equal, so that RC1 and RC2 have charging and discharging delays, thereby making the flipping time of U1A and U1B different. In one embodiment, the capacitance values of the first capacitor C1 and the second capacitor C2 are both 2.2μF.

[0042] In the embodiment of the present invention, the first Schmitt trigger and the second Schmitt trigger are both 74LS14. They are used to stabilize the input signal and generate clear output pulses.

[0043] In an embodiment of the present invention, the first MOS switch and the second MOS switch are both of model M2N7000, so that a NOT gate circuit is constructed under the action of the first MOS switch and the second MOS switch to control the level of the PWR_BTN_EN pin.

[0044] In the above embodiment, by adjusting the parameters of the RC circuit so that the low-level pulse width meets the requirement of at least 20ms and not more than 4s, a power-on pulse signal meeting the requirements of the FT2000 processor can be generated.

[0045] See also Figure 6 , Figure 6 This is a waveform diagram of the first RC circuit and the second RC circuit in the power-on self-starting circuit of the utility model. In the above embodiment, the working principle of the RC circuit is:

[0046] The RC resistor-capacitor circuit is mainly composed of two components: resistors and capacitors. Resistors are used to limit the size of the current, while capacitors are used to store charge and generate voltage. The charging time constant (τ) of the RC circuit is the product of resistance R and capacitance C, that is, τ = RC. This time constant provides a measure of the charging speed of the capacitor. In the present invention, two groups of RC circuits are used. Due to the different resistance values, the charging current is different in the case of the same size of capacitance. According to the charging time constant (τ), a specific voltage (assuming it is 1.65V) is reached. The longer the charging time of the group of RC circuits with a larger resistance value, the longer the voltage threshold time required to reach the Schmitt trigger flip. The shorter the charging time of the group of RC circuits with a smaller resistance value, the shorter the voltage threshold time required to reach the Schmitt trigger flip, such as Figure 6 As shown, the red waveform is the waveform of RC1, and the green waveform is the waveform of RC2.

[0047] See also Figure 7 , Figure 7 This is the inversion waveform diagram of the first RC circuit and the second RC circuit in the power-on self-starting circuit of the utility model. In the above embodiment, the working principle of the Schmitt trigger is:

[0048] When the input signal level reaches its flip threshold (voltage = 1.65V), its output level switches from high level to low level signal. Due to the different resistance values of the two RC circuits, the input level flip time of U1A and U1B in the first RC circuit and the second RC circuit is different. Figure 7 As shown, the red waveform is the waveform of RC1, and the green waveform is the waveform of RC2. It can be seen from the figure that the RC2 circuit flips first, and the RC1 circuit flips slowly. The time difference between the two groups is about 0.1s;

[0049] See also Figure 8 , Figure 8 This is the waveform of the power-on pulse in the self-starting circuit of the utility model. In the above embodiment, the working principle of the MOS tube is:

[0050] When U1B flips from high to low, M1 turns from on to off, U1A outputs a high level, M2 turns from off to on, and PWR_BTN_EN generates the low level signal required for the power-on pulse; when U1A outputs a low level, M2 turns from on to off, and PWR_BTN_EN turns from low to high. Figure 8 As shown, the red waveform is the standby pulse waveform (S5 state), and the blue waveform is the power-on pulse waveform (S0 state).

[0051] After the introduction of the working principles of the above three parts of the circuit and the analysis of the circuit waveforms, it can be seen that when the main control computer is powered on, this circuit generates the power-on pulse signal required by the FT2000 processor and sends it to the PWR_BTN_EN pin. When the FT2000 detects the power-on signal, it starts instruction fetching and decoding to complete the power-on action.

[0052] The power-on self-starting circuit of the present invention is designed with two sets of RC circuits, and a first resistor and a second resistor with different resistance values are respectively provided in the two sets of RC circuits, so that the voltage levels of the two RC circuits are flipped successively under the action of their respective Schmitt triggers, and the voltage level signal of the PWR_BTN_EN pin is controlled in the NOT gate circuit composed of two MOS tubes, so that the computer generates a power-on pulse signal, thereby meeting the power-on self-starting application scenario requirements of a main control computer composed of an FT2000 processor, eliminating the need for expensive control chips and complex circuits, and saving design costs.

[0053] In an embodiment of the present invention, the power-on self-starting circuit further includes an input power supply, and the input voltage of the input power supply is 3.3V.

[0054] In an embodiment of the present invention, the power-on self-starting circuit further includes a fourth resistor and a fifth resistor. The fourth resistor is connected in series between the input power supply and the PWR_BTN_EN pin of the FT2000 processor, and the fifth resistor is connected in series to the first RC circuit. Figure 5 As shown, the fourth resistor is R4 and the fifth resistor is R5. R4 is a voltage divider resistor to provide a stable voltage level for the output signal or limit the current flowing through the trigger output, provide an appropriate voltage for the gate of the MOS tube, and ensure that the MOS tube can be correctly turned on or off. R5 is a feedback resistor to stabilize the threshold voltage of the Schmitt trigger and ensure the response speed and stability of the Schmitt trigger.

[0055] In one embodiment, the resistance value of the fourth resistor is 10 kΩ, and the resistance value of the fifth resistor is 100 kΩ.

[0056] The circuit structure of the power-on self-starting circuit of the utility model is simple, and only 10 electronic components are needed to realize the power-on self-starting function of the Feiteng FT2000 main control computer. The required material cost is low, the PCB area occupied is small, and the circuit reliability is high.

[0057] In order to solve the problems in the prior art, the present invention also provides a Feiteng FT2000 main control computer, including a computer body and the above-mentioned power-on self-starting circuit. The power-on self-starting circuit is installed in the computer body to realize the power-on self-starting function of the computer body under the action of the power-on self-starting circuit, thereby meeting the application scenario requirements of the Feiteng FT2000 main control computer system.

[0058] The preferred embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited thereto. Within the technical concept of the present invention, the technical solution of the present invention may be subjected to various simple modifications, including combining the specific technical features in any suitable manner. To avoid unnecessary repetition, the present invention will not further describe various possible combinations. However, these simple modifications and combinations should also be considered as disclosed in the present invention and fall within the scope of protection of the present invention.

Claims

1. A self-starting circuit when powered on, characterized in that: The power-on self-starting circuit includes an RC circuit, a Schmitt trigger, and a MOS switch. The RC circuit includes a first RC circuit and a second RC circuit connected in parallel. The first RC circuit includes a first resistor and a first capacitor connected in series. The second RC circuit includes a second resistor and a second capacitor connected in series. The Schmitt trigger includes a first Schmitt trigger and a second Schmitt trigger. The MOS switch includes a first MOS switch and a second MOS switch. The first and second Schmitt triggers are connected in series to the first and second RC circuits, respectively. The first MOS switch is connected in series to the second RC circuit. The second MOS switch is connected in series between the RC circuit and the PWR_BTN_EN pin of the FT2000 processor. The resistance value of the first resistor is greater than the resistance value of the second resistor.

2. The power-on self-starting circuit according to claim 1, characterized in that: The first resistance value is 698 kΩ, and the second resistance value is 499 kΩ.

3. The power-on self-starting circuit according to claim 1, characterized in that: The capacitance values of the first capacitor and the second capacitor are equal.

4. The power-on self-starting circuit according to claim 1, characterized in that: The capacitance value of the first capacitor and the second capacitor are both 2.2 μF, and are used to form an RC circuit with the resistor to generate charging and discharging delays.

5. The power-on self-starting circuit according to claim 1, characterized in that: The first Schmitt trigger and the second Schmitt trigger are both 74LS14.

6. The power-on self-starting circuit according to claim 1, characterized in that: Models of both the first MOS switch and the second MOS switch are M2N7000.

7. The power-on self-starting circuit according to claim 1, characterized in that: The power-on self-starting circuit further includes an input power supply, and the input voltage of the input power supply is 3.3V.

8. The power-on self-starting circuit according to claim 7, characterized in that: The power-on self-starting circuit further includes a fourth resistor and a fifth resistor. The fourth resistor is connected in series between the input power supply and the PWR_BTN_EN pin of the FT2000 processor, and the fifth resistor is connected in series to the first RC circuit.

9. The power-on self-starting circuit according to claim 8, characterized in that: The resistance value of the fourth resistor is 10 kΩ, and the resistance value of the fifth resistor is 100 kΩ.

10. A Feiteng FT2000 main control computer, applied to the above-mentioned power-on self-starting circuit, characterized in that: The invention comprises a main control computer, a computer body and a power-on self-starting circuit as claimed in any one of claims 1 to 9.

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