A 3U VPX control and management module based on Phytium E2000s

Abstract

The utility model relates to control management module technical field, concretely relates to a 3UVPX control management module based on Feiteng E2000S, this module takes Feiteng tenglong E2000S CPU as the core, adopts specific package form, possesses advanced characteristic and rich integration function. Network design adopts WX1860AL4 and XPHY0111QFIGR combination, realizes gigabit ethernet interface function. Through leading out two way I2C as IPMB, combine chassis management unit ChMC and board card management unit IPMC, follow IPMI2.0 agreement, realize the collection and control to each module state information in chassis. The module high integration, the performance is superior, can effectively satisfy the multiple needs of rugged chassis management.

Description

Technical Field

[0001] This utility model relates to the field of control management module technology, and more specifically, to a 3U VPX control management module based on Phytium E2000S. Background Technology

[0002] In terms of ruggedized chassis management, effective management of each module inside the chassis is required. Currently, there is a lack of a highly integrated, high-performance control and management module on the market that can meet a variety of management needs.

[0003] Traditional management modules are inadequate in terms of functional integration, processing performance, and network communication capabilities, making it difficult to meet the needs of increasingly complex management scenarios, such as the inability to efficiently process large amounts of management data and achieve comprehensive chassis health status monitoring. Utility Model Content

[0004] One objective of this invention is to provide a 3U VPX control and management module based on Phytium E2000S to solve the problems mentioned in the background art.

[0005] To achieve the above objectives, embodiments of this utility model provide a 3UVPX control and management module based on Phytium E2000S, comprising:

[0006] The Phytium E2000S CPU processing unit is compatible with the ARM V8 instruction set and virtualization architecture, and integrates multiple functional components.

[0007] The network module, consisting of WX1860AL4 from Netcom Technology and XPHY0111QFIGR from CETC Startop, is used to implement the gigabit Ethernet interface function.

[0008] The IPMB module has two I2C ports as IPMBs, used to collect and control the status information of the switching, power supply and functional modules.

[0009] Furthermore, the Phytium Tenlong E2000S CPU integrates one FTC310 core, 256KB L2 cache, one 16-channel General DMA, two 8-channel Device DMA, one JPEG Encoder, RAS component, two WDTs, one temperature sensor, one SE system management engine, one DDR4 / LPDDR4-2133 controller, two Lanes PCIe 3.0 interfaces, three 1000M Ethernet controllers, one USB 2.0 (Device), two USB 2.0 (OTG), two DisplayPort 1.4 interfaces, one QSPI Flash controller, 16 MIO controllers, and four UART controllers.

[0010] Furthermore, the XPHY0111QFIGR is used to convert the four RGMII channels from the WX1860AL4 into two SGMII channels and two 1000Base-T channels. The two SGMII channels are connected to the internal network switching module and the external network switching module, respectively, and the two 1000Base-T channels are brought out through the rear panel.

[0011] Furthermore, the WX1860AL4 supports the PCIe V2.1 standard, up to two Gigabit Ethernet ports with each port supporting MDI interface output, 802.1q VLAN protocol, and network signal self-detection;

[0012] The XPHY0111QFIGR employs DSP technology and an analog front-end, featuring functions such as cross-detection, automatic correction, polarity correction, adaptive equalization, crosstalk cancellation, echo cancellation, timing recovery, and error correction, enabling Ethernet data transmission and reception at different rates.

[0013] Furthermore, the BMC of the management and control module serves as the chassis management unit (ChMC), while the BMCs of the other modules serve as board management units (IPMCs). The ChMC and IPMC are connected via two hot-redundant backup IPMB buses.

[0014] Furthermore, the IPMC is responsible for collecting environmental information such as voltage, current, and temperature of this module, as well as alarm information. It has power control functions for the local module except for the power supply module, and responds to IPMI commands sent by the ChMC through the IPMB bus.

[0015] Furthermore, the control and management module also includes a hot-swap unit, which uses the domestically produced BT9352, to suppress the surge current when the blade is powered on;

[0016] The BT9352 generates a diode controller with fast turn-on and fast turn-off functions through an external N-channel MOSFET.

[0017] Furthermore, the control management module also includes a power-on timing control module, which uses a CPLD to control the power-on timing of the 12V to 3.3V / 1.8V / 1.1V / 0.8V conversion.

[0018] Compared with the prior art, the significant advantages of this utility model are:

[0019] 1. By integrating the Phytium E2000S CPU, it can efficiently process various data and tasks in chassis management, improving management efficiency and performance; at the same time, the network design scheme ensures high-speed and stable network communication, meeting the transmission requirements of management data, while supporting multiple network protocols and functions, enhancing the module's network adaptability.

[0020] 2. The IPMB design enables comprehensive monitoring and management of all modules within the chassis. Through a hot-redundant backup bus and communication methods that follow standard protocols, it improves the reliability and stability of the system and facilitates timely detection and handling of faults. Attached Figure Description

[0021] The above and / or additional aspects and advantages of this utility model will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0022] Figure 1 This is a hardware design block diagram of the present invention;

[0023] Figure 2 This is a block diagram of the 3U VPX management architecture of this utility model;

[0024] Figure 3 This is a block diagram of the 3U VPX heat dissipation management system of this utility model;

[0025] Figure 4 This is the power-on timing diagram for this utility model;

[0026] Figure 5 This is a block diagram of the hot-swappable design of this utility model;

[0027] Figure 6 This is the module layout diagram of this utility model. Detailed Implementation

[0028] To better understand the above-mentioned objectives, features, and advantages of this utility model, the present utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in these embodiments can be combined with each other.

[0029] Many specific details are set forth in the following description in order to provide a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Therefore, the scope of protection of the present invention is not limited to the specific embodiments disclosed below.

[0030] like Figures 1 to 6 As shown, an embodiment of this utility model provides a 3U VPX control and management module based on Phytium E2000S, comprising:

[0031] The Phytium E2000S CPU processing unit is compatible with the ARM V8 instruction set and virtualization architecture, and integrates multiple functional components.

[0032] The network module, consisting of WX1860AL4 from Netcom Technology and XPHY0111QFIGR from CETC Startop, is used to implement Gigabit Ethernet interface functionality. XPHY0111QFIGR converts the four RGMII ports from WX1860AL4 into two SGMII ports and two 1000Base-T ports. The two SGMII ports are connected to the internal network switching module and the external network switching module, respectively, and the two 1000Base-T ports are brought out through the rear panel.

[0033] The IPMB module has two I2C ports as IPMBs, used to monitor, collect and control the status information of the switching, power and functional modules. The BMC of the management control module is used as the chassis management unit ChMC, and the BMCs of the other modules are used as board management units IPMCs. The ChMC and IPMC are connected through two hot-redundant IPMB buses.

[0034] The chassis cooling module, E2000S, outputs 8 PWM and TACH channels as fan control signals and feedback acquisition, and intelligently and dynamically controls the fan speed according to the chassis temperature.

[0035] The power-on timing control module, implemented by a CPLD, controls the power-on timing of the 12V to 3.3V / 1.8V / 1.1V / 0.8V conversion.

[0036] The LED indicator module has multiple indicator lights on the front panel, including alarm, management, intranet, rear power, power and status indicators, each controlled by different components to indicate the corresponding status.

[0037] The debugging module brings out the E2000S debugging serial port and Ethernet management interface to the front panel;

[0038] The hot-swap unit uses the domestically produced BT9352 to suppress the surge current when the blade is powered on;

[0039] The structural components, the blade is fixed in the chassis guide groove by the air-cooled plate, and the rear of the blade is installed with the back plate through the connector and identification guide device. The external structural dimensions conform to the 3U VPX standard.

[0040] It is important to note that:

[0041] CPLD (Complex Programmable Logic Device) is a type of complex programmable logic device.

[0042] PCIE (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard.

[0043] IPMB (Intelligent Platform Management Bus) is an intelligent platform management bus.

[0044] In one embodiment, the IPMC is an intelligent platform management controller responsible for collecting environmental information such as voltage, current, and temperature of the module, as well as alarm information. The IPMC should also have power control functions (power on, power off, and reset) for the local module (excluding the power supply module). The IPMC also needs to respond to IPMI commands sent by the ChMC via the IPMB bus.

[0045] In one embodiment, the ChMC is the overall system management controller, implemented by the BMC of the management control module. Besides collecting sensor and alarm information from its own module, the ChMC is also responsible for monitoring the overall health status of the chassis. The ChMC and IPMC are connected via two hot-redundant IPMB buses, and the communication protocol follows IPMI 2.0. At fixed intervals, the ChMC polls all modules via the IPMB bus for periodic self-test information and displays this information in a graphical interface on the chassis's BMC management webpage. The ChMC provides an overall system BMC management webpage, which allows for monitoring of the status and power-on / off status of each module within the chassis.

[0046] In one embodiment, the E2000S CPU uses an FCBGA package with 705 pins and a package size of 23mm × 23mm.

[0047] In one embodiment, the IPMB module conforms to the IPMI 2.0 protocol.

[0048] In one embodiment, the hot-swappable unit is set to have a soft start time of approximately 2ms.

[0049] In one embodiment, the Phytium Tengri E2000S CPU integrates one FTC310 core, 256KB L2 cache, one 16-channel General DMA, two 8-channel Device DMA, one JPEG Encoder, RAS component, two WDTs, one temperature sensor, one SE system management engine, one DDR4 / LPDDR4-2133 controller, two Lanes PCIe 3.0 interfaces, three 1000M Ethernet controllers, one USB 2.0 (Device) port, two USB 2.0 (OTG) ports, two DisplayPort 1.4 interfaces, one QSPI Flash controller, 16 MIO controllers, and four UART controllers.

[0050] In one embodiment, the WX1860AL4 supports the PCIE V2.1 standard, supports up to two Gigabit Ethernet ports with each port supporting MDI interface output, supports the 802.1q VLAN protocol, and network signal self-detection.

[0051] In one embodiment, the XPHY0111QFIGR employs DSP technology and an analog front-end (AFE) to achieve high-speed data transmission and reception via UTP cable. It features functions such as crosstalk detection, automatic correction, polarity correction, adaptive equalization, crosstalk cancellation, echo cancellation, timing recovery, and error correction, enabling robust transmission and reception of Ethernet data at different rates, such as 10Mbps, 100Mbps, or 1000Mbps.

[0052] In one embodiment, one 1000BASE-T internal network interface and one Ethernet management interface are provided to meet the technical protocol requirements.

[0053] In one embodiment, the IPMC is responsible for collecting environmental information such as voltage, current, and temperature of this module, as well as alarm information. It has power control functions for the local module except for the power supply module, and responds to IPMI commands sent by the ChMC through the IPMB bus.

[0054] In one embodiment, in addition to collecting sensor information and alarm information from this module, the ChMC also monitors the health status of the entire chassis and displays the self-test information in a graphical interface on the chassis BMC management webpage.

[0055] In one embodiment, the alarm, status, and rear power indicator lights are controlled by the BMC via GPIO outputs of high and low levels. The management network and intranet data transmission lights are led out from the PHY to the front panel, and the power indicator light is controlled by the power supply chip. To further clarify the specific content of the indicator lights, a detailed description is provided in the table below, "Front Panel Indicator Light Table."

[0056] The front panel indicator lights are shown below:

[0057]

[0058] The alarm, status, and rear power indicator lights in the table are directly controlled by the BMC. The management network and intranet data transmission lights are controlled by the GPIO output of high and low levels, and are led out to the front panel by the PHY.

[0059] The power indicator light is controlled by the power chip and lights up when the power is on.

[0060] In one embodiment, the BT9352 generates a diode controller with fast turn-on and fast turn-off functions through an external N-channel MOSFET, replacing a high-power Schottky diode and associated heat sink, thereby saving power and board space. It has fast turn-on and fast turn-off functions, and the fast turn-off function minimizes reverse current when the input power supply fails or is short-circuited.

[0061] In one embodiment, the diode controller can be powered by a 2.9V to 18V supply. An external power supply is required at low voltages. The power path is disabled under undervoltage or overvoltage conditions. The controller also features an open-circuit MOSFET detection circuit that issues an indication signal if the voltage drop across the MOSFET is excessive in the ON state.

[0062] Installation process and operation:

[0063] Processor installation: Install the Phytium E2000S CPU accurately into the corresponding slot of the module according to the FCBGA package requirements, ensuring that the pin connections are correct and the installation is secure.

[0064] Network module connection: According to the design scheme, connect the WX1860AL4 from Netcom Technology to the XPHY0111QFIGR from CETC Startop. Use appropriate cables to connect the four RGMII outputs from the WX1860AL4 to the corresponding interfaces of the XPHY0111QFIGR. Then connect the two SGMII outputs from the XPHY0111QFIGR to the internal network switching module and the external network switching module respectively. The two 1000Base-T outputs are brought out through the rear panel to ensure stable connection and normal signal transmission.

[0065] IPMB Connection and Configuration: Connect the two I2C channels as IPMBs to the corresponding interfaces of the switching, power supply, and functional modules respectively. Correctly configure the BMC (ChMC) of the management control module and the management units (IPMC) of each board so that they can communicate according to the IPMI2.0 protocol and realize functions such as information acquisition, control, and command response.

[0066] Chassis cooling system installation: Connect the 8 PWM and TACH outputs from the E2000S to the control signal and feedback acquisition interface of the chassis fan, respectively. Ensure that the fan is installed firmly and the airflow is unobstructed. Through software programming, the E2000S can intelligently and dynamically control the fan speed according to the chassis temperature.

[0067] Power-on sequence setting: According to the CPLD programming requirements, write the corresponding program code and set the power-on sequence from 12V to 3.3V / 1.8V / 1.1V / 0.8V to ensure that each component is powered on in the correct order.

[0068] LED indicator connection and settings: Connect the control lines of the alarm, status, and rear power indicator lights to the GPIO interface of the BMC, and control the indicator light status by setting the GPIO output high and low levels through software; lead the management network and intranet data transmission lights out of the PHY and connect them to the corresponding positions on the front panel; connect the power indicator light to the control output terminal of the power chip to ensure that the indicator light lights up normally after power-on.

[0069] Debugging interface outreach: Use appropriate cables to bring out the E2000s debugging serial port and Ethernet management interface to the designated location on the front panel, ensuring that the interface labels are clear and easy for maintenance and debugging personnel to use.

[0070] Hot-swappable unit installation: According to the hot-swappable design diagram, correctly install the domestic BT9352 and related external components on the module, connect the power supply, load, control signal and other lines, set the soft start time to about 2ms, and ensure that the surge current suppression function is normal.

[0071] Overall installation and testing: The assembled modules are fixed in the chassis guide slots using air-cooled plates. The rear of the blades is securely installed to the backplate via connectors and identification guide devices. Overall electrical performance, functional, and stability tests are conducted to ensure that all functions of the module are normal and meet design requirements.

[0072] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0073] In this specification, the term "an embodiment," etc., refers to a specific feature, structure, material, or characteristic described in connection with that embodiment or example, which is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0074] The above are merely preferred embodiments of this utility model and are not intended to limit the scope of this utility model. Various modifications and variations can be made to this utility model by those skilled in the art. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. A 3U VPX control and management module based on Phytium E2000S, characterized in that, include: The Phytium E2000S CPU processing unit is compatible with the ARM V8 instruction set and virtualization architecture, and integrates multiple functional components. The network module is connected to the Phytium Tenlong E2000S CPU processing unit. The network module consists of WX1860AL4 from Netcom Technology and XPHY0111QFIGR from CETC Xingtuo, and is used to implement the gigabit Ethernet interface function. The IPMB module, with two I2C ports from the Phytium E2000S CPU processing unit, is used to collect and control the status information of the switching, power supply, and functional modules.

2. The 3U VPX control and management module based on Phytium E2000S according to claim 1, characterized in that, The Phytium Tenlong E2000S CPU integrates one FTC310 core, 256KB L2 cache, one 16-channel General DMA, two 8-channel Device DMA, one JPEG Encoder, RAS component, two WDTs, one temperature sensor, one SE system management engine, one DDR4 / LPDDR4-2133 controller, two Lanes PCIe 3.0 interfaces, three 1000M Ethernet controllers, one USB 2.0 device interface, two USB 2.0 OTG interfaces, two DisplayPort 1.4 interfaces, one QSPI Flash controller, 16 MIO controllers, and four UART controllers.

3. The 3U VPX control and management module based on Phytium E2000S according to claim 1, characterized in that, The XPHY0111QFIGR is used to convert the four RGMII channels from the WX1860AL4 into two SGMII channels and two 1000Base-T channels. The two SGMII channels are connected to the internal network switching module and the external network switching module, respectively, and the two 1000Base-T channels are brought out through the rear panel.

4. The 3U VPX control and management module based on Phytium E2000S according to claim 3, characterized in that, The WX1860AL4 supports the PCIE V2.1 standard, up to two Gigabit Ethernet ports with each port supporting MDI interface output, 802.1q VLAN protocol, and network signal self-detection; the XPHY0111QFIGR is equipped with DSP circuitry and analog front-end circuitry to enable Ethernet data transmission and reception at different speeds.

5. The 3U VPX control and management module based on Phytium E2000S according to claim 1, characterized in that, The BMC of the management and control module serves as the chassis management unit (ChMC), while the BMCs of the other modules serve as board management units (IPMCs). The ChMC and IPMC are connected via two hot-redundant backup IPMB buses.

6. The 3U VPX control and management module based on Phytium E2000S according to claim 5, characterized in that, The IPMC is configured to collect voltage, current, and temperature environmental information, as well as alarm information, of this module, and the IPMC is electrically connected to the ChMC via the IPMB bus to respond to IPMI commands.

7. The 3U VPX control and management module based on Phytium E2000S according to claim 1, characterized in that, The control and management module also includes a hot-swap unit, which uses the domestic BT9352, to suppress the surge current when the blade is powered on. The BT9352 generates a diode controller with fast turn-on and fast turn-off functions through an external N-channel MOSFET.

8. The 3U VPX control and management module based on Phytium E2000S according to claim 1, characterized in that, The control management module also includes a power-on timing control module, which includes a CPLD chip. The CPLD chip is used to implement power-on timing control for 12V to 3.3V, 1.8V, 1.1V and 0.8V conversion.

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