A mosfet structure and its manufacturing method

A manufacturing method and stacking technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems affecting device performance and other issues
CN103606524BActive Publication Date: 2016-03-23INST OF MICROELECTRONICS CHINESE ACAD OF SCI

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
Publication Date
2016-03-23

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Abstract

The present invention provides a method of manufacturing a MOSFET, comprising: a. providing a substrate (100), a source / drain region (200), a pseudo-gate stack (150), an interlayer dielectric layer (300), and a sidewall (160); b. removing the pseudo-gate stack (150) to form a pseudo-gate vacancy; c. performing inclined ion injection on the semiconductor structure, and forming a carrier scattering region (400), the carrier scattering region (400) being located below a surface of the semiconductor structure on a side of a drain; and d. depositing a gate stack layer (500) in the pseudo-gate vacancy. According to the method for reducing a probability of hot carrier transition provided by the present invention, scattering impurities, that is, non-ionized impurities are injected in a channel material near a side of a drain, so that a probability that a hot carrier is scattered in a pinch-off region is increased, a carrier is subject to increased resistance in the movement in the pinch-off region, the energy of a hot carrier is reduced, and accordingly the quantity and probability of hot carriers that enter a gate dielectric layer are reduced.
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Description

technical field

[0001] The invention relates to a MOSFET structure and a manufacturing method thereof. More particularly, it relates to a MOSFET structure for reducing the number of hot electrons in a channel near the drain and a method of manufacturing the same. technical background

[0002] When the MOSFET is in the saturation region, the channel inversion layer is partially pinched off, that is, the inversion carrier concentration on the channel surface near the drain end is very small, and the resistance is large. According to the series voltage division relationship, the voltage in the channel region is mostly Falling on the pinch-off region, a large electric field is generated in the pinch-off region. When the anti-type carriers in the channel region move to the boundary of the pinch-off region under the action of the electric field, they will be accelerated by the electric field of the pinch-off region, and will be quickly swept to the drain end. During this process,...

Claims

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